Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand...

16
Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Hu and Vishwani D. Agrawal Department of ECE, Auburn University, Auburn, AL 36849
  • date post

    20-Dec-2015
  • Category

    Documents

  • view

    221
  • download

    0

Transcript of Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand...

Page 1: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis

Fei Hu and Vishwani D. AgrawalDepartment of ECE,Auburn University, Auburn, AL 36849

Page 2: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 2

Problem Statement

Enhance the probabilistic power estimation technique for signal correlations to improve the estimation of dynamic power and, in particular, account for glitch suppression by inertial delays.

Page 3: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 3

Outline

Background Probability waveform Tagged probability waveform simulation (TPS) Dual-transition glitch filtering (Dual-trans)

Present Contributions Motivation Supergate and timed Boolean function (TBF) Modifications of TPS and Dual-trans

Using TBF Adaptive application of supergate

Experimental results Conclusions

Page 4: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 4

Background: Probability Waveform

Input vector applied

Next input vector applied

Vector period

Transient interval

0Steady state

Sam

ple

s of

sig

nal, s

(t)

0

Pro

b. w

avefo

rm,

P(t

)

1.0

P(t)=0.25P(t)

=0.25

0.2

50.5 0.2

5

0.5

0.5

0.2

5

0.2

5

0.5

Transition probabilities

time

time

Page 5: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 5

Background: Tagged Probability Waveform Partition of a probability

waveform for one vector period according to the steady state signal values Four tagged waveforms

Approximate exact spatial correlations with the macroscopic spatial correlations between steady state signal values (tags)

Reference: C.-S. Ding, et al., “Gate-level power estimation using tagged probabilistic simulation,” IEEE Trans. on CAD, vol. 17, no. 11, pp. 1099–1107, Nov. 1998.

00 01 10 11, , ,c c c cw w w w

0.5

0.25 0.5

0.25

0.25

0.5 0.25

0.5

Probability waveform

0.25

0.25

0.25

0.25

0.250.25

Tagged probability waveform

00nw

P

P

t

t

0.250.25

0.25

01nw

P

t

0.25 0.250.25

10nw

P

t11nw

P

t

Page 6: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 6

Background: Dual-Transition Glitch Filtering

t

sp

t2 t3

0.2 0.2

11bw 0.5

tt1 t2

sp0.5

0.2 0.2

11aw

cd

a

b

tt1' t2'

sp

0.25

0.1

0.06

11cw

0.06

0.1

t3'

ti '=ti+ d for i=1,2,3

t1 < t2 < t3 < t1+d

t

sp

0.25

11cw

t1' t2' t3't

sp

0.25

11cw

t1' t2' t3'

Actual waveform

tt1' t2'

sp

0.25

0.1

0.06

11cw

0.06

0.1

t3'

TPS glitch filteringDual-transition glitch filtering

Reference: F. Hu, V. D. Agrawal, “Dual-Transition Glitch Filtering in Probabilistic Waveform Power Estimation,” Proc. GLSVLSI, 2005, pp. 357-360.

Dual-transition probability: probability of joint event at two time instance

Page 7: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 7

Motivation: Reconvergent Fanouts Effectiveness of dual-transition glitch filtering is limited

by the underlying TPS method The major sources of errors in TPS is its approximation

of spatial correlation among signals

d2

a

b

c

d1

0.10.1

0.1 0.1d1

0.05

0.2

01aw

10bw

01,10cw 0.1

0.05

0.1

0.101,10cw 0.1

0.10.1

From TPS propagation

Actual waveform

0 t

0 t+d1

d2=0

0 d1 t t+d1

0 d1 t t+d1

Page 8: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 8

Supergate and TBF Supergate

partitioning of circuits in a way that all inputs to a partition are externally independent

Limit to maximum 3 levels and 3 input, to avoid exponentially increased complexity

Reference: S. C. Seth and V. D. Agrawal, “A new model for computation of probabilistic testability in combinational circuits,” Integration, the VLSI Journal, vol. 7, pp. 49-75, 1989.

supergate

ab c

1

2

3

4

Page 9: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 9

Timed Boolean Function Need to use timed Boolean function (TBF)

Existence of multiple propagation delay paths inside a supergate

Assuming same gate delay state of node c determined by the values on inputs a and b

at times t-2 and t-3.

Reference: E. J. McCluskey, “Transients in combinational logic circuits,” in Wilcox and Mann, editors, Redundancy Techniques for Computing Systems, Spartan Books, 1962, pp. 9-46.

( ) ( 2 ) ( 2 ) ( 3 ) ( 3 )

( ) ( 2 ) ( 2 ) ( 3 ) ( 3 )

c t a t b t a t b t

c t a t b t a t b t

supergate

a

b c

1

2

3

4

Page 10: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 10

Present Contributions Reformulate TPS using timed Boolean

functions (TBF). Compute dual-transition probabilities using

TBF Reformulate the dual-transition probability Approximate higher-order probabilities as

function of dual-transition probabilities This allows application of supergate

structures for improving signal and transition probabilities.

Page 11: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 11

Selective Application of Supergate Motivation

TBF not accurate when inertial glitch filtering effect is not negligible

Inertial glitch filtering effect The glitch filtering by internal gates of a supergate

d1

d2

0

1

0

1

0

1

a

b

c

d2

Always 0

w

Page 12: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 12

Selective Application of Supergate Static decision making

Quick analysis based on the time instances subject to glitch filtering

D = average number of time instants requiring glitch filtering

Apply supergate if D> DT (inertial filtering negligible) DT, experimentally determined threshold (0.9)

d

Yes

No

2d

ca

b

Page 13: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 13

Experimental Results – Fanout Delay Assignment

CircuitTPS DualTrans Supergate method

Eavg σ Etot Eavg σ Etot Eavg σ Etot

c17 2.3 2.6 0.1 2.3 2.6 0.1 2.3 2.6 0.1 

c432 29.9 38.8 35.8 9.5 11.8 6.5 11.5 16.6 11.5

c499 6.8 14.0 7.0 3.6 8.2 0.6 2.3 3.0 3.0 

c880 8.3 15.3 1.6 8.0 15.7 5.2 4.8 9.0 0.0 

c1355 24.2 31.6 32.9 5.8 11.2 5.4 5.0 9.5 0.5 

c1908 15.0 23.1 4.1 17.7 27.9 11.2 7.0 16.3 2.0 

c2670 16.6 29.8 7.2 16.7 28.3 9.9 13.2 23.6 6.2 

c3540 13.8 26.3 9.8 10.3 25.6 2.4 10.5 26.4 3.7 

c5315 11.8 24.4 2.3 13.4 31.5 10.1 11.3 27.0 3.4 

c6288 27.4 27.5 32.1 15.7 18.8 4.1 12.7 15.4 0.2 

c7552 14.5 27.5 3.2 14.8 31.4 7.8 14.1 27.6 1.3 

Avg. 15.5 23.7 12.4 10.7 19.4 5.7 8.6 16.1 2.9 

Page 14: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 14

Experimental Results – Unit Delay Assignment

CircuitsTPS DualTrans Supergate method

Eavg σ Etot Eavg σ Etot Eavg σ Etot

c17 0.6 0.4 0.1 0.6 0.4 0.1 0.6 0.4 0.9

c432 7.9 9.6 9.0 5.6 8.7 4.8 3.4 6.3 2.2

c499 11.1 26.9 16.0 11.1 26.6 16.1 1.0 2.1 0.8

c880 7.8 15.3 4.7 7.7 15.3 4.7 4.0 6.8 2.6

c1355 10.0 20.8 9.9 10.0 20.6 10.1 10.3 24.2 12.7

c1908 21.6 31.5 18.6 21.5 31.5 18.7 6.0 13.7 2.0

c2670 11.2 32.4 7.0 8.8 30.7 1.0 7.3 29.4 1.8

c3540 9.5 25.0 3.0 9.9 27.0 4.8 9.5 26.8 4.3

c5315 18.0 44.7 14.0 18.5 45.5 15.6 13.6 40.4 9.2

c6288 27.9 36.3 15.4 28.5 36.9 16.4 27.6 37.3 15.0

c7552 15.5 39.5 8.8 15.8 39.9 9.4 13.9 36.0 3.8

Avg. 12.8 25.7 9.7 12.5 25.7 9.2 8.8 20.3 5.0

Page 15: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

10/04/2005 ICCD 2005, San Jose, CA 15

Conclusions Effectiveness of dual-transition glitch filtering

method is limited by the underlying probabilistic simulation method

Proposed an enhanced dual-transition power estimation method: Incorporates supergate to handle the spatial

correlation at reconvergent fanouts Describes supergate by timed Boolean function Uses selective application of supergate when

inertial glitch filtering effect is negligible Improved estimation accuracy over previous

approaches (TPS and DualTrans) The average estimation error of total power is now

less than 5% for ISCAS’85 benchmark circuits

Page 16: Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Huand Vishwani D. Agrawal Department of ECE, Auburn University,

Questions ?

For questions and comments, please contact [email protected]