eng prac lab manual

8/14/2019 eng prac lab manual

1/38

EX: NO: STUDY OF ELECTRONIC COMPONENTS AND

DATE: EQUIPMENT

Aim:To study electronic components and equipment such as resistor colour coding,

usage of CRO and Multimeter

Components Require :

1. Resistors

2. Oscilloscope

3. Multimeter

T!eor":

Resistor #o$our #o in%:

Resistor colour coding is used to indicate the values or ratings of resistors. t is also

used in capacitors and inductors. The advantage of colour coding is that essential

information can !e mar"ed on small components of cylindrical shape #ithout the need to

read tiny printing. Resistor values are al#ays coded in ohms.

$and % is the first significant digit of component value.$and $ is the second significant digit.

$and C is the decimal multiplier.

$and & if present, indicates tolerance of value in percent 'no colour means 2()*.

+or e ample, a resistor #ith !ands of yellow, violet, red and gold #ill have first digit

-'yello#*, second digit 'violet*, follo#ed !y 2'red* /eros0 -, (( ohms. old signifies that

the tolerance is ).

%ctual resistor value 4 - (( ) 5.

1


2/38

Resistor Co$our Co in%:

Resistor St&n &r Co$our Co e T&'$e

Co$our (&$ue Di%it Mu$tip$ier To$er&n#e$lac" ( 1( (

$ro#n 1 1( 1 1)

Red 2 1( 2 2)Orange 3 1( 3

6ello# - 1( -

reen 1( (. )$lue 7 1( 7 (.2 )

8iolet 1( (.1)rey 9 1( 9 (.( )

:hite ; 1( ;

old 1(


3/38

Os#i$$os#ope:

%n oscilloscope 'sometimes a!!reviated CRO for cathodeC or > type.

n the simplest mode, the oscilloscope repeatedly dra#s a hori/ontal line called the

trace across the middle of the screen from left to right. One of the controls, the time !ase

control, sets the speed at #hich the line is dra#n, and is cali!rated in seconds per division.

f the input voltage departs from /ero, the trace is deflected either up#ards or do#n#ards.

%nother control, the vertical control, sets the scale of the vertical deflection, and is

cali!rated in volts per division. The resulting trace is a graph of voltage against time.

f the input signal is periodic, a nearly sta!le trace can !e o!tained @ust !y setting

the time !ase to match the frequency of the input signal. +or e ample, if the input signal is

a ( A/ sine #ave, then its period is 2( ms, so the time !ase should !e ad@usted so that the

time !et#een successive hori/ontal s#eeps is 2(ms. This mode is called continual s#eep.To provide a more sta!le trace, modern oscilloscopes have a function called the trigger.

:hen using triggering, the scope #ill pause each time the s#eep reaches the e treme right

side of the screen. The scope then #aits for a specified event !efore dra#ing the ne t trace.

The trigger event is usually the input #aveform reaching some user


4/38

T&'u$&tion:

=l. >o. Resistance 8alue !y Colour Coding 'B* Resistance 8alue !y Multimeter 'B*

4


5/38

Most oscilloscopes allo# the user to !ypass the time !ase and feed an e ternal signal into

the hori/ontal amplifier. This is called


6/38

6


7/38

Mu$timeter:

% Multimeter is an electronic measuring instrument that contri!utes several

functions in one unit. The most !asic instruments include ammeter, voltmeter, and

ohmmeter. %nalog multimeters are sometimes referred to as Gvolt


8/38

AND *&te:

OR *&te:

NOT *&te:

EX: NO: STUDY AND (ERIFICATION OF LO*IC *ATES

DATE:8


9/38

Aim:

To verify the truth ta!le of the logic gates %>&, OR, >OT, >%>& J >OR using

- Cs.


C -32'OR ate*

C -(9'%>& ate*C -(-'>OT ate*

C -(('>%>& ate*

C -(2'>OR ate*

&igital C trainer "it

T!eor":

Dogic gates are digital circuits #ith one or more input signals and only one outputsignal. ates are digital circuits !ecause the input and output signals are either lo# or

high voltages. ates are often called logic circuits !ecause they can !e analysed using

$oolean alge!ra.

AND *&te:

%n %>& gate can have t#o or more inputs !ut only one output. ts output can go tologic 1 if all its inputs are at the high state.

The $oolean e pression for a t#o input %>& gate is0 +4 .y

NAND *&te:9


10/38

NOR *&te:

OR *&te:

%n OR gate can have t#o or more inputs !ut only one output. ts output #ill !e atlogic 1 if any or !oth of its inputs are at the high state.

10


11/38

The $oolean e pression for a t#o input OR gate is0

+ 4 K y

NOT *&te:

% >OT gate has a single input and a single output. t is also called as an inverter.

The output #ill !e at logic 1 if its input is at lo# state, other#ise its output #ill !e atlogic (. Thus its output is the complement of its input.

The $oolean e pression for the inverter is0

+ 4

NAND *&te:

t is the com!ination of %>& gate and >OT gate. t is also called as an universal

gate. The output of this gate #ill go to logic ( iff all its inputs are at the high state.

The $oolean e pression for a t#o input >%>& gate is + 4 ' .y*L

11


12/38

NOR *&te:

t is the com!ination of an OR gate and a >OT gate. t is also called as an universal

gate. The output of this gate #ill go to logic 1 iff all its inputs are at the lo# state.

12


13/38

The $oolean e pression for a t#o input >OR gate is0+ 4 ' K y*L

Pro#e ure:

1. Connections are given as per the logic diagrams and the pin&, OR, >OT, >%>& and >OR are studied and their truth ta!lesverified.

CIRCUIT DIA*RAM :

13


14/38

EX: NO: *ener&tion o) C$o#+ Si%n&$DATE:

14


15/38

AIM:

To generate a cloc" signal of 1 A/ 'square #aveform* !y anasta!le multivi!rator using C timer.

APPARATUS REQUIRED:

Equipments , R&n%e Qu&ntit"

Components

1. No#er =upply '(


16/38

TA-ULAR COLUMN:

%mplitude '8* Timeperiod 'ms*

Output

MODEL *RAP.:

16


17/38

Det C 4 (.1 +, R % 4R $ 4R

f 41.-

'R % K R$ *C

f 4

1.-

4P1 A/ 4

1.-

2RC 2 Q (.1Q1(


18/38

18


19/38

T.EORY:

The timers is a highly sta!le device for generating accurate time delay oroscillation. % single timer can provide time delay ranging from microseconds tohours #hereas counter timer can have a ma imum timing range of days.

%n asta!le multi vi!rator is a square #aveform generator. +orcing the Op


20/38

EX: NO: SOLDERIN* AND C.EC/IN* CONTINUITY

DATE:

Aim:

To practice soldering of plates and #ires

Too$s Require :

1. =oldering iron

2. =older and

3. +lu

T!eor":

So$ erin%:

=oldering is the process of @oining thin metal plates or #ires made of steel, copper

or !rass. t is very commonly used to @oin #ires in electrical #or" and mount electronic

components on a circuit !oard. The @oining material used in soldering is called as solderor filler rod. %n alloy of tin and lead is commonly used as the solder. The flu is used to

clean the surface of the platesS#ires to !e soldered. %luminium chloride or /inc chloride

is commonly used as flu . % good soldering iron is a varia!le temperature setting type

#ith interchangea!le irons and tips. The tip should !e removed regularly to prevent

o idation scale from accumulating !et#een the heating element and the tip.

Pro#e ure:

1. The surface to !e soldered is cleaned and flu applied.

2. The soldering iron is heated to the required temperature.

The soldering iron melts the solder rod and a thin film of solder spreads over the surfaceto @oin the platesS#ires.

20


21/38

So$ erin% Simp$e E$e#troni# Components:

21


22/38

% printed circuit !oard 'NC$* consists of copper strips and pads !onded to a

plastic !oard. The copper strip is the net#or" of interconnecting conductive path. Deads

of components mounted on the !oard are inserted through holes on the !oard and the

conductive copper. These leads are soldered to the copper at the end of the hole. f

e cessive heat is applied to copper, it may get lifted from the !oard or the components on

the !oard get damaged. =oldering pencil gun of a!out 3( :atts is used to heat the

@unction. The surface of copper !onded to the !oard should !e properly prepared and

cleaned !efore soldering. +lu is applied on circuits and component leads.Chec" the conductive strips and pads on the !oard !efore soldering. %void e cess

solder to prevent t#o copper paths from !ridging. :hen solder glo!ules form on the

@unction area, remove them !y cleaning the soldering tip using a cloth.

Chec"ing Continuity0

The continuity of a #ire conductor #ithout a !rea" has practically /ero ohms of

resistance. Therefore, an ohmmeter may !e used to test continuity. To test continuity,

select the lo#est ohm range. % #ire may have an internal !rea", #hich is not visi!le due

to insulation, or the #ire may have a !ad connection at the terminals. Chec"ing for /ero

ohms !et#een any t#o points tests the continuity. % !rea" in the conducting path is

evident from the reading of infinite resistance.

n a ca!le of #ires, individual #ires are identified #ith colours. Consider the

figure, #here the individual #ires are not seen, !ut you #ish to find the #ire that

connects to terminal %. This is done !y, chec"ing continuity of each #ire to terminal %.

The #ire that has /ero ohms is the one connected to this terminal. Continuity of a longca!le may !e tested !y temporarily short


23/38

E$e#troni# Components

Resistor C&pitor

PN Dio e Tr&nsistor

23


24/38

Inte%r&te Cir#uit 0IC1

EX: NO: ASSEM-LIN* ELECTRONIC COMPONENTS ON

DATE: A PC- AND TESTIN*

Aim:

To assem!le electronic components on a NC$ and test it

Too$s Require :

1. =oldering iron

2. =older and

3. +lu


1. NC$ and

2. ?lectronic Components

Pro#e ure:

The electronic components are carefully assem!led as per the circuit design. Theassem!ling of electronic components on a NC$ involves the follo#ing steps.

Component Le& Prep&r&tion:

Components such as capacitors have leads and are !ent carefully to mount on

NC$. The lead !ending radius should !e appro imately t#o times the diameter of the24


25/38

lead. The !ent leads should fit into the holes perpendicular to the !oard, so that the stress

on the component lead @unction is minimi/ed. =uita!le !ending tools may !e used for

perfect !ending. Deads are !ent and assem!led on !oard in such a #ay that the polarity

sym!ols are seen after mounting the component.

25


26/38

Component Mountin%:Components are mounted on one side of the !oard and leads are soldered on the

other side of the !oard. The components are oriented !oth hori/ontally and vertically !ut

uniformity in reading directions must !e maintained. The uniformity in orientation of

diodes, capacitors, transistors, C s etc. is determined at the time of NC$ design.

Components dissipating more heat should !e separated from the !oard surface.

M&nu&$ Assem'$" o) Components:

The components to !e assem!led on a NC$ are arranged conveniently. The !oard

to !e assem!led is held in a suita!le frame and the components are "ept in trays or !ins.

The insertion tools, if required, must !e "ept in the easy reach of the #or"er. The #or" is

divided depending on num!er of parts to !e assem!led and the si/e of each part. The

num!er of different components to !e assem!led for one #or"er should not !e more than

2(.

Inspe#tion &n Testin%:

The components assem!led on the NC$ are tested !efore they are soldered to the

!oard. t is a common practice to have the assem!led !oards chec"ed prior to soldering.

%n assem!ly inspector is located at the end of the assem!ly line for inspection. The

inspection includes verifying component polarity, orientation, value and physical

mounting.

26


27/38


28/38

PC- C$e&nin%:

The soldered NC$ may have contaminants that could cause trou!le during the

functioning of the circuit. The contaminants include flu and chips of plastics, metals,

and other materials. Aence, the NC$ must !e cleaned !efore use. % #ide range of

cleaning media is availa!leI usually chemicals such as acetone and alcohols are used.

28


29/38

Resu$t:

The electronic components are assem!led on NC$ and are tested.

Cir#uit i&%r&m :0 .&$) 2&3e re#ti)ier 2it! #&pitor1

29


30/38

EX: NO: 4 MEASUREMENT OF RIPPLE FACTOR FOR DATE: .ALF56A(E AND FULL56A(E RECTIFIER

Aim:To study half


31/38

The process of converting %C voltage and current to &irect current is called rectification.%n electronic device that offers a lo# resistance to current in one direction and a highresistance in the other direction is capa!le of converting a sinusoidal #aveform into aunidirectional #aveform. &iodes have this characteristic, #hich ma"es it a usefulcomponent in the design of rectifiers. n order to achieve a constantSpure &C voltage at theoutput, filtering should !e done to the pulsating &C output of the rectifier. The outputvaries #ith the variation in %C mains. Aence a voltage regulator is used to maintain theoutput voltage at the same value.

Mo e$ *r&p!:

Input 6&3e Form

.&$) 6&3e Re#ti)ier Output

31


32/38

Fu$$ 6&3e Re#ti)ier Output

&iodes are used in a rectifier circuit to convert %C into &C. :hen only one half

of the %C cycle is rectified, it is "no#n as half


33/38

3. Connect CRO across load.

-. eep the CRO s#itch in ground mode and o!serve the hori/ontal line andad@ust it to the ((*. :here > is num!er of ((

resistances connected in parallel.

3. Nlot the graph dc 8s ripple pea" to pea".

-. The a!ove steps are repeated for the various values of capacitance.

33


34/38

Resu$t:

Thus the Aalf


35/38

( 1 1 (

1 ( 1 (

1 1 ( 1

ADDITIONAL EXPERIMENT

EX: NO: 8 .ALF ADDER , FULL ADDER

DATE:

Aim:

To design and construct a half adder and a full adder using suita!le logic gates andto verify their truth ta!le


C -32'OR ate*

C -(9'%>& ate*

C -97'?


36/38

t#o !its i.e. the sum !it and a carry !it. Thus this circuit needs t#o !inary inputs and

t#o outputs. The inputs are designated as addend and augend.

The $oolean e pression for sum and carryare0 =um, = 4 %$L K %L$

= 4 % $Carry, C 4 %.$

#here % J $ are the input varia!les and = J C are the output varia!les. Thus to get the

output sum an OR gate is used. To get the output carry an %>& gate is used.

Fu$$ A er

Trut! T&'$e )or Fu$$ A er

A en Au%en C&rr"5in Sum C&rr"5 out

36


37/38


38/38

Fu$$ A er

% Com!inational circuit that performs the addition of three !its is called as a full adder.

The circuit consists of three inputs and t#o outputs. The input varia!les denote the augend,

addend and carry from the previous stage. =um and carry are the outputs.

The $oolean e pressions for the outputs are0

=EM, = 4 % $ Cin

C%RR6, Cout4'% $*.Cin K %.$

:here and y are the addend J augend and / is the carry from the previous stage i.e. the thirdinput.

Pro#e ure:

1. Connections are given as per the logic diagram.

2. =upply and ground connections are given to all the Cs according to their pin

diagrams.

3. nputs are applied !y using s#itches and the outputs are o!served !y usingD?&s.

-. The truth ta!le for the given function is verified for all the inputcom!inations.

Resu$t:

Thus the half adder and full adder circuits are designed #ith their truth ta!les verified

eng prac lab manual

Documents

Transcript of eng prac lab manual