Enabling DRIE processes for high potential MEMS products · 2019. 6. 6. · Enabling DRIE processes...

Enabling DRIE processes for high potential MEMS products

Michel PUECH October 12th 2006

AVS-PUEG-meeting Oct, 12th 2006 Page 2 All rights reserved © 2006, Alcatel

Outline

› Introduction• who we are ?• market and applications

› DRIE for MEMS• Bosch Process• High etch rate• Super High Aspect Ratio• Aspect Ratio Dependent Etching

› Conclusion• from MEMS to smart Systems integration


Part of a worldwide leader, high technology, Multinational corporation

• World’s leading Communication Group• >21 B$ (2005 sales)• >81 000 employees world-wide

FCGFixed

Communications Group

MCGMobile


PCGPrivate


Enterprise Solutions

Space SolutionsTransport Solutions

Integration & Services

AlcatelMicro Machining System

(AMMS)

P. Russo

S. Tchuruk

100%

100%

AlcatelVacuum

Technology

196 M€(2005 sales)

Alcatel Lucent


AMMS Global network...Market proximity, competence & optimized cost

66666 666

66

6 77AVP Fremont

(CA), USA

AVP Hingham (MA), USA

ASPL Singapore

AVTT Taiwan

AVTK Korea

AVTJ Japan

AVTS Shanghai

AVTFFrance

(Headquarters)

AVT UKAVT NL

AHV Germany

AVS Italy

6Sales & ServiceMMS Sales, Service & Application Lab.

6AVP Tempe

USA


AMMS HDP Technologies

› AMMS Patented Plasma source• De-coupled plasma process chamber• Low temperature plasma• High uniformity on large diameter• Design for uniform and high gas flow rate

Plasma potential mapping

0

2

4

6

8

10

12

14

16

0 50 100 150 200 250 300

Position (mm)

Plas

ma

pote

ntia

l (V)


Markets and Technologies… MEMS Market

› Deep Etching Technique is Key to address the 3rd Dimension

Inertial Sensors

MEM

S

A common use of ...

Deep Etching

Ink Jet Printer Heads

Silicon microphones

RF Mems


Bosch Process

Si

Si

Si

SF6 Plasma

C4F8 Plasma

SF6 Plasma

Thin fluoro-carbon polymer film (passivation)

F + ions SiF4

-CF2-


MEMS: Silicon microphones

› Accurate depth control› Etching of large silicon surfaces› High uniformity at high etch

rate ( >8µm/mn)


Technology leadership

Being first to push Bosch process limits and bring into market cost effective high etch rate capabilities (I-Speeder project 2001- cooperation with Robert Bosch)

Introducing MEMS specific handling and clamping solutions

The only OEM providing both Cryogenic and room temperature etching capabilities

0

10

20

30

40

50

60

020406080100Open area (%)

Etch

rate

(um

/min

)2002

2006

2007


Coutersy of Robert BoschCoutersy of Robert Bosch

MEMS: Inertial sensors

› Vertical profile control› High uniformity at high etch rate› Higher Aspect Ratio› Etching of large and narrow

features with controlled ARDE


Limitations

› Improper removal of bottom polymer layer

With standard “Bosch” process Aspect Ratio limited at 20

A.R↑ A.R↑ A.R↔ A.R↓


Standard ways of improvement

› Decrease process pressure, increase ion energy, ion flux

› Improved Aspect Ratio up to 30 but!› Decrease of etch rate and/or selectivity

0

2

4

6

8

10

0 5 10 15 20 25 30

Aspect ratio

Etch

rate

(µm

·min

-1) Basic process

150 V bias 140 sccm3 x ion flux 140 sccmHalf pressureKnudsen model


New way of improvement

› O2 Plasma removes polymer 5 time faster than SF6!!› [Polymer/Si]SF6 >1

C4F8 Plasma

SF6 Plasma O2 Plasma

0

2

4

6

8

10

12

14

0 20 40 60 80 100

¦ Bias Voltage¦ (V)

Etch

rate

(nm

·s-1

)

OxygenSulfurhexafluoride

Polymer layer


Process results

New Alcatel process with optimal polymer removal

0.4µm 0.5µm 0.6µm 1.0µm

Aspect Ratio > 60


Patented Super High Aspect Ratio Process

Trench Width: 0.374 µmDepth: 40.1 µm

Aspect Ratio >100

By courtesy of ESIEE - Paris


ARDE in DRIE Silicon Etching

ARDE is the physical effect where the etch rate decreases when increasing the aspect ratio.• Structures with different

dimensions have non uniform etch rate.

• Complex devices cannot be made– Substrate with etch stop layer ⇒SOI

wafers.– High over etch time to complete the

etching of the narrow structures.


WHY ARDE ?

› Radical’s Depletion• Knudsen transport

› Ion Depletion• Side wall scattering• Electronic deflection• Angular distribution

SiO2 Mask

CrystallineSilicon

Sidewallpassivationlayer

Fluorine radicals

EnergeticIons


–Substrate Holder

–RF–PowerSupply

–Gas–Inlet

–Source

–Dielectric–Cylinder

–Matching–Network

–Diffusion–Chamber

Experimental Setup

› AMS 200 “I-Speeder”

› Alcatel test wafers : trench widths 200/10 µm, 20% Si exposed area

› “Bosch” Process:Time multiplexed etch/passivation

› “ARDE” = (ER max - ER min)/ER max


35

40

45

0

5

10

15

20

25

30

50

00.10.20.30.40.50.6

AR

DE

(%)

ARDE=ARDE=18 %18 %max ER= 4.4 max ER= 4.4 µµm/minm/minmin ER = 3.6 min ER = 3.6 µµm/m/mnmn

Ion Flux (a.u.)

Ion Flux Effect

ARDE=ARDE=45 %45 %max ER = 7.1 max ER = 7.1 µµm/minm/minmin ER = 3.9 min ER = 3.9 µµm/m/mnmn


Passivation HighLow

AR

DE

(%)

0

5

10

-15

Passivation Control

ARDE= < 1 %max ER = 3µm/min

ARDE=12 %max ER = 3.2µm/min

ARDE= -13 %max ER = 2.9µm/min


Conclusion … from MEMS to Smart System Integration

Semiconductor

Manufacturing Tools 3D• Deep Etching• Lithography• Bonding , …

MEMS

3D SC•3D Chips•Wafer Level Packaging

400um10um

Courtesy of ST Microelectronics

Courtesy of Philips

Courtesy of Toshiba

www.adixen.com

Enabling DRIE processes for high potential MEMS products · 2019. 6. 6. · Enabling DRIE processes...

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