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Transcript of Embedded Design for Power Saving Pir,Illum,Tem,Solar
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CONTENTS
CHAPTER 1: INTRODUCTION
Introduction ……………. 3
Aim of the Project ……………. 4
Silent features of Project ……………. 4
CHAPTER 2: MAIN BLOCK DIAGRAM
Block Diagram ……….……. 5
Description ……….……. 6
2.2 PIR Sensor ……………. 10
2.3 Illumination Control ……………. 13
2.4 Room Temperature Conditioner ………….... 18
2.5 IR Operated device control …………..... 25
2.6 Solar Tracking System ……………. 29
CHAPTER 3: PIN DISCRIPTION AND ITS ARCHITECTURE ………......... 32
3.1 PIN DISCRIPTION AND ARCHITECTURE OF 89C51 ……………. 32
3.2 ARCHITECTURE OF PIC MICROCONTROLLER ……………. 38
CHAPTER 4: POWER SUPPLY UNIT ……………. 42
CHAPTER 5: SENSOR’S ……………. 44
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CHAPTER 6: PROGRAM FOR MICROCONTROLLER ATMEL 89C51 ……………. 50
CHAPTER 7: FLOW CHART FOR MC 89C51 ……………. 65
CHAPTER 8:ADVANTAGES, DISADVANTAGES, FUTURE DEVELOPMENT ………. 68
CHAPTER 9: BIBLOGRAPHY ….………… 70
CHAPTER 10: IC DETAILS & DATASHEETS ...…….….… 71
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CHAPTER: 1
INTRODUCTION
In this sophisticated world every activity is getting atomized with the help of embedded concepts.
All the way so far we have seen that any controlling of parameters, utilizing natural resources for
circuit operation, preventing the devices from electric disorders, optimizing etc…, is carried out with
analogue instruments. So we decided to develop an electronic aid which is helpful for the above
purpose which is called as EMBEDDED DESIGN FOR POWER MONITORING AND
OPTIMIZATION.
In automation and instrument building we often are confronted by the necessity to precisely control
illumination of light, rotational speed of a fan, controlling the devices depending on the detection of
human being presence in the room or not, device switching using remote. Their illumination can be
controlled by switching ON the number of LED’S as per requirement; depending on the room
temperature speed of the FAN or conditioning unit of AC can be controlled as a function of applied
voltage. Here is a project for EMBEDDED DESIGN FOR POWER MONITORING AND
OPTIMIZATION.
It monitors the surrounding environment and electrical condition depending on those parameters the
embedded system will control the operation of the devices. like, if the room temperature is increased
more than the desired temperature the system will automatically controls the speed of the fan, in
other condition it will check for the natural light intensity depending on that microcontroller will
control how many set of LED’s should be switched ON, similarly one of the main feature of this
project is PIR sensor, this sensor is used to detect presence of anybody in the room or not with
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
respect to that the system will control the action of devices such that switching ON/OFF and this
project works on the dc power supply, in presence of sunlight the circuit will work with power
generated by the solar cells else with the main power supply.
This particular machine is a Embedded one, so that it is highly efficient and it is also packed with a
highly interactive and user friendly components with a wide application. This Cost effective unit is
surely a good example of technology being used for a very productive purpose. The unit being
flexible to use also renders the best of features found in some of the commercially available units.
AIM OF THE PROJECT:
“TO SAVE ENERGY, MAKE EFFICIENT UTILIZATION OF POWER”.
SILENT FEATURES OF PROJECT:
1. All the components required are easily available.
2. It is accurate [Errors are nullified] & precise as it is Digital.
3. It is much Economical compare to other analogue systems.
4. Manual errors can be avoided to some extent.
5. Automatically controlled & Easy to use.
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CHAPER: 2 MAIN BLOCK DIAGRAM
LDR LED
TEMP
SENSOR
Fig .1
5
Comparator
MC
RELAY
RELAY
&
TRIAC
FAN
PIR
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
DESCRIPTION
The above block diagram shows the complete overview of project.
This project consists of following blocks ….
1) Human detection using PIR sensor
2) Illumination control.
3) Room temperature conditioner.
4) Solar tracking system.
As listed above, these are the main features of our project EMBEDDED DESIGN FOR
POWER MONITORING AND OPTIMIZATION.
In the above block diagram we can observe that it consists of different stages for all the
above stages explanation goes like this
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
2 PIR SENSOR
LED’S
Fig. 5
A PIR (passive infrared) detector coupled with an electric light is now widely
used for intruder protection. PIR are also available as stand-alone units which
usually have a switched output for controlling external loads. To enable the PIR
detector to work in daylight also, you have to cover the internal light/darkness
sensor (usually an LDR).
The PIR detector used in this circuit reacts to fast temperature variations caused by
the movement of people or animals in an enclosed space. All mammals radiate a
certain amount of heat, and it is this that causes local variations in temperature.
The radiant heat energy occupies the electromagnetic spectrum between light and
7
MC
89C51
RELAY &
TRIAC
PIR
FAN
RELAY
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
radio waves, i .e. 0.74….300m, which is usually called the infra-red region. The
radiant energy is picked up by a Fresnel lens, at the focus of which is a double
differential pyroelectric sensor. The detector is largely unaffected by other
electrical radiation. Also, it does not react to movement outside the guarded space.
METHODOLOGY:
The space to be monitored is divided by the lens into a number of zones.
The number of zones depends on the number of segments of which the lens is
composed. When somebody moves from one zone to other, there is a change in
temperature which is collected by the lens as a variation in radiant energy. As the
focus of the lens is a pyroelectric sensor which reacts to such a change by
generating a small electric signal. That signal is processed and used to
actuate/deactivate the appliances.
CIRCUIT DIAGRAM OF REGULATED DC POWER SUPPLY
FOR PIR SENS
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 6
2.3 ILLUMINATION CONTROL:
LED’S
LDR
Fig. 6
Fig. 7
9
RELAY
POWER SUPPLY WHEN SUPPLY IS THERE
COMPARATOR
MC
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
METHODOLOGY :
As we observe in our daily life knowingly or unknowingly we leave lights, fan and other
appliances running which leads to a lot of power wastage.
In order to overcome the above disadvantage we have developed this project where by in this
illumination control is one part of it. Here in this stage depending on the natural light entering into
the room or office with the help of LDR the intensity is measured and given to the COMPARATOR
which will convert its equivalent digital signals at its output pin and those signals are fed to
microcontroller 89C51, here the decision is made how many number of LED’s to be switched ON to
maintain the room/office lights in required manner.
Depending on the natural light intensity number of LED should be switched ON and OFF. This
operation should be performed using COMPARATOR and MC. When ever the light intensity in a
room varies depending on that a digital signal has to be generated using COMPARATOR which
should be given to the microcontroller. In microcontroller a decision has to be made that how many
LED should turn ON or OFF. In above fig 2 a LED array is shown in 4 numbers, because a single
LED array consists of 9 LED’s therefore totally 3 1.
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
LED ARRAY 1 LED ARRAY 2 LED ARRAY 3 LED ARRAY 4
Depending on the natural light intensity these array should be controlled. If intensity of natural light
is minimum then only LED array 1 should glow (9 LED’s), if there is no natural light then complete
4 LED array should glow. And if there is a continuous variation in natural light intensity then
depending up on variation in light intensity either LED arrays are selected. It means at a time it may
be single or double or treble or all LED arrays may be switched ON and OFF.
BUFFER AND DRIVER
INTRODUCTION:
HEX BUFFER / CONVERTER [NON-INVERTER] IC 4050: Buffers does not affect
the logical state of a digital signal (i .e. logic 1 input results into logic 1 output
where as logic 0 input results into logic 0 output). Buffers are normally used to
provide extra current drive at the output, but can also be used to regularize the
logic present at an interface. And Inverters are used to complement the logical state
(i .e. logic 1 input results into logic 0 output and vice versa). Also Inverters are
used to provide extra current drive and, like buffers, are used in interfacing
applications. This 16-pin DIL packaged IC 4050 acts as Buffer as-well-as a Converter. The input
signals may be of 2.5 to 5V digital TTL compatible or DC analogue the IC gives 5V constant signal
output. The IC acts as buffer and provides isolation to the main circuit from varying input signals.
The working Voltage of IC is 4 to 16 Volts and propagation delay is 30 nanoseconds. It consumes
0.01 mill Watt power with noise immunity of 3.7 V and toggle speed of 3 Megahertz.
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
ULN 2003: Since the digital outputs of the some circuits cannot sink much current, they are not
capable of driving relays directly. So, high-voltage high-current Darlington arrays are designed for
interfacing low-level logic circuitry and multiple peripheral power loads. The series ULN2000A/L
ICs. Drive seven relays with continuous load current ratings to 600mA for each input. At an
appropriate duty cycle depending on ambient temperature and number of drivers turned ON
simultaneously, typical power loads totaling over 260W [400mA x 7, 95V] can be controlled.
Typical loads include relays, solenoids, stepping motors, magnetic print hammers, multiplexed LED
and incandescent displays, and heaters. These Darlington arrays are furnished in 16-pin dual in-line
plastic packages (suffix A) and 16-lead surface-mountable SOICs (suffix L). All devices are pinned
with outputs opposite inputs to facilitate ease of circuit board layout.
The input of ULN 2003 is TTL-compatible open-collector outputs. As each of these outputs can sink
a maximum collector current of 500 mA, miniature PCB relays can be easily driven. No additional
free-wheeling clamp diode is required to be connected across the relay since each of the outputs has
inbuilt free-wheeling diodes. The Series ULN20x3A/L features series input resistors for operation
directly from 6 to 15V CMOS or PMOS logic outputs.
1N4148 signal diode: Signal diodes are used to process information (electrical signals) in circuits, so
they are only required to pass small currents of up to 100mA. General purpose signal diodes such as
the 1N4148 are made from silicon and have a forward voltage drop of 0.7V.
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
2.4 ROOM TEMPERATURE CONDITIONER
TEMP
SENSOR
Fig. 9
13
COMPARATOR
MCRELAY
&
TRIAC
FAN
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 10
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
FAN DRIVER STAGE
The Counter & Switching section sends the signals to this Fan Motor Driver section to run the AC
Motor with required speed. This section has a Triac and Diac combination, which supplies regulated
Alternating Current to the Regulator circuitry of a fan.
INTRODUCTION:
POWER CONTROL: Many applications of electronics involve the control of appreciable levels of
voltage and/or current. Typical examples in the domestic world are the motor speed controllers
found in washing machines and the lamp dimmers which allow us to control the levels of
illumination in our homes.
THYRISTORS: Thyristors provide an alternative means of switching a high-voltage/high current load
from a much smaller triggering current source. Thyristors (or ‘silicon controlled rectifiers’ as they
are sometimes called) are three terminal devices, which can switch very rapidly from a conducting to
a non-conducting state. In the ‘OFF’ state, the Thyristors exhibits negligible leakage current, whilst in
the 'ON’ state the device exhibits very low resistance. This results in very little power loss within the
Thyristors even when appreciable power levels are being controlled.
Once switched into the conducting state, the Thyristors will remain conducting (i.e. it is latched in
the ‘ON’ state) until the forward current is removed from the device. It is important to note that, in
d.c applications, the necessities the interruption (or disconnection) of the supply before the device
15
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
can be reset into its non-conducting state. However, where a Thyristors is used with an alternating
supply, the device will automatically become reset whenever the mains supply reverses. The device
can then be triggered on the next half-cycle having correct polarity to permit conduction. Like
their conventional silicon diode counterparts, Thyristors have anode and cathode connections.
Control is applied by means of a third gate terminal and the device is triggered into the conducting
(‘ON’ state) by applying a current pulse of sufficient magnitude (and rise time) to this terminal.
TRIGGERING: While designing circuit using Thyristors as power control elements, trigger pulses
should have the fastest possible rise times. Thyristors will turn ON faster (and power dissipation
within the device will be minimized) as gate current is increased. Signals with slow rise times or
poorly defined edges are generally unsatisfactory for triggering purposes. In a.c. applications, the
Thyristor triggering circuit should be designed so that it will provide effective triggering over a
sufficiently wide angle of the applied a.c. supply voltage. Failure to observe this rule will generally
result in an inadequate range of control.
TRIACS: Triacs are a refinement of the Thyristor which, when triggered, conduct on both positive
and negative half cycles of the applied voltage. Triacs have three terminals: main terminal one
(MT1), main terminal two (MT2) and gate (G). Triacs can be triggered by both positive and negative
voltages applied between G and MT1with positive and negative voltages present at MT2 respectively.
16
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
By virtue of the symmetry in triggering, Triacs thus provide a means of controlling a.c. voltages over
both positive and negative half-cycles. Thyristors, on the other hand, can only provide control on
one, or other, of the half-cycles.
DIACS: In order to simplify the design of triggering circuits, a Triac is often used in conjunction
with a Diac. This device is somewhat similar to a Zener diode having bi-directional properties. A
typical Diac conducts heavily when the applied voltage exceeds approximately + 32V. Once in the
conducting state, the resistance of the Diac falls to a very low value and thus a large value of current
will flow (sufficient to trigger the Triac to which it is connected).
Circuit Description:
Triac’s make excellent variable a.c. power control devices. The present circuit is capable of handling
a resistive load of up to 1kW. At higher power levels (i.e. 150W plus) the Triac will require a heat
sink.
The present circuit shows a simple phase-triggered AC motor controller. Input from Counter &
Relay section and C1 are wired together as a combined variable potential divider and variable phase
shift network. The Diac is used as a simple trigger device that fires when the C1 voltage rises to
roughly 35 V [in either polarity] and then partially discharges C1 into the Triac gate, thus triggering
the Triac on. The Diac turns off automatically when the C1 voltage falls below 30 V or so.
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EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CIRCUIT DIAGRAM OF FAN DRIVER SECTION
Fig. 12
Parts List:
SEMICONDUCTORS
D1 ER900 DIAC 1
T1 BT 136 TRIAC 1
R1 68 K Ohm ¼ Watt 1
R2 270 Ohm ½ Watt 1
R3 10 K Ohm ½ Watt 1
18
T1
P1
R
R1 Input from Counter & Switching sectionR3
R2
Fan Regulator
C1 C2 C3
D1
230 V AC
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
P1 100 K Ohm Preset 1
CAPACITORS
C1 & C2 300 nF / 400V 2
C3 33nF/ 400 V 1
When Input from Counter & Switching section is very low negligible potential divider action or
phase shifting takes place, and the C1 voltage closely follows that of the a.c. power line until the
trigger voltage of the Diac is reached, at which point the Triac fires and turns ON the motor with
predefined speed and removes all drive from the Input from Counter & Relay section-C1 network.
The Triac thus fires shortly after the start of each half-cycle under this condition, and almost full
power is applied to the load.
When Input from Counter & Switching section is very high, on the other hand, the potential divider
action is such that the peak voltage on C1 only just reaches the 35 V needed to trigger the Diac, and
the phase shift of C1 is close to 90°. Since the peak of a half-wave occurs 90° after the start of the
half-cycle, the net effect of the low voltage and near-90° phase shift on C1 is to delay the firing of
the Triac by about 170°. Under this condition, therefore, the Triac does not fire until 10° before the
end of each half-cycle, and negligible power is applied to the load. Thus, the Input from Counter &
Relay section-C1 and Diac network enables the firing of the Triac to be delayed between roughly
10° and 170° in each half-cycle, and efficient variable power control is available.
Since the Triac switches from OFF to ON very sharply, and switches fairly high currents, the
switching waveform is very rich in harmonics. So to keep the higher harmonics out of the supply
line the circuit must be incorporated with a filter. And also ensure that when Input from Counter &
Switching section is set near its minimum value, the charge currents flowing to C1 via Input from
19
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Counter & Relay section are not so large that they damage R4. The preset P1 is the charge-current
limiting resistor and R2-C3 form the harmonic filter.
The resistor Input from Counter & Relay section has a considerable hysteresis or backlash, i.e., load
will not start to go ON again until heated [whose internal resistance is decreased] resistor [any of
VR1 to VR4 variable resistors of Counter & Switching Stage] restores its original [designed] value.
So, to over this backlash effect, the charge of C1 is fed to slave capacitor C2 via the relatively high
resistance of P1. C1 is slightly higher voltage than C2, and C2 fires the Diac once its voltage reaches
35V. Once the Diac has fired it reduces the C3 potential briefly to 30 V, but C3 then partially
recharges via C1 and P1. Little net change takes place in the C3 voltage as a result of the Diac firing,
and the circuit thus gives very little backlash. This little backlash can be further reduced to almost
zero by wiring Resistor R3 in series with the Diac to limit the C3 discharge voltage.
20
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
2.6 SOLAR TRACKING SYSTEM
SOLAR CELL
SOLAR TRACKING
LDR LED’S
21
MC
RELAY
COMPARATOR
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CURRENT FLOWING FROM BATTERY WHEN POWER FAILURE Fig. 18
Since human evolution, mankind has exploited naturally available resources such
as Wind, Water & Solar energy. The availability of resources restricts the use of
Wind and Water energies as alternative power sources. But Sun is available
There are some hopes that the sun will become a main source of energy in the
21 s t century. By then, sources of oil will be almost exhausted and will only play a
minor part in the supplying of energy. The present interest in solar energy is
therefore not surprising. Some work has already been done with solar cells and
solar panels. However, these only operate with optimum performance when
positioned exactly at right angles to the sun. Unfortunately, this situation is not
usual in our latitudes unless the solar panels are rotated with respect to the sun.
The efficiency of a solar panel system can be improved if the panels track the sun,
and remain as long as possible at the most favorable angle of incidence.
The project consists of “SOLAR TRACKING SYSTEM” is an attempt to achieve
maximum utilization of the solar energy. This is achieved by tracking the
movement of the Sun, and keeps charging solar cells below the Sun’s availability
zone for maximum time. By this one can get the maximum utilization of the Sun
presence.
Most of the energy that we get from the greatest reservoir of energy, the Sun,
remains unused. The only way to store the energy from the sun is to convert it into
22
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
electrical form and then using this electrical signal to charge batteries and thus
store the energy in chemical form. For this we make use of solar panels consisting
of solar cells. The solar cell gives an electrical output which is proportional to the
intensity of light falling over it .
In case of power cut a illumination stage will get the supply from the battery
which is charged with the help of solar cells. As a future development we can use
heavy batteries with invertors to drive the other appliances.
23
+VccCOMMON
STEPPER
MOTOR
D1
D2
D3
D4
LE
D 1
LED 2
LED 3
LED
4
R9
R10R11
R12R
13
R14R15R16
T5
T6
T7
T8
R5
R6
R7
R8
T1
T2
T3
T4
R1
R2
R3
R4
I/P FROM
89C51
COUNTER
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 18
CHAPTER: 3
PIN DISCRIPTION AND ITS ARCHITECTURE
3.1 PIN DISCRIPTION AND ARCHITECTURE OF 8051
Introducing the Intel’s Microcontroller 89C51
FEATURES
• 8K Bytes of In-System Reprogrammable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Programmable Serial Channel
DESCRIPTION
The AT89C52 is a low-power, high-performance
CMOS 8-bit microcomputer with 8K bytes of Flash
programmable and erasable read only memory
(PEROM). The device is manufactured using Atmel’s
high-density nonvolatile memory technology and is
24
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig.19
compatible with the industry-standard 80C51 and 80C52 instruction set and pin out.
The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional
nonvolatile memory programmer. By combining a
25
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 20
versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful
microcomputer which provides a highly-flexible and cost-effective solution to many embedded
control applications.
The AT89C51 provides the following standard features: 4K bytes of Flash, 256 bytes of RAM, 32
I/O lines, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full-duplex
serial port, on-chip oscillator, and clock circuitry. In addition, the AT89C51 is designed with static
logic for operation down to zero frequency and supports two software selectable power saving
modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning.
The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip
functions until the next hardware reset.
Pin Description
VCC
Supply voltage.
GND
Ground.
DC Characteristics
Operating Temperature.................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage............................................ 6.6V
26
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
DC Output Current...................................................... 15.0 mA
27
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
28
COMPLETE CIRCUIT DIAGRAM [MOTHER BOARD] 89C51 +Vcc
P0.7
32
P0.6
33
P0.5
34
P0.4
35
P0.3
36
P0.2
37
P0.1
38
P0.0
39
P2.7
28
P2.6
27
P2.5
26
P2.4
25
P2.3 24
P2.2 23
P2.1 22
P2.0
21 1
P1.7
8
P1.6
7
P1.5
6
P1.4
5
P1.3
4
P1.2
3
P1.1
2
P1.0
1 1
19 XTAL1
18 XTAL2
30 pF
12 MHz
30 pF89C51
VSS
20
29 PSEN
30 ALE
31 EA
9 RST
+VCC
10 MFD/63V
20KΩ RESET
SWITCH
40
VCC
8 x 2.2 KΩ
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
RD
WR
T1
T0
INT1
INT0
TXD
RXD
17
P3.7
16
P3.6
15
P3.5
14
P3.4
13
P3.3
12
P3.2
11
P3.1
10
P3.0
A15
A14
A13
A12
A11
A10
A9
A8
230 AC
X1 D1 & D2 IC1
+VCC
R1
D3C1 C2 C3
PORT 0
PORT 1
PORT 2PORT 3
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 21
29
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CIRCUIT DESCRIPTION:
The mother board of 89C51 has following sections: Power Supply, 89C51 IC, Oscillator, Reset
Switch & I/O ports. Let us see these sections in detail.
POWER SUPPLY:
This section provides the clean and harmonic free power to IC to function properly. The output
of the full wave rectifier section, which is built using two rectifier diodes, is given to filter
capacitor. The electrolytic capacitor C1 filters the pulsating dc into pure dc and given to Vin pin-
1 of regulator IC 7805.This three terminal IC regulates the rectified pulsating dc to constant +5
volts. C2 & C3 provides ground path to harmonic signals present in the inputted voltage. The
Vout pin-3 gives constant, regulated and spikes free +5 volts to the mother board. The allocation
of the pins of the 89C51 follows a U-shape distribution. The top left hand corner is Pin 1 and
down to bottom left hand corner is Pin 20. And the bottom right hand corner is Pin 21 and up to
the top right hand corner is Pin 40. The Supply Voltage pin Vcc is 40 and ground pin Vss is 20.
OSCILLATOR:
If the CPU is the brain of the system then the oscillator, or clock, is the heartbeat. It provides the
critical timing functions for the rest of the chip. The greatest timing accuracy is achieved with a
crystal or ceramic resonator. For crystals of 2.0 to 12.0 MHz, the recommended capacitor values
should be in the range of 15 to 33pf2. Across the oscillator input pins 18 & 19 a crystal x1 of
4.7 MHz to 20 MHz value can be connected. The two ceramic disc type capacitors of value 30pF
are connected across crystal and ground stabilizes the oscillation frequency generated by crystal.
I/O PORTS:
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
There are a total of 32 i/o pins available on this chip. The amazing part about these ports is that
they can be programmed to be either input or output ports, even "on the fly" during operation!
Each pin can source 20 mA (max) so it can directly drive an LED. They can also sink a
maximum of 25 Ma current.
Some pins for these I/O ports are multiplexed with an alternate function for the peripheral
features on the device. In general, when a peripheral is enabled, that pin may not be used as a
general purpose I/O pin. The alternate function of each pin is not discussed here, as port
accessing circuit takes care of that.This 89C51 IC has four I/O ports and is discussed in detail:
P0.0 TO P0.7
PORT0 is an 8-bit [pins 32 to 39] open drain bi-directional I/O port. As an output port, each pin
can sink eight TTL inputs and configured to be multiplexed low order address/data bus then has
internal pull ups. External pull ups are required during program verification.
P1.0 TO P1.7
PORT1 is an 8-bit wide [pins 1 to 8], bi-directional port with internal pull ups. P1.0 and P1.1 can
be configured to be the timer/counter 2 external count input and the timer/counter 2 trigger input
respectively.
P2.0 TO P2.7
PORT2 is an 8-bit wide [pins 21 to 28], bi-directional port with internal pull ups. The PORT2
output buffers can sink/source four TTL inputs. It receives the high-order address bits and some
control signals during Flash programming and verification.
P3.0 TO P3.7
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
PORT3 is an 8-bit wide [pins 10 to 17], bi-directional port with internal pull ups. The Port3
output buffers can sink/source four TTL inputs. It also receives some control signals for Flash
programming and verification.
PSEN
Program Store Enable [Pin 29] is the read strobe to external program memory.
ALE
Address Latch Enable [Pin 30] is an output pulse for latching the low byte of the address during
accesses to external memory.
EA External Access Enable [Pin 31] must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H upto FFFFH.
RST Reset input [Pin 9] must be made high for two machine cycles to resets the device’s
oscillator. The potential difference is created using 10MFD/63V electrolytic capacitor and
20KOhm resistor with a reset switch
3.2 ARCHITECTURE OF PIC MICROCONTROLLER
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 22
Micro-Controller IC PIC 16F505: This IC is pre-programmed to identify the signals it
receives at pin-4. The working voltage +Vcc is connected to pin-1 and pin-14 is made ground.
The program detects 256 diff signals and activates respective line of 8-channel amplifier stage.
Whenever it receives any signal at pin-4 [i.e. at input pin] it first checks whether it is a valid
command signal or not. If it found the received signal is a valid one, then decodes that RC5
coded signal back to original command signal. Then depends upon the command it activates the
corresponding line by making the respective pin HIGH. There are eight outputs coming out of
this PIC IC, viz., and pins 6, 7, 8, 9, 10, 11, 12, 13 & 14.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
The PIC16C505 from Microchip Technology is a low-cost, high-performance, 8-bit,
fully static, EPROM/ ROM-based CMOS microcontroller. It employs a RISC architecture with
only 33 single word/single cycle instructions. All instructions are single cycle (200 s) except for
program branches, which take two cycles. The PIC 16F505 delivers performance an order of mag-
nitude higher than its competitors in the same price category. The 12-bit wide instructions are
highly symmetrical resulting in a typical 2:1 code compression over other 8-bit microcontrollers in
its class. The easy to use and easy to remember instruction set reduces development time
significantly.
The PIC16F505 product is equipped with special features that reduce system cost and power
requirements. The Power-On Reset (POR) and Device Reset Timer (DRT) eliminate the need for
external reset circuitry. There are five oscillator configurations to choose from, including INTRC
internal oscillator mode and the power-saving LP (Low Power) oscillator mode. Power saving
SLEEP mode, Watchdog Timer and code protection features improves system cost, power and
reliability.
The PIC16F505 is available in the cost-effective One-Time-Programmable (OTP) version, which
is suitable for production in any volume. The customer can take full advantage of Microchip’s
price leadership in OTP microcontrollers, while benefiting from the OTP’s flexibility.
The PIC16C505 product is supported by a full-featured macro assembler, a software simulator, an
in-circuit emulator, a ‘C’ compiler, a low-cost development programmer and a full featured
programmer. All the tools are supported on I B M P C and compatible machines.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
3.2.1 Applications
The PIC16F505 fits in applications ranging from personal care appliances and security systems
to low-power remote transmitters/receivers. The EPROM technology makes customizing
application programs (transmitter codes, appliance settings, receiver frequencies, etc.) extremely
fast and convenient. The small footprint packages, for through hole or surface mounting, make
this microcontroller perfect for applications with space limitations. Low-cost, low-power, high-
performance, ease of use and I/O flexibility make the PIC16F505 very versatile even in areas
where no microcontroller use has been considered before (e.g., timer functions, replacement of
“glue” logic and PLD’s in larger systems, and coprocessor applications).
The PIC16C505 device has Power-on Reset, selectable Watchdog Timer, selectable code
protect, high I/O current capability and precision internal oscillator.
The PIC16C505 device uses serial programming with data pin RB0 and clock pin
3.2.2 PIN DIAGRAM WITH COMPARISION OF 16F505 vs
12F50X
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig.23
Here are some differences between the 12F50X and the 16F505:
12F508
512 words (12 bit), 25 bytes SRAM, 5 I/O ports + 1 Input pin.
one 8-bits timer, Max speed: 4Mhz and 33 instructions.
12F509
1024 words (12 bit), 41 bytes SRAM, 5 I/O ports + 1 Input pin. one 8-bits timer, Max speed:
4Mhz and 33 instructions.
16F505
1024 words (12 bit), 72 bytes SRAM, 11 I/O ports + 1 Input pin. one 8-bits timer, Max speed:
20Mhz and 33 instructions.
The only difference on this PIC is: more speed, more ports and more SRAM. Basically it can
replace a 12F508 or 12F509 if the project is already made. A good idea to take advantage of this,
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
is to replace a 12F509 with a 16F505 and use a 20Mhz Xtal. In that way, you can break the
4Mhz barrier of the 12F50X.
An important feature of the 16F505 is the register file Map. It is fully compatible with the
12F509. With four banks, the 16F505 can address more memory. Microchip also shows a sample
how to clear ram using indirect addressing.
As all microchip PICs, the INF register is not a physical register. Addressing INDF actually
addresses the register whose address is contained in the FSR register. Remember: FSR is a
pointer.
CHAPTER 4
POWER SUPPLY UNIT
The circuit needs two different voltages, +5V & +12V, to work. These dual voltages are supplied
by this specially designed power supply.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CIRCUIT DIAGRAM OF +5V & +12V FULL WAVE
REGULATED DC POWER SUPPLY
Fig.24
POWER SUPPLY
Parts List:SEMICONDUCTORS
IC1
IC2
7812 Regulator IC
7805 Regulator IC
1
1
D1& D2 1N4007 Rectifier Diodes 2
CAPACITORS
C1 1000 µf/25V Electrolytic 1
C2 to C4 0.1µF Ceramic Disc type 3
MISCELLANEOUS
X1 230V AC Pri,12-0-12 1Amp Sec Transformer 1
230AC
X1
C1
7812
D21
C2 C3
IC1
D11 9V
7805
C4
IC1
7805
+12V
+5V
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
CIRCUIT DESCRIPTION:
A d.c. power supply which maintains the output voltage constant irrespective of a.c. mains
fluctuations or load variations is known as regulated d.c. power supply. It is also referred as full-
wave regulated power supply as it uses four diodes in bridge fashion with the transformer. This
laboratory power supply offers excellent line and load regulation and output voltages of +5V &
+12 V at output currents up to one amp.
1. Step-down Transformer: The transformer rating is 230V AC at Primary and 12-0-12V,
1Ampers across secondary winding. This transformer has a capability to deliver a current of
1Ampere, which is more than enough to drive any electronic circuit or varying load. The 12VAC
appearing across the secondary is the RMS value of the waveform and the peak value would be
12 x 1.414 = 16.8 volts. This value limits our choice of rectifier diode as 1N4007, which is
having PIV rating more than 16Volts.
2. Rectifier Stage: The two diodes D1 & D2 are connected across the secondary winding of the
transformer as a full-wave rectifier. During the positive half-cycle of secondary voltage, the end
A of the secondary winding becomes positive and end B negative. This makes the diode D1
forward biased and diode D2 reverse biased. Therefore diode D1 conducts while diode D2 does
not. During the negative half-cycle, end A of the secondary winding becomes negative and end B
positive. Therefore diode D2 conducts while diode D1 does not. Note that current across the
centre tap terminal is in the same direction for both half-cycles of input a.c. voltage. Therefore,
pulsating D.C. is obtained at point ‘C’ with respect to Ground.
3. Filter Stage: Here Capacitor C1 is used for filtering purpose and connected across the rectifier
output. It filters the a.c. components present in the rectified d.c. and gives steady d.c. voltage. As
the rectifier voltage increases, it charges the capacitor and also supplies current to the load.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
When capacitor is charged to the peak value of the rectifier voltage, rectifier voltage starts to
decrease. As the next voltage peak immediately recharges the capacitor, the discharge period is
of very small duration. Due to this continuous charge-discharge-recharge cycle very little ripple
is observed in the filtered output. Moreover, output voltage is higher as it remains substantially
near the peak value of rectifier output voltage. This phenomenon is also explained in other form
as: the shunt capacitor offers a low reactance path to the a.c. components of current and open
circuit to D.C. component. During positive half cycle the capacitor stores energy in the form of
electrostatic field. During negative half cycle, the filter capacitor releases stored energy to the
load. The result of the addition of a capacitor is a smoothing of the FWR output. The output is
now a pulsating dc, with a peak to peak variation called ripple. The magnitude of the ripple
depends on the input voltage magnitude and frequency, the filter capacitance, and the load
resistance.
To describe the source of the voltage ripple, consider the performance of the filtered full
wave rectifier above. The input to the rectifier is a sine wave of frequency f. Let Vi be the full
wave rectified signal input to the filter stage of the rectifier and Vo be the output. Vi can be
approximated as the absolute value of the rectifier input, with frequency 2f.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 25: Output (Vi) and input (Vo) of a filtered full wave rectifier
In the time period from T0 to T1, the diode D1 (or D3, depending on the phase of the
signal) is forward biased since Vi > VC1 (approximate the forward biased diode as a short
circuit). The capacitor C1 charges and the voltage across the load R increases. From T1 to T2,
the diodes D1 and D2 are reverse biased (open circuit) because Vcap > Vi, and the capacitor
discharges through the load R with a time constant of RC seconds.
4. Voltage Regulation Stage: Across the point ‘D’ and Ground there is rectified and filtered d.c.
In the present circuit KIA 7812 three terminal voltage regulator IC is used to get +12V and KIA
7805 voltage regulator IC is used to get +5V regulated D.C. output. In the three terminals, pin 1
is input i.e., rectified & filtered D.C. is connected to this pin. Pin 2 is common pin and is
grounded. The pin 3 gives the stabilized D.C. output to the load. The circuit shows two more
decoupling capacitors C2 & C3, which provides ground path to the high frequency noise signals.
Across the point ‘E’ and
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
‘F’ with respect to ground +5V & +12V stabilized or regulated d.c output is measured, which
can be connected to the required circuit.
Note: While connecting the diodes and electrolytic capacitors the polarities must be taken into
consideration. The transformer’s primary winding deals with 230V mains, care should be taken
with it.
CHAPTER 5.
SENSOR’S
5.1 LX16C PASSIVE INFRARED SENSOR (PIR):
The product is an energy saving device automatic switch, it adopt integrated circuit and
precise detecting components.
It can be ON when one comes in the detection field and will off automatically after one
leaves the detection field..
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It can identify day and night automatically.
Its performance is very stable.
Can identify day and night automatically.
Ambient-light can be adjusted. so it will work at night and stops in the day time. The
consumer can adjust it freely.
Detection distance can be adjusted according to the local place.
Time delay can be adjusted vary to the place.
The light- time can be added automatically.
When one moves in the direction of the field when the lamp is lighting: it can compute
time once more and delay the light – time automatically after the sensor detects signal
once again.
Installation diversify: we can fit connection-line box,
connection-mouth,1/2″spiraling connection hand.SPECIFICATIONS:
Detection distance(<24 ˚c) : 2-11m(adjustable)
Detection range : 180˚
Power source : 180-240v/AC, 50-60 Hz
Rated load : 1200w (220v/ACMax)
Working temperature : -20˚ - +40˚c
Working humidity : < 93% RH
Time delay : 5 sec – 7 min, ±2 min
Ambient- light : < 10-2000
Lux adjust Installation height : 1.8m-2.5m
OPERATION:
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Sensitivity: turn the knob clock wise to raise its sensitivity and turn it anti clock wise to reduce
its sensitivity. Turn the knob to clock wise to last operating time and turn it anti clock wise to
shorten it.
Light control: turn the knob then this product can oprate in different ambient-light.(see the Fig.
23 given below)
Fig. 26
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
5.2 LM35
PRECISION CENTIGRADE TEMPERATURE SENSORS GENERAL
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
DESCRIPTION The LM35 series are precision integrated-circuit temperature sensors,
whose output voltage is linearly proportional to the Cels
ius (Centigrade) temperature. The LM35 thus has an advantage over linear temperature
sensors calibrated in Ê Kelvin, as the user is not required to subtract a large constant voltage
from its output to obtain convenient Centigrade scaling. The LM35 does not require any
external calibration or trimming to provide typical accuracies of ±1¤4 ÊC at room temperature
and ±3¤4 ÊC over a full -55 to +150ÊC temperature range. Low cost is assured by trimming
and calibration at the wafer level. The LM35’s low output impedance, linear output, and
precise inherent calibration make interfacing to readout or control circuitry especially easy.
It can be used with single power supplies, or with plus and minus supplies. As it draws only
60 µA from its supply, it has very low self-heating, less than 0.1 ÊC in still air. The LM35 is
rated to operate over a -55Ê to +150ÊC temperature range, while the LM35C is rated for a -
40Ê to +110ÊC range (-10Ê with improved accuracy). The LM35 series is available pack-aged
in hermetic TO-46 transistor packages, while the LM35C, LM35CA, and LM35D are also
available in the plastic TO-92 transistor package. The LM35D is also avail-able in an 8-lead
surface mount small outline package and a plastic TO-220 package.
FEATURES
Calibrated directly in Ê Celsius (Centigrade)
Linear + 10.0 mV/ÊC scale factor
0.5ÊC accuracy guaranteeable (at +25ÊC)
Rated for full -55Ê to +150ÊC range
Suitable for remote applications
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Low cost due to wafer-level trimming
Operates from 4 to 30 volts
Less than 60 µA current drain
Low self-heating, 0.08ÊC in still air
Nonlinearity only ±1¤4 ÊC typical
Low impedance output, 0.1 for 1 mA load
5.3 IR RECEIVER MODULE FOR REMOTE CONTROL
SYSTEM
DESCRIPTION
The TSOP1 1.. - series are miniaturized receivers for infrared remote control systems. PIN
diode and preamplifier are assembled on lead frame, the epoxy package is designed as IR filter.
The demodulated output signal can directly be decoded by a microprocessor. The main benefit is
the operation with short burst transmission codes and high data rates.
FEATURES
· Photo detector and preamplifier in one package
§ Internal filter for PCM frequency
§ Improved shielding against electrical field disturbance
§ TTL and CMOS compatibility
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
§ Output active low
§ Low power consumption
§ High immunity against ambient light
SPECIAL FEATURES
§ Enhanced data rate of 4000 bit/s
§ Operation with short bursts possible (~ 6 cycles/ burst)
CHAPTER 6.
PROGRAM FOR MICROCONTROLLER ATMEL 89C51
#include<stdio.h>
#include<at89x51.h> //HEADER FILE FOR ATMEL 89C51
sfr port0 = 0x80;
sfr port1 = 0x90;
Part Carrier Frequency
TSOP1130 30 kHzTSOP1133 33 kHzTSOP1136 36 kHz
TSOP1 137 36.7 kHzTSOP1138 38 kHzTSOP1 140 40 kHz
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
sfr port2 = 0xa0;
sfr port3 = 0xb0;
sbit lrelay1 = port1 ^ 0;
sbit lrelay2 = port1 ^ 1;
sbit lrelay3 = port1 ^ 2;
sbit lrelay4 = port1 ^ 3;
sbit trelay1 = port1 ^ 4;
sbit trelay2 = port1 ^ 5;
sbit trelay3 = port1 ^ 6;
sbit input = port1 ^ 7;
unsigned char dig, digit;
unsigned char cnt = 0, cnt1 = 0;
unsigned int counter1 = 0, counter = 0;
void delay() // DELAY FUNCTION
unsigned int i;
for (i = 0;i < 5000 ; i++ );
void ldelay() // DELAY FUNCTION
unsigned long int i;
for (i = 0;i < 15000 ; i++ );
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
void main()
delay ();
delay ();
port1=0x00;
port0=0x00;
//input=1;
while (1) //ENTERS INFINITE LOOP
ldelay ();
cnt = port3;
cnt1 = port2;
if (input==1)
if ((cnt > 1) && (cnt < 16)) lrelay1 = 1; lrelay2 = 0; lrelay3 = 0; lrelay4 = 0;
if ((cnt > 16) && (cnt < 32)) lrelay1 = 1; lrelay2 = 1; lrelay3 = 0; lrelay4 = 0;
if ((cnt > 32) && (cnt < 64)) lrelay1 = 1; lrelay2 = 1; lrelay3 = 1; lrelay4 = 0;
if ((cnt > 64) && (cnt < 255)) lrelay1 = 1; lrelay2 = 1; lrelay3 = 1; lrelay4 = 1;
if ((cnt1 > 0) && (cnt1 < 10)) trelay1 = 1; trelay2 = 0; trelay3 = 0;
if ((cnt1 > 10) && (cnt1 < 25)) trelay1 = 0; trelay2 = 1; trelay3 = 0;
if ((cnt1 > 25) && (cnt1 < 35)) trelay1 = 0; trelay2 = 0; trelay3 = 1;
else port1=0x00;
counter = counter+1;
if (counter==1 && counter1 < 6) port0 = 0x01;
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
if (counter==2 && counter1 < 6) port0 = 0x02;
if (counter==3 && counter1 < 6) port0 = 0x04;
if (counter==4 && counter1 < 6) port0 = 0x08;
if (counter==5) counter=0; counter1=counter1+1;
if (counter==1 && counter1 > 6) port0 = 0x08;
if (counter==2 && counter1 > 6) port0 = 0x04;
if (counter==3 && counter1 > 6) port0 = 0x02;
if (counter==4 && counter1 > 6) port0 = 0x01;
if (counter==5) counter=0; counter1=counter1+1;
if (counter1==12) counter=0; counter1=0;
CHAPTER. 8 FLOW CHART FOR MC 89C51
NO
START
GENERATE THE OUTPUT FOR SOLAR TRACKING
SYSTEM
IF PORT 1.8 = 1
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
YES
NO
YES
FLOW CHART FOR PIC MC 16F505
NO
YES
ACCEPT THE INPUTS FROM PORT2 AND PORT3 DEPENDING ON THE VALUES OF LDR AND
TEMP SENSOR
GENERATE THE OUTPUT AT PORT1 TO DRIVE NO. OF LED’S & SPPED OF FAN
STOP
START
IF PORT 1.8 OF MC= 1
ACCEPT THE INPUTS FROM IR SENSOR MODULE TO PIN NO.4
OF PIC MC
GENERATE THE OUTPUT AT PORT1 TO DRIVE NO. OF DEVICES
CONNECTED TO IT
STOP
IF SYSTEM IS SWITCHED OFF
IF SYSTEM IS SWITCHED OFF
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
NO
YES
YES
CHAPTER .9
ADVANTAGES
1. Walking up to the regulators board to change the fan speed is avoided.
2. Fan regulators are eliminated.
3. Unnecessary wastage of electricity can be controlled to a greater extend.
4. Maximum power can be saved.
5. Electrical safety is designed to prevent device damage & electrical shocks.
6. Selectable Sensitivity, Sensitivity can be adjusted to match installation requirements.
7. Wide supply voltage range: 3.0V to 15V in COMPARATOR.
8. Photo detector and preamplifier in one package.
DISADVANTAGES
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
In this project usage of relays leads to consume more power.
FUTURE DEVELOPMENT
Instead of using relays if we replace it by IC 4066 (QUAD BILATERAL SWITCH)
then there will be drastically power consumption can be reduced to an greater extent.
CHAPTER .10 BIBLOGRAPHY
BOOKS REFERED:
For Hardware and Programming.
The 8051 Microcontroller and Embedded Systems
By. Muhammad Ali Mazidi
Janice Gillespie Mazidi
Hardware detail
Power Electronics
By. J. S. Chitode
Circuit Designing
IC Design Projects
By. Stephen Kamichik
WEB SITES:
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
http://www.atmel.com
http://www.vsnl.com
http://en.wikipedia.org/wiki/Solar_energy
www.google.com
www.efy.com
http://www.iccatalog.com
IC DETAILS & DATASHEETS
ANALOG TO DIGITAL CONVERTOR:
CS VCC
RD CLK R
WR D0
CLK IN D1
INTR D2
1 20
2 19
3 18
4 17
5 COMPARATOR 0804 16
6 15
7 14
8 13
9 12
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
VIN(+) D3
VIN(-) D4
A GND D5
VREF/2 D6
D GND D7
Fig.27
COMPARATOR convertors are among the most highly used devices for data acquisitition digital
computer use binary values , but in the physical world everything is analog temperature,
pressure, humidity and velocity are free examples of physical quantities.
A physical quantity is converted in to electrical signals using a device called transducer (sensor).
Although there are sensors for temperature, light, velocity, pressure,they produce an output that
is voltage or current. Therefore we need COMPARATOR which translate analog signal to digital
numbers that microcontroller can read them.
PIN DESCRIPTION FOR COMPARATOR0804 IC:
COMPARATOR Works with +5v and has a resolution of 8 bits. In addition to resolution,
conversion time is another major factor in judging an COMPARATOR. Conversion time is
defined as the time it takes the COMPARATOR to convert analg input to digital number. The
conversion varies depending on the clocking signal applied to the CLK R and CLK IN pins bit it
cannot be faster than 110µs.
CS: chip select is an active low input used to activate the COMPARATOR0804 chip. To access
the COMPARATOR 0804 this pin must be LOW.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
RD( READ): This is input signal active LOW. It is used to get the converted data using
COMPARATOR chip. When CS=0 & if a HIGH to LOW pulse is applied to the RD pin 8-bit
digital output shows up at the D0-D7 (Data pin)
WR(Write): this is an active LOW input used ti inform the COMPARATOR to start the
conversion process. If CS=0 & WR makes transaction, the COMPARATOR start converting
input analog values of Vin to digital numbers. When data conversion is complete INTR pin is
forced LOW by COMPARATOR.
CLK IN & CLK R: CLK IN is an input pin connected to external clock source when external
clock source is used for timing. To use the internal clock generator of COMPARATOR CLK IN
& CLK R pins are connected to the capacitor and resistors. As shown in fig above. The clock
frequency is determined by equation
F = 1/1.1RC
Typically R = 10kΩ, C=150µF
Putting in above equation we get 6.6 kHz.
INTR (Interrupt): This is an output pin and active LOW. It is normally HIGH pin when the
conversion is finished; it goes to LOW to signal the cpu that converted data is ready to be picked
up. After INTR pin goes LOW we make
CS =0 and sends a HIGH to LOW pulse to the RD pin to get data out of COMPARATOR chip.
Vin+ & Vin-: These are the different analog inputs where Vin = Vin (+) – vin(-), where Vin(-) is
connected to GND and Vin(+) is used as analog input to be converted to digital.
Vcc: This is the +5v power supply. This is also used as reference voltage when the Vreff/2 is
opened.
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Vreff/2(pin 9): this pin is used for reference voltage. If this pin is opened the analog input
voltage for COMPARATOR is in the range of 0 – 5V. This is used to implement analog input
voltage other then 0- -5V.
D0-D7: These are the digital data input pins. These are
tristate buffered and converted data is accessed only
when CS=0 & RD forced to LOW. So to calculate the
output voltage we use the fallowing formula:
Dout = Vin / step size
Where Dout = digital data output.
Vin = Analog input voltage and step size is the
smallest change.
Analog ground and Digital ground:
These are the input pins providing the GND for both
analog and digital signal. Analog GND is connected to
the GND of the analog Vin while digital GND is connected to the Vcc pin. The reason is to
isolate the analog Vin signal from the transient voltages caused by the digital switching of the
output D0 – D7. Such isolation contributes the accuracy of the digital data output.
HEX BUFFER / CONVERTER (NON-INVERTER)
CD4050: This circuit accepts eight inputs from the vehicle’s ID Decoder Stage.
These eight inputs are given to eight Darlington drivers for amplification purpose. The
Buffer IC’s 3, 5,7,9,11,14 [of IC2] and 11, 14 [of IC1] pins take the inputs and
1
2
6
3
16
5
15
4
14
10
11
12
13
7
Vcc
Vss 8 9
IC 4050
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
corresponding buffered outputs are observed at 2, 4, 6, 10, 12 [of IC2] and 12,15 [of
IC1] pins. Fig. 28
GENERAL CHARACTERISTICS:
1. Voltage Rating : 4V to 16V
2. Operating Temperature : 0C -65C
3. Max Power Dissipation : 0.01mW
4. Propagation Delay : 30 nsec typically
5. Max Toggle Speed : 3 MHz
6. Fan Out : > 50
7. Noise Immunity : 3.7V
8. Fig. 29
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
EMBEDDED DESIGN FOR POWER MONITORING AND OPTIMIZATION
Fig. 30 ULN 2004: Since
the digital outputs of the some circuits
cannot sink much current, they are not
capable of driving relays directly. So,
high-voltage high-current Darlington
arrays are designed for interfacing low-
level logic circuitry and multiple
peripheral power loads. The series
ULN2000A/L ICs drive seven relays
with continuous load current ratings to
600mA for each input. At an
appropriate duty cycle depending on
ambient temperature and number of
drivers turned ON simultaneously, typical power loads totaling over 260W [400mA x 7, 95V]
can be controlled. Typical loads include relays, solenoids, stepping motors, magnetic print
hammers, multiplexed LED and incandescent displays, and heaters. These Darlington arrays are
furnished in 16-pin dual in-line plastic packages (suffix A) and 16-lead surface-mountable
SOICs (suffix L). All devices are pinned with outputs opposite inputs to facilitate ease of circuit
board layout. The input of ULN 2004 is TTL-compatible open-collector outputs. As each of
these outputs can sink a maximum collector current of 500 mA, miniature PCB relays can be
easily driven using ULN 2004. No additional free-wheeling clamp diode is required to be
connected across the relay since each of the outputs has inbuilt free-wheeling diodes. The Series
Vcc
1 16
2
3
4
5
6
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IC ULN 2004
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ULN20x4A/L features series input resistors for operation directly from 6 to 15V CMOS or
PMOS logic outputs.
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VOLTAGE REGULATOR
GENERAL CHARACTERISTICS:
1. Output voltage : 05 V/12 V
2. Operating Temperature : 0c - 70c Fig. 31
3. Output Current : 100mA
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4. Dropout Voltage : 1.7V
VOLTAGE REGULATION : The filtered d.c. output is not stable. It varies in accordance
with the fluctuations in mains supply or varying load current. This variation of load current is
observed due to voltage drop in transformer windings, rectifier and filter circuit. These variations
in d.c. output voltage may cause inaccurate or erratic operation or even malfunctioning of many
electronic circuits. For example, the circuit boards which are implanted by CMOS or TTL
ICs.The stabilization of d.c. output is achieved by using the three terminal voltage regulator IC.
This regulator IC comes in two flavors: 78xx for positive voltage output and 79xx for negative
voltage output. For example 7812 gives +12V output and 7912 gives -12V stabilized output.
These ICs have in-built short-circuit protection and auto-thermal cutout provisions.
IC NE 556
These devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555
type in each package. These circuits can be operated in the astable or the monostable mode with
external resistor-capacitor (RC) timing control. The basic timing provided by the RC time
constant can be controlled actively by modulating the bias of the control-voltage input.
The threshold (THRES) and trigger (TRIG) levels normally are two-thirds and one-third,
respectively, of VCC. These levels can be altered by using the control voltage (CONT) terminal.
When the trigger input falls below trigger level, the flip-flop is set and the output goes high. If
the trigger input is above the trigger level and the
threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset
(RESET) input can override all other inputs and can be used to initiate a new timing cycle. When
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RESET goes low, the flip-flop is reset and the output goes low. When the output is low, a low-
impedance path is provided between the discharge (DISCH) terminal and ground (GND).
FEATURES:
· Two Precision Timing Circuits Per Package
· Astable or Monostable Operation
· TTL-Compatible Output Can Sink or Source up to 150 mA
· Active Pullup or Pulldown
· Designed to Be Interchangeable With Signetics NE556, SA556, and SE556
APPLICATION:
· Precision Timers From Microseconds to Hours
· Pulse-Shaping Circuits
· Missing-Pulse Detectors
· Tone-Burst Generators
· Pulse-Width Modulators
· Pulse-Position Modulators
· Sequential Timers
· Pulse Generators
· Frequency Dividers
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· Application Timers
· Industrial Controls
· Touch-Tone Encoders
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