ECEN 248 Lab11_report

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    Lab 11: A Simple Digital

    Combination Lock

    Deanna SessionsECEN 248-511

    TA: Priya Venkatas

    Date: November 20, 2013

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    Objectives:The objective of this lab is to design a circuit that mimics the actions of a rotary combination

    lock on a circuit board. This means that the circuit will have to be able to detect when the propercombination is entered in order to open the lock and knowwhen the wrong combination is

    entered in order to stay closed. This will be employing the usage of the Moore finite state

    machine.

    Design:Below are the source codes for the two variations upon the rotary combination lock and the

    up/down counter. One rotary combination lock has the combination described by the lab manual,

    the other lock has an additional number in the combination that was implemented by me.//rotary combination lock fsm`timescale 1 ns/ 1 ps`default_nettype none

    module combination_lock_fsm( //assigning each of the outputs and inputs

    output reg [2:0] state,output wire Locked,input wire Right, Left,input wire [4:0] Count,input wire Center,input wire Clk, South

    );parameter S0 = 3'b000, //assigning each state to a binary number

    S1 = 3'b001,S2 = 3'b010,S3 = 3'b011,S4 = 3'b100;

    reg [2:0] nextState;

    always@(*)case(state)

    S0: begin //what to do if in state 0if(Right) //if the knob is turned right go to state 1

    nextState = S1;else

    nextState = S0;end

    S1: begin //what to do if in state 1if(Left) //if the knob is left and the count is 13; S2

    if (Count == 5'b01101)nextState = S2;

    elsenextState = S0;

    elsenextState = S1;

    end

    S2: begin //what to do if in state 2if(Right) //if knob is right and count is 7; S3

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    if(Count == 5'b00111)nextState = S3;

    elsenextState = S0;

    elsenextState = S2;

    end

    S3: begin //what to do if in state 3if(Center) //if knob is center and count is 17; S4

    if(Count == 5'b10001)nextState = S4; //S4 is unlocked

    elsenextState = S0;

    elsenextState = S3;

    end

    S4: begin //what to do if in state 4nextState = S4;

    enddefault: begin

    nextState = S0;end

    endcase

    assign Locked = (state==S4)?0:1;

    always@(posedge Clk) //what to do if the clock is resetif(South) //if south is pressed then reset to S0

    state

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    endelse if(Down) //if the knob is turned to the left then the count goes down

    beginif(Count == 0)

    Count

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    nextState = S3;else

    nextState = S0;else

    nextState = S2;end

    S3: begin //what to do if in state 3if(Left) //if knob is center and count is 17; S4

    if(Count == 5'b10001)nextState = S4; //S4 is unlocked

    elsenextState = S0;

    elsenextState = S3;

    end

    S4: begin //what to do if in state 4if(Center) //if knob is center and count is 1; S5

    if(Count == 5'b00001)

    nextState = S5;else

    nextState = S0;else

    nextState = S4;end

    S5: begin //what to do if in state 5nextState = S5;

    enddefault: begin

    nextState = S0;end

    endcase

    assign Locked = (state==S5)?0:1;

    always@(posedge Clk) //what to do if the clock is resetif(South) //if south is pressed then reset to S0

    state

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    Figure 1: Combination Lock Finite State Machine Waveform

    Figure 2: Up/Down Counter Waveform

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    Conclusion:All of the code worked as I had expected it to work and the combination lock on the FPGA board

    worked flawlessly. I was pleased with how the lab went and how easily implemented the

    program was. I learned how to take the concept of a finite state machine and bring it full term

    into a finished product that is useful in the real world. Going from state diagram to program toimplementation really taught the proper way to go about programming hardware in a methodical

    way.

    Questions:

    1. Source code is included in the design section.2. Waveforms are included in the results section.3. Questions throughout lab:

    a. Experiment 1:i. Take a look at the simulation waveform and take note of the tests that the

    test bench performs. Is this an exhaustive test? Why or why not?

    1. Yes it is an exhaustive test even though it doesnt go through all ofthe 8000 combinations. It uses a smart system in which it tests

    certain combinations that would show whether other ones would

    fail.ii. Take a look at the simulation waveform and make a note in your lab write-

    up about how the test bench tests the operation of your Up/Down Counter.

    1. The up down counter test bench just tests to make sure that itcounts up and down properly.

    4. If every combination were to be tried with the three number combination lock then therewould be 20

    3possible combinations which is 8000 combinations. For the modified four

    number combination lock there are 204combinations which is 160000 combinations. This

    would take quite some time to get through all of these combinations in a brute-forceattack.

    Student Feedback:

    1. This lab was so much fun! I loved being able to create something that is actuallyplausible for implementation. It was great seeing the whole thing through to the end by

    creating a state diagram and then creating a program to mimic the workings of a

    combination lock. I didnt dislike anything about it.

    2. Nothing was unclear.3. Keep it as is, it was fun and full of information.