Dsd Lab Manual
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Transcript of Dsd Lab Manual
DIGITAL SYSTEM DESIGN LAB MANUAL (EE-326-F)
DIGITAL SYSTEM DESIGNLAB MANUAL(EE-326-F)
VI SEMESTER
ELECTRONICS & COMMUNICATION ENGINEERING
DEPARTMENT OF ELCTRONICS & COMMUNICATION ENGINEERINGDRONACHARYA COLLEGE OF ENGINEERINGKHENTAWAS, GURGAON 123506
CONTENTSDIGITAL SYSTEM DESIGN (EE-326-F)VI SEMESTER (E&CE)LIST OF EXPERIMENTS
S.NO.EXPERIMENTPage No.
PERFORM ANY FIVE EXPERIMENT USING VHDL
1Design all gates using VHDL.3
2Write VHDL programs for the following circuits, check the wave forms and the hardware generateda. Half adderb. Full adder7
3 Write VHDL programs for the following circuits, check the wave forms and the hardware generateda. Multiplexerb. Demultiplexer13
4Write VHDL program for encoder and check the wave forms and the hardware generated.19
5Write a VHDL program for a decoder and check the wave forms and the hardware generated.22
6Write a VHDL program for a Down counter and check the wave forms and the hardware generated.25
7Write a VHDL program for a BCD to GRAY code converter and check the wave forms and the hardware generated.28
8Write a VHDL program for a T FLIP-FLOP and check the wave forms and the hardware generated.31
PERFORM ANY FIVE EXPERIMENT USING FPGA AND CPLD
9Implement Half Adder using FPGA & CPLD.34
10Implement Full Adder using FPGA & CPLD.35
11Implement Delay Flip flop using FPGA & CPLD.38
12Implement BCD to 7 segments Decoder using FPGA& CPLD.41
13Implement an Up Counter using FPGA & CPLD.44
14Implement 1-bit Comparator using FPGA & CPLD .47
15Implement ALU using FPGA & CPLD.49
Practical No. 1
Aim:- To Design Logic Gates using VHDL
LOGIC GATES:
Alogic gateperforms alogical operationon one or more logic inputs and produces a single logic output. The logic normally performed isBoolean logicand is most commonly found indigital circuits. Logic gates are primarily implemented electronicallyusingdiodesortransistors,but can also be constructed using electromagneticrelays(relay logic),fluidic logic,pneumatic logic,optics,molecules, or evenmechanicalelements.
INPUTOUTPUT
ABA AND B
000
010
100
111
AND
INPUTOUTPUT
ABA OR B
000
011
101
111
ORA+B
INPUTOUTPUT
ANOT A
01
10
NOT
In electronics a NOT gate is more commonly called an inverter. The circle on the symbol is called abubble, and is generally used in circuit diagrams to indicate an inverted (active-low) input or output.
INPUTOUTPUT
ABA NAND B
001
011
101
110
NAND
INPUTOUTPUT
ABA NOR B
001
010
100
110
NOR
INPUTOUTPUT
ABA XOR B
000
011
101
110
XOR
INPUTOUTPUT
ABA XNOR B
001
010
100
111
XNORor
Program:
----------------------------------------------------------------------------------library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity all_ga is Port ( a : in STD_LOGIC; b : in STD_LOGIC; c : out STD_LOGIC; c1 : out STD_LOGIC; c2 : out STD_LOGIC; c3 : out STD_LOGIC; c4 : out STD_LOGIC; c5 : out STD_LOGIC; c6 : out STD_LOGIC);end all_ga;
architecture Behavioral of all_ga is
beginc g g g g g g g g