Dr. Ambedkar Institute of Technologyin application specific digital system. Inspect how effectively...

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Dr. Ambedkar Institute of Technology (An Autonomous Institution affiliated to VTU Belgaum)

DEPARTMENT OF ELECTRONICS & INSTRUMENTATION ENGINEERING

SCHEME OF TEACHING AND EXAMINATION 2016-2018 M.Tech in ELECTRONICS

I SEMESTER

Subject

Code Title

Teaching

Departme

nt

Teaching hours/week Examination

L T P Credits Duration

(hrs) CIE

Theory/

Practical

SEE

Total

Marks

ELD11 Advanced Engineering

Mathematics

Maths 03

02 00 04 03

50 50 100

ELD12 VLSI Design EI 04 00 00 04 03 50 50 100

ELD13 Advanced Embedded System EI 04 00 00 04 03 50 50 100

ELD14 Digital Circuit and Logic

Design

EI 03

02 00 04 03

50 50 100

ELD15X Elective-1 EI 04 00 00 04 03 50 50 100

ELDL16 Digital Electronics Lab -1 EI - - 4 02 03 50 50 100

ELDS17 Technical Seminar EI - 00 00 02 03 50 50 100

ELDM18 Mini project EI - - - 02 03 50 50 100

Total 20 04 06 26 24 400 400 800

ELECTIVE-1

Subject Code Title of the Subject

ELD151 Digital System Design using Verilog

ELD152 Transformation Techniques ELD153 ASIC Design ELD154 Wireless and Adhoc Networks

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Dr. Ambedkar Institute of Technology (An Autonomous Institution affiliated to VTU Belgaum)

DEPARTMENT OF ELECTRONICS & INSTRUMENTATION ENGINEERING

SCHEME OF TEACHING AND EXAMINATION 2016-2018

M.Tech in ELECTRONICS II SEMESTER

Subject

Code Title

Teaching

Departme

nt

Teaching hours/week Examination

L T P Credits Duration

(hrs) CIE

Theory/

Practical

SEE

Total

Marks

ELD21 Advanced DSP EI 03 02 00 04 03 50 50 100

ELD22 Coding Theory EI 04 00 00 04 03 50 50 100

ELD23 Soft computing EI 03 02 00 04 03 50 50 100

ELD24 Real Time Operating System EI 04 00 00 04 03 50 50 100

ELD25 Research Methodology EI 04 00 00 04 03 50 50 100

ELD26X Elective-2 EI - - 04 02 03 50 50 100

ELDL27 Digital Electronics Lab -2 EI 02 00 00 02 03 50 50 100

ELDM28 Mini project EI - - 04 02 03 50 50 100

Total 20 04 08 26 24 400 400 800

ELECTIVE-2

Subject Code Title of the Subject

ELD 261 Adaptive Signal Processing ELD 262 Multimedia Communication ELD 263 Advances in video and image processing ELD 264 Data Encryption Techniques

3

Sub Title : VLSI DESIGN

Sub Code: ELD12 No. of Credits:4 = 4:0:0(L-T-P) No. of Lecture hours / week : 4Hrs

Exam Duration : 3 Hrs CIE + SEE = 50 + 50=100 Total No. of contact hours : 52

Course Objectives: This course will enable students to: 1. Explain VLSI Design Methodologies

2. Learn Static and Dynamic operation principles, analysis and design

of inverter circuit. 3. Infer state of the art Semiconductors Memory circuits.

4. Outline the comprehensive coverage of Methodologies and Design practice

that are used to reduce the Power Dissipation of large scale digital circuits. Illustrate VLSI and ASIC design.

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

MOS Transistor: The Metal Oxide Semiconductor (MOS) Structure, The MOS System under External Bias, Structure and Operation of MOS

Transistor, MOSFET Current-Voltage Characteristics, MOSFET Scaling and Small-Geometry Effects.

MOS Inverters-Static Characteristics: Introduction, Resistive-Load Inverter, Inverters with n- Type MOSFET Load.

10 Hours

2

MOS Inverters-Static Characteristics: CMOS Inverter. MOS

Inverters: Switching Characteristics and Interconnect Effects: Introduction, Delay-Time Definition, Calculation of Delay Times,

Inverter Design with Delay Constraints, Estimation of Interconnect Parasitic, Calculation of Interconnect Delay, Switching

Power Dissipation of CMOS Inverters.

11 Hours

3

Semiconductor Memories: Introduction, Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Nonvolatile

Memory, Flash Memory, Ferroelectric Random Access Memory (FRAM).

10 Hours

4

Review of MOS Circuits: MOS and CMOS static plots, switches,

comparison between CMOS and BI - CMOS. MESFET and MODFET operations, quantitative description of MESFETS.MIS systems in

equilibrium, under bias, small signal operation of MESFETS and MOSFETS. Short Channel Effects and Challenges to CMOS: Short channel

effects, scaling theory, processing challenges to further CMOS miniaturization

10 Hours

4

5

Beyond CMOS: Evolutionary advances beyond CMOS, carbon

Nanotubes, conventional vs. tactile computing, computing, molecular and biological computing Mole electronics-molecular Diode and diode- diode logic.

Super Buffers and Bi-CMOS: Introduction, RC delay lines, super buffers- An NMOS super buffer, tri state super buffer and pad drivers, CMOS super buffers, Dynamic ratio less inverters, large

capacitive loads, pass logic, designing of transistor logic, General functional blocks -NMOS and CMOS functional blocks.

11 Hours

Note: Unit 4 and Unit 5 have internal choice.

Course outcomes: After studying this course, students will be able to: 1. Analyse issues of On-chip interconnect Modelling and Interconnect delay

calculation. 2. Analyse the Switching Characteristics in Digital Integrated Circuits.

3. Use the Dynamic Logic circuits in state of the art VLSI chips. 4. Study critical issues such as ESD protection, Clock distribution, Clock

buffering, and Latch phenomenon. 5. Use Bipolar and Bi-CMOS circuits in very high speed design.

Text Book: Sung Mo Kang & Yosuf Leblebici, “CMOS Digital Integrated Circuits: Analysis and Design”, Tata McGraw-Hill, Third Edition.

Reference Books:

1. Neil Weste and K. Eshragian, “Principles of CMOS VLSI Design: A System Perspective”, Second Edition, Pearson Education (Asia) Pvt. Ltd. 2000.

2. Wayne, Wolf, “Modern VLSI Design: System on Silicon” Prentice Hall

PTR/Pearson Education, Second Edition, 1998.

3. Douglas A Pucknell & Kamran Eshragian, “Basic VLSI Design”, PHI 3rd Edition (original Edition – 1994).

5

Sub Title : ADVANCED EMBEDDED SYSTEM



Course Objectives: This course will enable students to: Understand the basic hardware components and their selection method

based on the characteristics and attributes of an embedded system.

Describe the hardware software co-design and firmware design approaches

Explain the architectural features of ARM CORTEX M3, a 32 bit

microcontroller including memory map, interrupts and exceptions.

Program ARM CORTEX M3 using the various instructions, for different

applications

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1 Embedded System: Embedded vs General computing system, classification, application and purpose of ES. Core of an Embedded

System, Memory, Sensors, Actuators, LED, Opto coupler, Communication Interface, Reset circuits, RTC, WDT, Characteristics

and Quality Attributes of Embedded Systems

10 Hours

2

Hardware Software Co-Design, embedded firmware design approaches,

computational models, embedded firmware development languages, Integration and testing of Embedded Hardware and firmware,

Components in embedded system development environment (IDE), Files generated during compilation, simulators, emulators and debugging (

11 Hours

3

ARM-32 bit Microcontroller: Thumb-2 technology and applications of ARM, Architecture of ARM Cortex M3, Various Units in the architecture,

General Purpose Registers, Special Registers, exceptions, interrupts, stack operation, reset sequence

11 Hours

4 Instruction Sets: Assembly basics, Instruction list and description,

useful instructions, Memory Systems, Memory maps, Cortex M3 implementation overview, pipeline and bus interface

10 Hours

5 Exceptions, Nested Vector interrupt controller design, Systick Timer, Cortex-M3 Programming using assembly and C language, CMSIS

10 Hour


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Course Outcomes:

After studying this course, students will be able to:

Understand the basic hardware components and their selection method

based on the characteristics and attributes of an embedded system.

Explain the hardware software co-design and firmware design approaches.

Acquire the knowledge of the architectural features of ARM CORTEX M3, a

32 bit microcontroller including memory map, interrupts and exceptions.

Apply the knowledge gained for Programming ARM CORTEX M3 for different

applications.

Text Books: 1. K. V. Shibu, "Introduction to embedded systems", TMH education Pvt. Ltd.

2009 2. Joseph Yiu, “The Definitive Guide to the ARM Cortex-M3”, 2nd edn, Newnes,

(Elsevier), 2010.

Reference Book: James K. Peckol, "Embedded systems- A contemporary design tool", John Wiley,

2008.

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Sub Title : DIGITAL CIRCUITS AND LOGIC DESIGN



Course Objectives: This course will enable students to:

Understand the concepts of sequential machines

Design Sequential Machines/Circuits

Analyze the faults in the design of circuits

Apply fault detection experiments to sequential circuits

UNIT

NO.

SYLLABUS CONTENT No of Hours

Theory Tutorial

1

Threshold Logic: Introductory Concepts, Synthesis of Threshold Networks, Capabilities, Minimization, and

Transformation of Sequential Machines: The Finite- State Model, Further Definitions, Capabilities.

08 Hours 05 Hours

2

Fault Detection by Path Sensitizing, Detection of Multiple

Faults, Failure-Tolerant Design, Quadded Logic, Reliable Design and Fault Diagnosis Hazards: Fault Detection in

Combinational Circuits.

08 Hours 05 Hours

3

Fault-Location Experiments, Boolean Differences, Limitations of Finite – State Machines, State Equivalence and Machine

Minimization, Simplification of Incompletely Specified Machines.

08 Hours 05 Hours

4

Structure of Sequential Machines: Introductory Example, State Assignments Using Partitions, The Lattice of closed

Partitions, Reductions of the Output Dependency, Input Independence and Autonomous Clocks, Covers and

Generation of closed Partitions by state splitting, Information Flow in Sequential Machines, ELDecompositions, Synthesis

of Multiple Machines.

08 Hours 05 Hours


Course outcomes: At the end of the course, the students will be able to:

Understand the concepts of sequential machines

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Design Sequential Machines/Circuits

Analyze the faults in the design of circuits

Apply fault detection experiments to sequential circuits

Text Book: Zvi Kohavi, “Switching and Finite Automata Theory”, 2nd Edition, TMH.

Reference Books: 1. Charles Roth Jr., “Digital Circuits and logic Design”, 7th edn, Cengage Learning,

2014. 2. Parag K Lala, “Fault Tolerant And Fault Testable Hardware Design”, Prentice

Hall Inc. 1985. 3. E. V. Krishnamurthy, “Introductory Theory of Computer”, Macmillan Press Ltd,

1983. 4. Mishra & Chandrasekaran, “Theory of computer science – Automata, Languages

and Computation”, 2nd Edition, PHI, 2004.

Sub Title : DIGITAL SYSTEM DESIGN USING VERILOG



Course objectives: This course will enable students to:

Understand the concepts of Verilog Language

Design the digital systems as an activity in a larger systems design context.

Study the design and operation of semiconductor memories frequently used in application specific digital system.

Inspect how effectively IC’s are embedded in package and assembled in PCB’s for different application

Design and diagnosis of processors and I/O controllers they can be used in

embedded systems

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1 Introduction and Methodology: Digital Systems and Embedded

Systems, Binary representation and Circuit Elements, Real-World Circuits, Models, Design Methodology.

10 Hours

2

Number Basics: Unsigned and Signed Integers, Fixed and Floating-point Numbers.

Sequential Basics: Storage elements, Counters, Sequential Data paths and Control, Clocked Synchronous Timing Methodology.

11 Hours

9

3

Memories: Concepts, Memory Types, Error Detection and Correction.

Implementation Fabrics: ICs, PLDs, Packaging and Circuit Boards, Interconnection and Signal Integrity.

11 Hours

4 Processor Basics: Embedded Computer Organization, Instruction and Data, Interfacing with memory.

I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O software.

10 Hours

5

Accelerators: Concepts, case study, Verification of accelerators. Design Methodology: Design flow, Design optimization, Design for test

10 Hour


Course outcomes: After studying this course, students will be able to: 1. Design embedded systems, using small microcontrollers, larger CPUs/DSPs, or

hard or soft processor cores. 2. Design & Construct the combinational circuits using discrete gates and programmable logic devices.

3. Describe Verilog model for sequential circuits and test pattern generation 4. Explore the different types of semiconductor memories and their usage for

specific chip design 5. Design and synthesis of different types of processor and I/O controllers that are

used in embedded system design

Text Book: Peter J. Ashenden, “Digital Design: An Embedded Systems Approach Using

VERILOG”, Elesvier, 2010.

Reference Book: Verilog HDL: A Guide to Digital Design and Synthesis, Second Edition By Samir

Palnitkar.

Sub Title : TRANSFORMATION TECHNIQUES



Course objectives:

1. Analyze transforms using Fourier analysis

2. Analyze transforms by its applications and properties.

3. Design and analyze continuous wavelet transform.

4. Design discrete wavelet transform and analyze multi-rate in wavelet transform.

5. Analyze different forms of wavelets.

10

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Fourier Analysis: Vector space, Hilbert spaces, Fourier basis, FT- Limitations of

Fourier Analysis, Need for time-frequency analysis, DFT, 2D-DFT: Definition,

Properties and Applications, IDFT, Hilbert Transform, STFT

10 Hours

2

Transforms: Walsh, Hadamard, Haar and Slant Transforms, DCT, DST, KLT,–

definition, properties and applications 11 Hours

3

Continuous Wavelet Transform (CWT): Short comings of STFT, Need for

wavelets, Wavelet Basis- Concept of Scale and its relation with frequency, Continuous time wavelet Transform Equation- Series Expansion using Wavelets-

CWT- Tiling of time scale plane for CWT. Important Wavelets: Haar, Mexican Hat,

Meyer, Shannon, Daubechies.

11 Hours

4

Multi Rate Analysis and DWT: Need for Scaling function – Multi Resolution

Analysis, Two-Channel Filter Banks, Perfect Reconstruction Condition,

Relationship between Filter Banks and Wavelet Basis, DWT, Structure of DWT

Filter Banks, Daubechies Wavelet Function, Applications of DWT.

10 Hours

5 Special Topics: Wavelet Packet Transform, Multidimensional Wavelets, Bi-

orthogonal basis- B-Splines, Lifting Scheme of Wavelet Generation, Multi Wavelets

10 Hour


Course outcomes:

1. Analyze transforms using Fourier analysis

2. Analyze transforms by its applications and properties.

3. Design and analyze continuous wavelet transform.

4. Design discrete wavelet transform and analyze multi-rate in wavelet transform.

5. Analyze different forms of wavelets.

TEXT BOOKS: · Wavelet Transforms-Introduction theory and applications -Raghuveer M.Rao and Ajit S.

Bopardikar, Pearson Edu, Asia, New Delhi, 2003. · “Insight into Wavelets from Theory to Practice” - Soman. K. P, Ramachandran. K.I,

Printice Hall India, First Edition, 2004. REFERENCE BOOKS:

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1. Fundamentals of Wavelets- Theory, Algorithms and Applications -Jaideva C Goswami, Andrew K Chan, John Wiley & Sons, Inc, Singapore, 1999.

2. Wavelets and Sub-band Coding -Vetterli M. Kovacevic, PJI, 1995.

3. Introduction to Wavelets and Wavelet Transforms -C. Sydney Burrus, PHI, First Edition,

1997.

4. A Wavelet Tour of Signal Processing-Stephen G. Mallat, Academic Press, 2 Ed

5. Digital Image Processing – S.Jayaraman, S.Esakkirajan, T.Veera Kumar – TMH,2009

Sub Title : ASIC DESIGN



Course objectives: This course will enable students to:

Explain ASIC methodologies and programmable logic cells to implement a function on IC.

Analyse back-end physical design flow, including partitioning, floor-planning,

placement, and routing.

Gain sufficient theoretical knowledge for carrying out FPGA and ASIC

designs.

Design CAD algorithms and explain how these concepts interact in ASIC

design.

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Introduction to ASICs, Full custom, Semi-custom and Programmable ASICs, ASIC Design flow, ASIC cell libraries.

CMOS Logic: Datapath Logic Cells: Data Path Elements, Adders: Carry skip, Carry bypass, Carry save, Carry select, Conditional sum,

Multiplier (Booth encoding), Data path Operators, I/O cells.

10 Hours

2

ASIC Library Design: Logical effort: Predicting Delay, Logical area and

logical efficiency, Logical paths, Multi stage cells, Optimum delay and number of stages.

Programmable ASIC Logic Cells: MUX as Boolean function generators, Actel ACT: ACT 1, ACT 2 and ACT

3 Logic Modules, Xilinx LCA: XC3000 CLB, Altera FLEX and MAX.

11 Hours

12

3

Programmable ASIC I/O Cells: Xilinx and Altera I/O Block.

Low-level design entry: Schematic entry: Hierarchical design, Netlist screener.

ASIC Construction: Physical Design, CAD Tools. Partitioning: Goals and objectives, Constructive Partitioning, Iterative

Partitioning Improvement, KL, FM and Look Ahead algorithms.

11 Hours

4

Floor planning and placement: Goals and objectives, Floor planning

tools, Channel definition, I/O and Power planning and Clock planning. Placement: Goals and Objectives, Min-cut Placement algorithm,

Iterative Placement Improvement, Physical Design Flow.

10 Hours

5

Routing: Global Routing: Goals and objectives, Global Routing Methods, Back-annotation. Detailed Routing: Goals and objectives,

Measurement of Channel Density, Left-Edge and Area-Routing Algorithms. Special Routing, Circuit extraction and DRC.

10 Hour


Course outcomes: After studying this course, students will be able to:

1. Describe the concepts of ASIC design methodology, data path elements, logical effort and FPGA architectures.

2. Analyze the design of FPGAs and ASICs suitable for specific tasks, perform design entry and explain the physical design flow.

3. Design data path elements for ASIC cell libraries and compute optimum path delay.

4. Create floorplan including partition and routing with the use of CAD algorithms. TextBook:

Michael John Sebastian Smith, “Application - Specific Integrated Circuits” Addison-Wesley Professional; 2005.

Reference Books:

1. Neil H.E. Weste, David Harris, and Ayan Banerjee, “CMOS VLSI Design: A Circuits and Systems Perspective”, 3rd edition, Addison Wesley/ Pearson

education, 2011.

2. Vikram Arkalgud Chandrasetty, “VLSI Design: A Practical Guide for FPGA and ASIC Implementations”, Springer, 2011, ISBN: 978-1-4614-1119-2.

3. Rakesh Chadha, Bhasker J., “An ASIC Low Power Primer”, Springer, ISBN: 978-

1- 4614-4270-7.

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Sub Title : WIRELESS ADHOC NETWORKS



Course objectives: • To explore the design space and conduct trade-off analysis between performance and resources.

• To determine suitable medium access protocols and radio hardware.

• To learn Provision quality of service, fault-tolerance, security and other dependability requirements

while coping with resource constraints.

• To explore the Ad-hoc network concepts by using network simulators.

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Ad hoc Wireless Networks: Introduction, Issues in Ad hoc Wireless Networks, Ad

hoc

Wireless Internet; MAC Protocols for Ad hoc Wireless Networks: Introduction,

Issues in Designing a MAC Protocol, Design Goals of MAC Protocols,

Classification of MAC protocols, Contention-Based Protocols, Contention-Based

Protocols with Reservation Mechanisms, Contention-Based Protocols with

Scheduling Mechanisms, MAC Protocols that Use Directional Antennas

10 Hours

2

Routing Protocols for Ad Hoc Wireless Networks: Introduction, Issues in

Designing a Routing Protocol for Ad hoc Wireless Networks; Classification of

Routing Protocols; Table Driven Routing Protocols; On-Demand Routing Protocols,

Hybrid Routing Protocols, Hierarchical Routing Protocols and Power-Aware

Routing Protocols 11 Hours

3

Multicast Routing in Ad hoc Wireless Networks: Introduction, Issues in

Designing a Multicast Routing Protocol, Operation of Multicast Routing Protocols,

An Architecture Reference Model for Multicast Routing Protocols, Classifications

of Multicast Routing Protocols, Tree-Based Multicast Routing Protocols and Mesh-

Based Multicast Routing Protocols.

11 Hours

4

Transport Layer and Security Protocols for Ad hoc Networks: Introduction,

Issues in Designing a Transport Layer Protocol; Design Goals of a Transport Layer

Protocol; Classification of Transport Layer Solutions; TCP over Transport Layer

Solutions; Other Transport Layer Protocols for Ad hoc Networks; Security in Ad

hoc Wireless Networks, Issues and Challenges in Security Provisioning, Network

Security Attacks, Key Management and Secure Touting Ad hoc Wireless Networks.

10 Hours

5 Quality of Service and Energy Management in Ad hoc Wireless Networks

Introduction, Issues and Challenges in Providing QoS in Ad hoc Wireless Networks,

Classification of QoS Solutions, MAC Layer Solutions, Network Layer Solutions; 10 Hour

14

Energy Management in Ad hoc Wireless Networks: Introduction, Need for Energy

Management in Ad hoc Wireless Networks, Classification of Energy Management

Schemes, Battery Management Schemes, Transmission Management Schemes,

System Power Management Schemes.


Course outcomes: At the end of this course, the students will be able to: Students will be able to

· Apply knowledge of wireless Ad-hoc networks to various application areas.

· Design, implement and maintain wireless Ad-hoc networks.

· Formulate and solve problems creatively.

· Practical knowledge acquired by hands-on session.

TEXT BOOKS:

1. C. Siva Ram Murthy & B. S. Manoj: Ad hoc Wireless Networks, 2nd Edition, Pearson

Education, 2011

REFERENCES:

1. Ozan K. Tonguz and Gianguigi Ferrari: Ad hoc Wireless Networks, John Wiley, 2007.

2. Xiuzhen Cheng, Xiao Hung, Ding-Zhu Du: Ad hoc Wireless Networking, Kluwer Academic

Publishers, 2004.

Sub Title : DIGITAL ELECTRONICS LAB -1

Sub Code: ELDL16 No. of Credits:4 = 0:0:2(L-T-P) No. of Lecture hours / week : 4Hrs


Course objectives: This laboratory course enables students to get practical

experience on the

Design tool such as Cadence OrCAD/ OrCAD Lite /EDA tool

Design of analog and digital circuits using the simulation tool

FPGA Design and testing for digital circuits Verilog programming and design of digital circuits

Design, verification and performance testing

1.Using Cadence OrCAD or OrCAD Lite or any EDA Tool, design

and verify the following: a) 3½ Digit Digital Voltmeter

b) Monolithic function Generator

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c) Regulated Power supplies d) Batch counter using TTL ICs.

e) DAC and ADC f) P, PI, PID and ON/OFF Controllers

g) Programmable Timers h) Filters and Resonance Circuits

2. Develop Verilog Program for design and testing the following

digital circuits (for 4/8 bits) using FPGA/CPLD. Use logic analyzer/Chipscope for the verification of results.

(Note: Programming can be done using any complier. Down load the programs on FPGA/CPLD boards and performance testing may be

done using pattern generator (32 channels and logic analyzer )/Chipscope pro. Implementing the above designs on

Xilinx/Altera/Cypress/equivalent based FPGA/CPLD kits.) a. Carry skip and carry lookahead adder

b. BCD adder and subtractor c. Array Multiplication (signed and unsigned)

d. Booth multiplication (radix-4) e. Magnitude comparator

f. LFSR g. Parity generator

h. Universal Shift Register i. Sequence generation (11101 say) using Mealy/Moore FSM

Course outcomes: On the completion of this laboratory course, the

students will be able to:

Design an analog and digital systems using Cadence OrCAD, OrCAD Lite or

any

EDA tool.

Develop Verilog Programs for Digital Circuit design simulation.

Design and implement digital systems on FPGA/CPLD

Testing and validation of digital systems using Logic analyzer/Chipscope

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Sub Title : Advance DSP

Sub Code: ELD21 No. of Credits:4= 4:0:0(L-T-P) No. of Lecture hours / week : 4Hrs


Course objectives: – Advances in Digital Signal Processing involve variable sampling rates

and thus the multirate signal processing and hence their applications in communication systems

and signal processing. It is intended to introduce a basic course in multirate signal processing

especially meant for students of branches eligible for M Tech courses in EC related disciplines.

UNIT

NO.

SYLLABUS CONTENT

No of Hours

Theory Tutorial

1

Introduction and Discrete Fourier Transforms: Signals,

Systems and Processing, Classification of Signals, The

Concept of Frequency in Continuous-Time and Discrete-

Time Signals, Analog-to-Digital and Digital-to-Analog

Conversion, Frequency-Domain Sampling: The Discrete

Fourier Transform, Properties of the DFT, Linear Filtering

Methods Based on the DFT

08 Hours 05 Hours

2

Design of Digital Filters: General Considerations, Design of

FIR Filters, Design of IIR Filters from Analog Filters,

Frequency Transformations.

08 Hours 05 Hours

3

Multirate Digital Signal Processing: Introduction, EL

Dimation by a factor „D‟, Interpolation by a factor „I‟,

Sampling rate Conversion by a factor „I/D‟, implementation

of Sampling rate conversion, Multistage implementation of

Sampling rate conversion, Sampling rate conversion of Band

Pass Signals, Sampling rate conversion by an arbitrary

factor,

08 Hours 05 Hours

4

Applications of Multirate Signal Processing, Digital Filter

banks, Two Channel Quadrature Mirror Filter banks, M-

Channel QMF bank

08 Hours 05 Hours

5

Adaptive Filters: Applications of Adaptive Filters, Adaptive

Direct Form FIR Filters- The LMS Algorithm, Adaptive

Direct Form Filters-RLS Algorithm.

08 Hours 05 Hours

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Note: Unit numbers: 3& 5 will have internal choice

Reference Books:

1. Proakis and Manolakis, “Digital Signal Processing”, Prentice Hall 1996. (Fourth Edition).

2. Roberto Cristi, “Modern Digital Signal Processing”, Cengage Publishers, India, (Erstwhile

Thompson Publications), 2003.

Sub Title : Coding Theory



UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Information and Entropy: Sources of information, DMS and Markov.

Properties of Entropy. Entropy of information sources, Extension of a

DMS. 10

2

Information channels, probability relations in a channel, A Priori, A

Posteriori Entropies, Equivocation, Mutual information, Capacity of BSC,

BEC, Noiseless and deterministic channels. 10

3

Source coding: Uniquely EL Dodable codes, Instantaneous codes and its

construction, Average length of a code, Bounds for Average

Length,Kraft'sInequality. R-ary compact codes. Code efficiency,

Redundancy. Shannon-Fano and Huffman code.

11

4 Algebra: Groups, rings and fields, properties of finite fields, Galois field

arithmetic and its realization, Vector spaces, Matrices. 10

5

Channel Coding: Block codes, Minimum distance of a block code,

Singleton bound. Performance of Codes. Hamming codes. Cyclic codes,

Golay Codes BCH codes, R-S codes. Convolutional codes. Viterbi

Algorithm. LDPC Codes.

11


Reference Books: 1. S. Lin and D. J. Costello Jr, “Error Control Coding”, Pearson Prentice Hall, 2004

2. T. K. Moon, “Error Correction Coding: Mathematical Methods And Algorithms”, Student

Edition, John Wiley & Sons, 200

18

Sub Title : SOFT COMPUTING



Course objectives: 1. To provide concepts of soft computing and design controllers based on ANN and Fuzzy systems. 2. To identify systems using soft computing techniques. 3. To give an exposure to optimization using genetic algorithm. 4. To provide a knowledge on hybrid systems.

UNIT

NO.

SYLLABUS CONTENT

No of Hours

Theory Tutorial

1

Biological foundations - ANN models - Types of activation function - Introduction to Network architectures - Multi Layer Feed Forward Network (MLFFN) - Radial Basis Function Network (RBFN) - Recurring Neural Network (RNN).

08 Hours 05 Hours

2

Learning process : Supervised and unsupervised learning - Error-correction learning - Hebbian learning – Boltzmen learning - Single layer and multilayer perceptrons - Least mean square algorithm – Back propagation algorithm - Applications in pattern recognition, Case studies - Identification and control of linear and nonlinear systems.

08 Hours 05 Hours

3

Fuzzy sets: Fuzzy set operations - Properties - Membership functions, Fuzzy to crisp conversion, fuzzification and defuzzification methods, applications in engineering problems.

08 Hours 05 Hours

4

Fuzzy control systems: Introduction - simple fuzzy logic controllers with examples - Special forms of fuzzy logic models, classical fuzzy control problems, inverted pendulum, image processing, home heating system, Adaptive fuzzy systems.

08 Hours 05 Hours

5

Genetic Algorithm: Introduction - basic concepts of Genetic Algorithm, applications. Hybrid Systems: Adaptive Neuro fuzzy Inference System (ANF1S), Neuro –Genetic, Fuzzy-Genetic systems.

08 Hours 05 Hours

Note: Unit numbers: 2 & 5 will have internal choice

Upon successful completion of this course, students will be able to: 1. To design a complete feedback system based on ANN or Fuzzy control.

19

2. To identify systems using soft computing techniques. 3. To use genetic algorithm to find optimal solution to a given problem. 4. To design systems by judiciously choosing hybrid techniques.

Sub Title : Real Time Operating Systems



Course objectives:

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Introduction to Real-Time Embedded Systems: Brief history of

Real Time Systems, A brief history of Embedded Systems.

System Resources: Resource Analysis, Real-Time Service Utility,

Scheduling Classes, The Cyclic Executive, Scheduler Concepts,

Preemptive Fixed Priority Scheduling Policies, Real-Time OS, Thread

Safe Reentrant Functions.

10

2

Processing: Preemptive Fixed-Priority Policy, Feasibility, Rate

Montonicleast upper bound, Necessary and Sufficient feasibility,

Deadline –Monotonic Policy, Dynamic priority policies.

I/O Resources: Worst-case Execution time, Intermediate I/O,

Execution efficiency, I/O Architecture.

Memory: Physical hierarchy, Capacity and allocation, Shared

Memory, ECC Memory, Flash file systems.

11

3

Multi-resource Services: Blocking, Deadlock and livestock, Critical

sections to protect shared resources, priority inversion.

Soft Real-Time Services: Missed Deadlines, QoS, Alternatives to

rate monotonic policy, Mixed hard and soft real-time services.

Embedded System Components: Firmware components, RTOS

system software mechanisms, Software application components.

10

4

Debugging Components: Exceptions assert, Checking return codes,

Single-step debugging, kernel scheduler traces, Test access ports,

Trace ports, Power-On self test and diagnostics, External test

equipment, Application-level debugging.

11

20

Note: Unit numbers: 2 & 5 will have internal choice

Reference Books:

1. Sam Siewert, “Real-Time Embedded Systems and Components”, Cengage Learning India

Edition, 2007.

2. MykePredko, “Programming and Customizing the PIC microcontroller”, 3rd Ed, TMH,

2008.

3. Dreamtech Software Team, “Programming for Embedded Systems”, Jhon Wiley, India

Pvt. Ltd., 2008.

Sub Title : ADAPTIVE SIGNAL PROCESSING

Sub Code: ELD 261 No. of Credits:4= 4:0:0(L-T-P) No. of Lecture hours / week : 4Hrs


Course objectives

1. Analyze adaptive system with examples.

2. Analyze the performance surface of Adaptive filters.

3. Design steepest descent algorithms and analyze the algorithm.

4. Design and Analyze LMS algorithm and applications.

5. Design Kalman filtering using different process

5

Performance Tuning: Basic concepts of drill-down tuning, hardware

– supported profiling and tracing, Building performance monitoring

into software, Path length, Efficiency, and Call frequency,

Fundamental optimizations.

High availability and Reliability Design: Reliability and

Availability, Similarities and differences, Reliability, Reliable

software, Available software, Design tradeoffs, Hierarchical

applications for Fail-safe design.

10

21


Course outcome:

1. Analyze adaptive system with examples.

2. Analyze the performance surface of Adaptive filters.

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Introduction to Adaptive Systems: Adaptive Systems: Definitions,

Characteristics, Applications, Example of an Adaptive System. The

Adaptive Linear Combiner - Description, Weight Vectors, Desired

Response Performance function - Gradient & Mean Square Error

12

2

Development of Adaptive Filter Theory & Searching the

Performance surface: Introduction to Filtering - Smoothing and

Prediction – Linear Optimum Filtering, Problem statement, Principle

of Orthogonality - Minimum Mean Square Error, Wiener- Hopf

equations, Error Performance - Minimum Mean Square Error.

Searching the performance surface – Methods & Ideas of

Gradient Search methods - Gradient Searching Algorithm & its

Solution - Stability & Rate of convergence - Learning Curves.

11

3

Steepest Descent Algorithms: Gradient Search by Newton‟s Method, Method of Steepest Descent, Comparison of Learning

Curves.

10

4

LMS Algorithm & Applications: Overview - LMS Adaptation algorithms, Stability & Performance analysis of LMS Algorithms - LMS Gradient & Stochastic algorithms - Convergence of LMS algorithm. Applications: Noise cancellation – Cancellation of Echoes in long

distance telephone circuits, Adaptive Beam forming.

11

5

Kalman Filtering: Introduction to RLS Algorithm, Statement of

Kalman filtering problem, The Innovation Process, Estimation of

State using the Innovation Process- Expression of Kalman Gain,

Filtering Examples using Kalman filtering

8

22

3. Design steepest descent algorithms and analyze the algorithm.

4. Design and Analyze LMS algorithm and applications.

5. Design Kalman filtering using different process

TEXT BOOKS: 1. Adaptive Signal Processing - Bernard Widrow, Samuel D.Strearns, 2005, PE. 2. Adaptive Filter Theory - Simon Haykin-, 4

th Ed., 2002, PE Asia.

REFERENCE BOOKS: 1. Optimum signal processing: An introduction - Sophocles. J. Orfamadis, 2

nd Ed.,

1988, McGraw-Hill, New York

2. Adaptive signal processing-Theory and Applications - S.Thomas Alexander, 1986,

Springer –Verlag.

3. Signal analysis – Candy, Mc Graw Hill Int. Student Edition

4. James V. Candy - Signal Processing: A Modern Approach, McGraw-Hill,

International Edition, 1988.

Sub Title : MULTIMEDIA COMMUNICATION



UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Multimedia Communications: multimedia information

representation, multimedia networks, multimedia applications,

network QoS and application QoS.

10

2

Information Representation: text, images, audio and video, Text and

image compression, compression principles, text compression, image

compression. Audio and video compression, audio compression, video

compression, video compression principles, video compression

standards: H.261, H.263, P1.323, MPEG 1, MPEG 2, Other coding

formats for text, speech, image and video.

11

23

3

Detailed Study of MPEG 4: coding of audiovisual objects, MPEG 4

systems, MPEG 4 audio and video, profiles and levels. MPEG 7

standardization process of multimedia content description, MPEG 21

multimedia framework, Significant features of JPEG 2000, MPEG 4

transport across the Internet

10

4

Synchronization: notion of synchronization, presentation

requirements, reference model for synchronization, Introduction to

SMIL, Multimedia operating systems, Resource management, process

management techniques.

11

5

Multimedia Communication Across Networks: Layered video

coding, error resilient video coding techniques, multimedia transport

across IP networks and relevant protocols such as RSVP, RTP, RTCP,

DVMRP, multimedia in mobile networks, multimedia in broadcast

networks

10


Reference Books: 1. Fred Halsall, “Multimedia Communications”, Pearson education, 2001

2. K. R. Rao, Zoran S. Bojkovic, Dragorad A. Milovanovic, “Multimedia Communication Systems”,

Pearson education, 2004

3. Raif steinmetz, Klara Nahrstedt, “Multimedia: Computing, Communications and applications”,

Pearson education, 2002

4. Tay Vaughan, “Multimedia: Making it work”, 6th edition, Tata McGraw Hill, 2004

5. John Billamil, Louis Molina, “Multimedia: An Introduction”, PHI, 2002

6. Pallapa Venkataram, “Multimedia Information Systems”, Pearson education (In Press), 2005

24

UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

Introduction: 2D systems, Mathematical preliminaries – Fourier

Transform, Z Transform, Optical &

Modulation transfer function, Matrix theory, Random signals, Discrete

Random fields, Spectral density

function.

Image Perception: Light, Luminance, Brightness, Contrast, MTF of the

visual system, Visibility function,

Monochrome vision models, Fidelity criteria, Color representation,

Chromaticity diagram, Color coordinate

systems, Color difference measures, Color vision model, Temporal

properties of vision.

10

2

Image Sampling and Quantization: Introduction, 2D sampling theory,

Limitations in sampling &

reconstruction, Quantization, Optimal quantizer, Compander, Visual

quantization.

Image Transforms: Introduction, 2D orthogonal & unitary transforms,

Properties of unitary transforms, DFT,

DCT, DST, Hadamard, Haar, Slant, KLT, SVD transform.

11

3

Image Enhancement: Point operations, Histogram modeling, spatial

operations, Transform operations, Multispectral

image enhancement, false color and Pseudo-color, Color Image

enhancement.

Image Filtering & Restoration: Image observation models, Inverse &

Wiener filtering, Fourier Domain filters,

Smoothing splines and interpolation, Least squares filters, generalized

inverse, SVD and Iterative methods,

Maximum entropy restoration, Bayesian methods, Coordinate

transformation & geometric correction, Blind

de-convolution

10

Sub Title : ADVANCES IN IMAGE AND VIDEO PROCESSING



25

4

Image Analysis & Computer Vision: Spatial feature extraction,

Transform features, Edge detection,

Boundary Extraction, Boundary representation, Region representation,

Moment representation, Structure,

Shape features, Texture, Scene matching & detection, Image

segmentation, Classification Techniques.

Image Reconstruction from Projections: Introduction, Radon

Transform, Back projection operator,

Projection theorem, Inverse Radon transform, Fourier reconstruction, Fan

beam reconstruction, 3D

tomography.

11

5

Video Processing: Fundamental Concepts in Video – Types of video

signals, Analog video, Digital video,

Color models in video, Video Compression Techniques – Motion

compensation, Search for motion vectors,

H.261, H.263, MPEG I, MPEG 2, MPEG 4, MPEG 7 and beyond,

Content based video indexing.

10


Text Books: 1. . K. Jain, “Fundamentals of Digital Image Processing”, Pearson Education (Asia) Pte.

Ltd./Prentice Hall of India, 2004.

2. R. C. Gonzalez and R. E. Woods, “Digital Image Processing”, 2nd edition, Pearson

Education (Asia)Pte. Ltd/Prentice Hall of India, 2004.

3. M. Tekalp, “Digital Video Processing”, Prentice Hall, USA, 1995.

REFERENCE BOOKS:

1. Z. Li and M.S. Drew, “Fundamentals of Multimedia”, Pearson Education (Asia) Pte. Ltd.,

2004.

26

Sub Title : DATA ENCRYPTION TECHNIQUES



UNIT

NO.

SYLLABUS CONTENT

No. of

TEACHING

HOURS

1

1. Introduction to Information Security: Introduction; What is

security? Critical characteristics of information; NSTISSC security

model; Approaches to information security implementation; The

SecuritySystem Development Life Cycle; Information Security

Terminology.

2. Planning for Security: Introduction; Information Security Policy,

Standards, and Practices; The Information Security Blue Print.

10

2

Security Technology: Firewalls and VPNs: Introduction, Physical

design, Firewalls, Protecting Remote Connections. Intrusion

Detection, Access control and Other Security Tools: Introduction;

Intrusion Detection Systems (IDS); Honey Pots, Honey Nets, and

Padded cell systems; Scanning and Analysis Tools; Access Control

Devices.

11

3 Information Security maintenance: Introduction; Security

Management Models; The Maintenance Model. 10

4

Introduction to Network Security: Attacks, Services, and

Mechanisms; Security Attacks; Security Services; A model for

Internetwork Security; Internet Standards and RFCs; Wireless

network security.

11

5

Cryptography: Conventional Encryption Principles and Algorithms;

Cipher Block Modes of Operation;Location of encryption devices;

Key distribution; Approaches to message authentication; Secure Hash

functions and HMAC; Public Key Cryptography Principles and

Algorithms; Digital Signatures; Key management.

10

27


TEXT BOOKS:

1. Michael E. Whitman and Herbert J. Mattord: Principles of Information Security, 2nd Edition,

Cengage

Learning, 2005.

2. William Stallings: Network Security Essentials Applications and Standards, Person, 2000.

3. Deven N. Shah: Information Security – Principles and Practice, Wiley India, 2009.

REFERENCE BOOK:

1. Behrouz A. Forouzan: Cryptography and Network Security, Tata McGraw-Hill, 2007.

Graphical Programming using LabVIEW

2. Design of 4 bit Adders (CLA, CSA, CMA, Parallel adders)

3. Design of Binary Subtractors

4. Design of Encoder (8X3), ELDoder(3X8)

5. Design of Multiplexer (8X1), and Demultiplexer (1X8)

6. Design of code converters & Comparator

7. Design of FF (SR, D, T, JK, and Master Slave with delays)

8. Design of registers using latches and flip-flops

9. Design of 8 bit Shift registers

10. Design of Asynchronous & Synchronous Counters

ARM-CORTEX M3

[Programming to be done using Keiluvision 4 and download the program on to a M3

evaluation board such as NXP LPC1768 or ATMEL ATSAM3U].

1. Write an Assembly language program to calculate 10+9+8+.........+1

2. Write a Assembly language program to link Multiple object files and link them together.

3. Write a Assembly language program to store data in RAM.

4. Write a C program to Output the "Hello World" message using UART.

5. Write a C program to Design a Stopwatch using interrupts.

6. Write an Exception vector table in C

Sub Title : Digital Electronics Lab -2



28

7. Write an Assembly Language Program for locking a Mutex.

8. Write a SVC handler in C. Use the wrapper code to extract the correct stack frame

starting location. The C handler can then use this to extract the stacked PC location and

the stacked register values.

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