Dominance
-
Upload
vamsi-somisetty -
Category
Documents
-
view
214 -
download
2
description
Transcript of Dominance
1
Fault equivalent & collapsing
Combinational circuits• faults f and g are equivalent iff Zf(x) = Zg(x)• equivalent faults are not distinguishable
For gate with controlling value c and inversion i :
all input sac faults and output sa(c ⊕ i) faults are equivalent
2
sa0 sa1
sa0 sa1
sa0 sa1sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0sa1
sa0sa1
sa0sa0sa1sa1
sa0
sa1
sa0sa0sa1
sa1
AND
sa0 sa1
sa0 sa1
sa0 sa1NAND
OR
NOR
WIRE/BUFFER
NOT
FANOUT
INVERTER
Equivalence Rules Equivalence ExampleEquivalence Example
sa0 sa1sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
sa0 sa1
Faults in redremoved byequivalencecollapsing
20Collapse ratio = = 0.625
32
Fault DominanceFault Dominance
• If all tests of some fault F1 detect another fault F2, then F2 is said to dominate F1.
• Dominance fault collapsing: If fault F2 dominates F1, then F2 is removed from the fault list.
• When dominance fault collapsing is used, it is sufficient to consider only the input faultsof Boolean gates.
• In a tree circuit (without fanouts) PI faults form a dominance collapsed fault set.
Fault dominaceCombinational circuits if f dominates g => any test that detects g will also detect f . Therefore , only dominating faults must be detected
xy
z
Example :[x, y] is the only test to deletedf1 = y sa1, since it detects f2 = z sa0 => f2 dominates
Fault dominance & collapsing
For gate with controlling value c & inversion i, the output sa(c’⊕i)dominates any input sac’sequential circuits dominance fault collapsing is not useful
Dominance ExampleDominance Example
s-a-1F1
s-a-1F2
001110 010
000101
100011
All tests of F2
Only test of F1s-a-1
s-a-1
s-a-1s-a-0
A dominance collapsed fault set(after equivalence collapsing)
3
Equivalent to sa0 at the input
Equivalent to sa1 at the input
in dominance fault collapsingit is sufficient to consider only the input faults
4
Checkpoint TheoremCheckpoint Theorem• Primary inputs and fanout branches of a combinational circuit
are called checkpoints.• Checkpoint theorem: A test set that detects all single
(multiple) stuck-at faults on all checkpoints of a combinational circuit, also detects all single (multiple) stuck-at faults in that circuit.
Total fault sites = 16
Checkpoints ( ) = 10
5