Differential and Multistage Amplifiers ELZ 303

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Differential and MultistageDifferential and Multistage

AmplifiersAmplifiers

ELZ 303 ELZ 303 -- ElektronikElektronik IIII

Dr. Mehmet SiraDr. Mehmet Siraçç ÖÖzerdemzerdem

ElektrikElektrik ElektronikElektronik MMüüh. Bh. Bööllüümmüü

Dicle Dicle ÜÜniversitesiniversitesi

Microelectronic Circuits – Fourth Edition

Adel S. Sedra, Kenneth C. Smith, 1998 Oxford University Press

Copyright 2004 by Oxford University Press, Inc.

The basic BJT differential-pair configuration.

Microelectronic Circuits - Fifth Edition Sedra/Smith

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Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/Smith

Different modes of operation of the BJT differential pair

The differential pair with a common-mode input signal vCM

Mode 1

Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/SmithThe differential pair with a “large” differential input signal.

Mode 2


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The differential pair

with a large differential

input signal of polarity

opposite to that in

mode2.



Mode 3


The differential pair

with a small differential

input signal vi. Note that

we have assumed the

bias current source I to

be ideal (i.e., it has an

infinite output

resistance) and thus I

remains constant with

the change in vCM.


Mode 4

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Large-Signal Operation of the BJT Differential Pair




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Small-Signal Operation of the BJT Differential Amplifier


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Copyright 2004 by Oxford University Press, Inc. 13

An alternative viewpoint



An alternative viewpoint with emitter resistances

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Input Differential Resistance



Differential Voltage Gain


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Differential Voltage Gain


If the output is taken differentially,

If the output is taken single-endedly,

For the differential amplifier with emitter resistances,

if the output is taken differentially,


Equivalence of the Differential Amp. to a Common Emitter Amp.

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The differential half-circuit


Input resistance =



The differential amplifier fed in a single-ended fashion.

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(a) The differential amplifier fed by a common-mode voltage signal vicm.

(b) Equivalent “half-circuits” for common-mode calculations.

Common- Mode Gain (Assume that the circuit is perfectly symmetric)



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If the output is taken single endedly, the common mode gain

Since in this case the differential gain is

The common-mode rejection ratio (CMRR)

The common-mode rejection ratio (CMRR) in dB



Common- Mode Gain (Assume that the circuit is NOT symmetric)

For a mismatch Rc in the collector resistances

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Common- Mode Gain

The circuit is symmetric The circuit is NOT symmetric

>

CMRR CMRR<


(a) Definition of the input common-mode resistance Ricm.

(b) The equivalent common-mode half-circuit.

Input Common-Mode Resistance (Ricm)

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Input Common-Mode Resistance (Ricm)


Example


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Copyright 2004 by Oxford University Press, Inc. 29Microelectronic Circuits - Fifth Edition Sedra/Smith

Other nonlinear characteristics of the differential amplifier

The BJT differential pair with both

inputs grounded.

If the two sides of the differential

pair were perfectly matched, then

the current I would split equally

between Q1 and Q2, and Vo would

be zero.


Practical circuits exhibit mismatches

that result in a dc output voltage Vo

even with both inputs grounded.

Vo : The output dc offset voltage

VOS = VO / Ad

Vos : The input offset voltage

Ad : The differential gain


If we apply a voltage –Vos between the input terminals, then the

output voltage will be reduced to zero.

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Let the transistors have a mismatch in the load resistance Rc1 and Rc2.



Let the transistors have a mismatch in the load resistance Rc1 and Rc2.

Example

Consider the situation where the collector resistors are

accurate to within ±1%. Then the worst case mismatch will be

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Let the transistors have a mismatch in their emitter-base junction areas.



Let the transistors have a mismatch in their emitter-base junction areas.

Example

An area mismatch of 4% gives rise to ( Is/Is)=0.04 and input

offset voltage of 1mV.

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Let the transistors have a mismatch in

In a perfectly symmetric differential pair

A mismatch in make the two input dc current unequal. The

resulting difference is the input offset current, IOS .



Let the transistors have a mismatch in

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Biasing in BJT integrated Circuits


The diode-connected transistors




The Current Mirror

IREF=IO

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Copyright 2004 by Oxford University Press, Inc.Microelectronic Circuits - Fifth Edition Sedra/SmithAnalysis of the current mirror taking into account the finite of the BJTs.


The Current Mirror

IREF=IO



A simple current source

IREF=IO

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Current

steering

circuits




Improved current source circuits

1A current mirror

with base-current

compensation.

IREF=IO

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2

The Wilson bipolar

current mirror

IREF=IO




3

The Widlar

current source

IREF IO

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Example


Io=10μA (Const.)

R1=?

Assume that

VBE=0.7V at a

current of 1mA.



Example


Io=10μA (Const.)

R1=? R3=?

Assume that

VBE=0.7V at a

current of 1mA.

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Example

A four-stage

bipolar op amp


Example

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MOS Differential Amplifiers



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At the bias point, vid=0

Eqn. (1)



vGS1 - vGS2 = vid = 0 → vGS1 = vGS2 = VGS

Eqn. (2)

Reform of Eqn. (1)

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For small-signal approximation

Reform of

Eqn. (2)



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(a) The MOS differential pair with both inputs grounded. Owing to

device and resistor mismatches, a finite dc output voltage VO results.

(b) Application of a voltage equal to the input offset voltage VOS to

the terminals with opposite polarity reduces VO to zero.


Offset Voltage





Let the transistors have a mismatch in load resistance

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Let the transistors have a mismatch in the W/L ratios




Let the transistors have a mismatch in the W/L ratios

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Let the transistors have a mismatch in the Vt




Let the transistors have a mismatch in the Vt

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Current Mirrors



Current Mirrors

ID1

ID2

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Current Mirrors



Current Mirrors

The Wilson MOS mirror

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Current Mirrors

Modified circuit.


Multistage Amplifiers

Example

a) input resistance ?

b) voltage gain

c) output resistance ?

= 100

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Equivalent circuit for calculating the gain of the input stage

of the amplifier

Example (cont.)

a)



Equivalent circuit for calculating the gain of

the second stage of the amplifier

Equivalent circuit for

calculating the gain of the

input stage of the amplifier

Example (cont.)

b)

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Equivalent circuit for evaluating

the gain of the third stage in the

amplifier

Example (cont.)

b)



Equivalent circuit of the

output stage of the amplifier

Example (cont.)

b)

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Example (cont.)

c)


Analysis Using Current Gains

The circuit of the multistage amplifier prepared for small-

signal analysis. Indicated are the signal currents throughout

the amplifier and the input resistances of the four stages.

Differential and Multistage Amplifiers ELZ 303

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