Dft Rn DFTAdvisor

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Chapter 4DFTAdvisor

This chapter provides release note information for the scan identification and insertionapplication, DFTAdvisor. The applicable information for V8.2004_2.10 is presented first,followed by reference copies of the information for the releases that proceeded it:

V8.2004_1.10 Release Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4V8.2003_5.10 Release Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7V8.2003_4.10 Release Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9V8.2003_3.10 Release Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12V8.2003_2.10 Release Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14

The latter is provided so you have an easily accessible record of the changes, enhancements,and DR fixes that were incorporated in the tool in the recent past.

V8.2004_2.10 Release Notes

Changes and EnhancementsThis section describes changes, enhancements, and updates required to your design, andincompatibilities related to DFTAdvisor, V8.2004_2.10. Refer to “Changes and Enhancements”on page 1-1 of Chapter 1 for the changes and enhancements that affect all DFT products.

New FeaturesV8.2004_2.10 contains the following changes and new features.

• Case-sensitive Treatment of Verilog Netlists

DFTAdvisor now treats Verilog input netlists as case sensitive by default, as the IEEE Std1364 specifies. In previous releases the tool treats all netlists as case-insensitive by default. Anew switch, -Insensitive, has been added to the dftadvisor shell command that enables the oldbehavior in case either your Verilog input netlist or DFT library depend on it.

Incompatibility with Previous VersionsDFTAdvisor, V8.2004_2.10, has the following backward compatibility issues.

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• Starting with the V8.2004_2.10 software, DFTAdvisor treats Verilog input netlists as casesensitive by default, as the IEEE 1364 standard specifies. In previous releases, the tool treatsall netlists as case-insensitive by default.

The case setting affects both your Verilog input netlist and your DFT library; if eitherdepends on the old default, you will need to add the new -Insensitive switch to your toolinvocation. If you previously invoked the tool using the -Sensitive switch, you no longerneed to use it.

NoteSymptoms that the sensitivity setting might be wrong include error messages about notfinding models or pins.

Corrected Problems

NoteMentor Graphics recently converted to a new defect tracking system with a differentnumbering scheme. In the following descriptions, the first number listed is the new DRnumber. The second number is the old number (prefixed with “SC”). Both are shown inSupportNet web-based support services.

V8.2004_2.10 contains the following DR fixes for DFTAdvisor problems. DR fixes forproblems observable in DFTAdvisor, but which existed in the Vector Interfaces application, arealso included in this release. Please refer to the Vector Interfaces chapter for descriptions ofthese fixes.

• DR 00034448 (previously SC312362) — Lockup latch had floating clock when inserted attop between modules.

Description: Tool was not able to connect clock pins of the inserted lockup cells when scancell stitching order was specified by user in a fixed-order file.

Resolution: This problem has been fixed.

• DR 00098662 (previously SC307827) — Unable to add lockup latch with inverted clock.

Description: Tool did not handle lockup latch insertion when the clock pin was inverted.


• DR 00100353 (previously SC332728) — Tool incorrectly inserted active high lockup latch+ inverted.

Description: Tool inserted active high latch for a lockup latch, instead of an active low latch.


• DR 00173783 — Analyze Control Signals -Auto_fix command generated unexpected errors.

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Description: Tool generated unexpected errors when Analyze Control Signals command wasissued with -Auto_fix switch in DFT mode.

Resolution: This problem has been resolved by disallowing the use of this switch in DFTmode.

• DR 00174482 — Tool can’t stitch existing scan cells.

Description: Tool inserted extra muxes on the scan enable lines of the flops to control themduring scan operation.


• DR 00176929 — Scan insertion with order file was not working.

Description: Tool reported incorrect error message when checking a positive to negativeedge transition in chain prior to lockup latch insertion whose positions are specified in a fixedorder file.


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New FeaturesV8.2004_1.10 contains the following changes and new features.

• Stitching of Sub Chains When Scan Output Connected to Scan Input

Previously, the tool did not accept subchains in the original netlist when the scan inputs wereconnected to scan outputs with a self-loop. Now, the tool supports self-loop subchainsdeclared on both library and submodule instances. In addition, subchains with scan inputsconnected to tie values/instances are supported.

• Stitching of Chains With Multiple Scan Enables Per Clock

The tool behavior has been enhanced in the case where you specify a scan cell order file forstitching scan chains. Previously, the tool created one scan enable per scan chain when “SetMultiple Scan_enable On” was specified. Now, the tool’s behavior can be summarized asfollows:

1. If only “Set Multiple Scan_enable On” is specified, the tool generates an individual scanenable pin per chain.

2. If both “Set Multiple Scan_enable On” and “Add Clock Groups ...” commands arespecified, the tool generates as many scan enable pins as the number of clock groupsspecified. The tool assumes that you mix clocks and edges arbitrarily in the order files,which has the same effect of the “-Clock merge” and “-Edge merge” options for theInsert Test Logic command.

• Improved Alias Command

Issuing the command “Help <aliased_cmd>” will report the name of the command and thedefinition which you specified via the Alias command when <aliased_cmd> was created.Using the help command with an aliased command name will generate an Alias report of thefollowing format:

// alias: <alias_cmd>=<alias_definition>

Also, if the Alias command is used without any argument, all aliased commands will belisted using the same format the Korn-shell alias commands use. Using the Alias commandwith no arguments will list all aliased command with the following format:

<alias_cmd1>=<alias_definition1>

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<alias_cmd2>=<alias_definition2>...<alias_cmdN>=<alias_definitionN>

In addition, using the Alias command with a single argument will, if the argument is analiased command name, report the name and definition of that command, again using Korn-shell syntax. Using the Alias command with a single argument will report using the followingformat:

<alias_cmd>=<alias_definition>

Incompatibility with Previous VersionsDFTAdvisor, V8.2004_1.10, has no backward compatibility issues:

Corrected Problems



• DR 00099317 (previously SC331533) — With multiple fan outs, the end point of scan chainwasn’t connected correctly.

Description: Tool was not able to connect the scan output correctly when the last scan cell inthe chain had a functional path connected via a bus signal.


• DR 00118518 (previously SC334329) — Tool exited while processing help on an aliasedcommand.

Description: The Help command failed when used with a user command defined via theAlias command.

Resolution: This has been fixed. Now, “Help <aliased command>” reports the aliasedcommand name and its definition.

• DR 00166893 — Unexpected errors while reading in scan order file.

Description: Tool exited prematurely when stitching scan cells from a given fixed-order file.

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New FeaturesV8.2003_5.10 contains no new features.


Corrected Problems



• DR 00073748 (previously SC323473) — Issue with Add Scan Pins -Cut command.

Description: Using the Add Scan Pins command to specify internal points in a customerdesign caused an unexpected error.


• DR 00086417 (previously SC327051) — Add Scan Pins -Cut does work for top buffers.

Description: The tool was not able to connect the last scan cell in a chain to the user-specified internal scan output port.


• DR 00095053 — Tool generated an unexpected error when verifying scan.

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Description: DFTAdvisor no longer generates an unexpected error on either Solaris or Linuxplatforms, due to related fixes in the tool.


• DR 00125781 — Delete primary input functionality has changed.

Description: If a primary input or output pin of system class was deleted using thecommand:

DELete PRimary Outputs {net_pathname... | primary_output_pin...| -All} [-Class {User | System | Full}]

The deleted pin did not appear in the output netlist outputted using the command:

Write Netlist <filename> -Verilog -Replace


• DR 00128063 — Unexpected errors during DRC.

Description: DFTAdvisor generated unexpected error messages when non-scan model for anexisting lssd scan cell was not defined in atpg library.


• DR 00147730 — Unexpected error if cell_id in subchain stitch file is incorrectly repeated.

Description: The tool generated unexpected errors when the cell_id field a subchain cell in afixed-order file was incorrectly repeated.

Resolution: This error condition is now handled with an appropriate message.

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New FeaturesThis V8.2003_4 release contains the following new feature.

• Ability to Set the DISPLAY Variable Without Ending the Current Session

A new command, Set Display, enables you to solve a display failure resulting from an unsetDISPLAY environment variable without exiting the tool. In previous releases you have toexit the tool, set the variable in the shell, then reinvoke. Now you can simply issue the newcommand and proceed with your work.

SET DIsplay display_name

For more information, refer to the Set Display command in the DFTAdvisor Reference Manual.

• New -Manual Invocation Switch Quickly Opens the DFT Bookcase

A new invocation switch, -Manual, gives you access to the DFT documentation with thetool’s invocation shell command. At a shell prompt, simply enter“$MGC_HOME/bin/dftadvisor -manual” to quickly open the DFT documentation in the PDFviewer.

For more information, refer to the dftadvisor shell command in the DFTAdvisor ReferenceManual.


Corrected Problems


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The V8.2003_4.10 software contains the following DR fixes for DFTAdvisor problems. DRfixes for problems observable in DFTAdvisor, but which existed in the Vector Interfacesapplication, are also included in this release. Please refer to the Vector Interfaces chapter fordescriptions of these fixes.

• DR 00041208 (previously SC314244) — Test_setup procedure is not correct.

Description: If a test_setup procedure was loaded into DFTAdvisor during setup, when theWrite Atpg Setup command is used to save the procedure file after scan insertion, it waspossible for the test_setup procedure to be incorrect.


• DR 00084927 — Manual switch does not work properly.

Description: Help <command> -Manual was not working properly for the 64-bit version ofthe ATPG tools.


• DR 00102600 — Report test logic not giving all the test points.

Description: The following two problems reported in this DR have been fixed.

o Neither the Report Test Logic or the Report Test Points command reveals the factthat DFTAdvisor performs scan cell sharing for multiple test points whereappropriate. As a solution, a new column is printed in the output of Report TestLogic to show the instance pathname for the new scan cell inserted for the test point,when the command is issued after the Insert Test Logic command.

o The current functionality of DFTAdvisor determines the clock pin connection of atest point scan cell automatically. With this fix, the user will be able to specify theclock pin for a test point given via Add Test Point command. As part of this fix,DFTAdvisor will determine the clock pin connection for the newly inserted scan cellonly if the user does not supply the command with a clock pin pathname.

Resolution: These problems have been fixed.

• DR 00128753 — Extra scan inputs/outputs generated by DFTAdvisor.

Description: DFTAdvisor was inserting extra scan inputs/outputs when internal scan I/Owas specified by the user.


• DR 00140701 — DFTAdvisor fails to insert testpoint when previous versions worked.

Description: DFTAdvisor was not able to insert test logic correctly, and as a result it wasexiting prematurely with an error message.


• DR 00141364 — Reading VHDL netlist caused unexpected errors.

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Description: On HP workstations, for some VHDL designs with wide ports having rangesthat did not originate from zero (e.g., (3 TO 16)) the netlist reader could unexpectedly exit.


• DR 00141617 — The Add Observation Cell command does not comply with referencedocumentation.

Description: With this fix, if the user specifies an output_pin_pathname for an observe pointvia Add Test Point command, and he/she specifies a new scan cell to be used, the reportedwarning message will not be printed in the transcript and it will be used as a clock pin for thescan cell.


• DR 00148601 — Scan enable pin of scan cell driven from another scan cell.

Description: The tool was unable to connect the scan enable signal to the scan cells correctlywhen the scan enable pin existed at the top level and routed down the hierarchy.


• ER 00126456 — Option to define the clock when doing test point insertion.

Description: When a user specifies a control/observe point with a scan cell option via AddTest Point command, DFTAdvisor currently determines the clock pin connection of the scancell automatically. With this enhancement, the user will be able to specify the clock pin forthe scan cell with the input_pin_pathname or the output_pin_pathname options of the AddTest Point command.

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New FeaturesThis V8.2003_3 release contains no new features.


Corrected Problems


The V8.2003_3.10 software contains the following DR fixes for DFTAdvisor problems. DRfixes for problems observable in DFTAdvisor, but which existed in the Vector Interfacesapplication, are also included in this release. Please refer to the Vector Interfaces chapter fordescriptions of these fixes.

• DR 00122878, 00121267, 00121875, 00101898 (previously SC334468) — DEFincompatible with Magma scan chain reordering flow.

Description: DFTAdvisor was not generating the correct scan DEF file for the Magmalayout tool.


• DR 00124890 — Dofile required active low reset, but tool inserted active high reset.

Description: DFTAdvisor was not able to generate correct dofile and test procedure fileswhen a testcase-specified reset pin existed in the original design and that pin was to be usedduring test logic insertion.


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• DR 00125670 — DFTAdvisor required dummy non_scan_models on “Ripup Scan Chains -Keep_scancell” command.

Description: DFTAdvisor required the existence of a non-scan model for the scan cells in thedesign after executing a scan chain rip-up, even though the user specified the “-Keep_scancell” option with the Ripup Scan Chains command.


• DR 00129761 — Unexpected errors during scan insertion.

Description: DFTAdvisor generated unexpected errors during scan insertion, after issuingthe Synthesize command.


• DR 00141341 — Tool generates incorrect error when using wrong clock definitions usingAdd Scan Pins command.

Description: DFTAdvisor generated incorrect error messages during the execution of theInsert Test Logic command, due to a user’s incorrect clock specification with Add Scan Pinscommand.

Resolution: The tool now detects this condition and exits with an appropriate error message.

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New FeaturesDFTAdvisor, V8.2003_2.10, contains no new features.

Updating Your DesignFor the 8.2003_2 version of DFTAdvisor, no changes are required to your design before youcan open it in this new release of DFTAdvisor.

Incompatibility with Previous VersionsThe 8.2003_2 version of DFTAdvisor has no backward compatibility issues.

Corrected ProblemsDFTAdvisor V8.2003_2.10, includes the following DR fixes, along with the problemcorrections in the patch to version 8.2003_1:

• Patch V8.2003_1.20

DR fixes for problems observable in DFTAdvisor, but which existed in the Vector Interfacesapplication, are also included in this release. Please refer to theVector Interfaces chapter for descriptions of these fixes.

Problems Corrected in This Release


The 8.2003_2 version fixes the following DFTAdvisor problems:

• DR 00021373 (previously SC286092) — Negative edge flip-flop illegal in library

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Description: DFTAdvisor generated an error message when attempting to read a DFTLibrary when the fall_edge attribute was used for the port CK of a dual port latch. If the cellwas modeled using a primitive to invert the clock, no error message was generated.


• DR 00030705 (previously SC188861) — Error generated for scan cell with array definition

Description: A customer attempted to generate a model for a scan cell that containedmultiple sequential elements and had array inputs. If the scan definition was placed beforethe input/output definition, the tool incorrectly generated an error about undefined arrays.


• DR 00059513 (previously SC319340) — What do the “-Sub” and “-Clock” in the AddSubchain command do?

Description: The description of several options of the Add Sub Chain command in theDFTAdvisor Reference Manual were unclear.

Resolution: The description of the Add Sub Chain command options in the reference manualhave been updated. In particular, “-Clock”, “-Subclock”, and“-Stable” switches of mux_scan type sub-chain have been clarified.

• DR 00105470 (previously SC338495) — EDIF netlist generates error message

Description: An EDIF testcase containing indexed scalar ports generated an error message inDFTAdvisor.

Resolution: This has been fixed by adding a switch at the tool invocation level. If the tool isinvoked with the “-Ignore_indexing” switch, the tool will ignore indexed scalar ports. It willnot try to aggregate them into a single bus as it does without this switch.

• DR 00107235 (previously SC340460) — DFTAdvisor places {} brackets around bussedsignals

Description: When writing out a netlist, DFTAdvisor placed {} brackets around bussedsignals in module instantiations. Some tools generate an error when reading in a netlist withthese illegal constructs.

Resolution: The tool has been modified to only use {} brackets to concatenate individual bitsinto an array, and not to group an existing bus/array signal in Verilog.

• DR 00107959 (previously SC341262) — Tail register is inserted incorrectly.

Description: DFTAdvisor was not able to insert the tail register correctly.


• DR 00119300 — Tool is adding an extra MUX during scan insertion.

Description: DFTAdvisor did not correctly recognize existing scan cells in the design duringscan insertion.


Reference Help

• DR 00121041 — Write Scan Order command generates unexpected errors.

Description: On a customer design, the tool generated unexpected error messages when theWrite Scan Order command was issued.


• DR 00122766 — Array syntax in model causes error messages

Description: Some usage of array pins in a DFT library scan model caused the libraryparsing to fail. Now the nonscan statement in a scan definition can safely use the pin arrayname in the port mapping.


Patch V8.2003_1.20The V8.2003_1.20 patch fixes the following DFTAdvisor problem:

• DR 00108220 (previously SC341545)

The tool generated an unexpected error message when inserting a partition type scan chain.This problem has been fixed.

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