Development of CMOS Pixel sensors (CPS) for vertex detectors in present and future collider...
-
Upload
melissa-margery-edwards -
Category
Documents
-
view
219 -
download
0
Transcript of Development of CMOS Pixel sensors (CPS) for vertex detectors in present and future collider...
Development of CMOS Pixel sensors (CPS) for Development of CMOS Pixel sensors (CPS) for vertex detectors in present and future collider vertex detectors in present and future collider
experimentsexperiments
On behalf of IPHC-Strasbourg group (CNRS & Université de Strasbourg)
Auguste Besson
14th ICATPP Conference, 23-27 September 2013
• CMOS pixels sensors Main features and state of the art STAR PXL detector ILD VTX detector
• Toward new applications 0.18 m technology ALICE ITS upgrade Lab & beam test results
• Summary
14th ICATPP Conference, 2013 Auguste Besson 2
CMOS pixel sensor (CPS) for charged particle detectionCMOS pixel sensor (CPS) for charged particle detection
• Main features– Monolithic, p-type Si
Signal created in low doped thin epitaxial layer ~10-20 m ~ 80 e- /m total signal ~ O(1000 e-)
– Thermal diffusion of e- Limited depleted region Interface highly P-doped region: reflection on boundaries
– Charge collection: N-Well diodes Charge sharing resolution
– Continuous charge collection No dead time
• Main Avantages– Granularity
Pixel pitch down to 10 x 10 m2 spatial resolution down to ~ 1 m)– Material budget
Sensing part ~ 10-20 m whole sensor routinely thinned down to 50 m– Signal processing integrated in the sensor
Compacity, flexibility, data flux– Flexible running conditions
From 0°C up to 30-40°C if necessary Low power dissipation (~ 150-250 mW/cm2) material budget Radiation tolerance: >~100s kRad and O(1012 neq) f(T,pitch)
– Industrial mass production Advantages on costs, yields, fast evolution of the technology, Possible frequent submissions
• Main limitation– Industry adresses applications far from HEP experiments concerns
Different optimisations on the parameters on the technologies– Recently: new accessible processes:
Smaller feature size, adapted epitaxial layer Open the door for new applications
14th ICATPP Conference, 2013 Auguste Besson 3
State of the art (1)State of the art (1)
• IPHC-Strasbourg and collab.– CPS developped since ~ 1999– Typical performances in AMS 0.35 m technology
Detection efficiency 99.9% with fake rate ~ 10-5
Typical spatial resolution (20 m pitch) : ~1.5 m (analog output)~3.5 m (digital output)
• Read-out architecture with digital output– In pixel preamplification and CDS– Column parallel rolling shutter read-out
Continuous read-out Integration time = #rows x row r.o. time (100ns) End-of-columns discriminators Data sparsification (0-suppression)
enhances r.o. speed with preserving material budget, granularity and power comsumption
Analog outputDigital output
14th ICATPP Conference, 2013 Auguste Besson 4
State of the art (2): current applicationsState of the art (2): current applications
• EUDET pixel telescope– Beam telescope (FP6 project)
6 x Mimosa-26 planes (// r.o. and dig output) Successfully operating since 2008
• STAR PXL detector– First vertex detector equipped with CPS
2 layers = 40 ladders x 10 sensors First sectors (3/10) installed May 2013 Commissioning completed End of construction under way
• Prototype: Mimosa-28 (Ultimate) AMS 0.35 m techno with high resisitivity epitaxial layer 960 x 928 pixels, 20.7 m pitch 3.8 cm2
In pixel CDS & ampli, collumn parallel read-out End of column discri. and binary charge encoding On chip zero suppression
14th ICATPP Conference, 2013 Auguste Besson 5
Mimosa-28 (=Ultimate) performancesMimosa-28 (=Ultimate) performances
• Operating conditions– JTAG + 160 MHz– Temperature
35°C
– Read-out time = 200 s Suited to 106 part/cm2/s
– Power comsumption 150 mW/cm2
• Performances– Noise ~ 15 e- ENC @ 35°C– Eff vs fake rate– Spatial resolution
charge sharing sp ~ 3.5 m
– Radiation tolerance 3.1012neq/cm2 + 150 kRad @ 35 °C
reached performances meets specifications
14th ICATPP Conference, 2013 Auguste Besson 6
CPS and vertex detector optimisation: squaring the CPS and vertex detector optimisation: squaring the circlecircle
• Vertex detector design and specifications– Physics performances
Spatial resolution Material budget multiple scattering
– Experimental environment constraints Radiation hardness (ionising and non ion. rad.) Occupancy Read-out speed Power dissipation cooling ?
– Other parameters Costs, fabrication reliability and flexibility Mechanical integration Geometry Alignment issues
• Interdependance of these parameters– e.g. lower radius of inner layer
Better i.p. but larger occupancy, higher rad. Needs higher read-out speed and/or granularity power dissipation
CPS presents an attractive trade off with respect to all these parameters
14th ICATPP Conference, 2013 Auguste Besson 7
An example of vertex detector optimisation: ILD @ An example of vertex detector optimisation: ILD @ ILCILC
• Baseline: (cf. ILC - Detector Baseline Document)– Spatial resolution/material budget
– Occupancy 1st layer: ~ 5 part/cm2/BX few % occupancy max– Radiations: O(100 krad) et O(1x1011 neq (1MeV)) / year– Power dissipation: 600W/12W (Power cycling, ~3% duty cycle)
• Proposed geometry:– 3 x double sidded ladders
Optimize material budget / alignment.
• 2 designs:– Double sidded inner ladders : Priority to r.o. speed & spatial resolution 2 faces: resolution / speed (elongated pixels) Pitch 16x16m2/ 16x64m2 + binary charge encoding tread-out ~ 50s/10s ; res ~ 3 m/6m 2012: Mimosa-30 prototype (AMS 0.35 m) with 2 sided read-out
– Outer ladders: power dissipation Minimize Pdiss while keeping good spatial resoution Pitch ~ 35x35 m2 + ADC 3-4 bits tread-out ~ 100 s 2012: Mimosa-31 prototype (AMS 0.35 m) with 4-bit ADC
Toward new applicationsToward new applications
14th ICATPP Conference, 2013 Auguste Besson 9
Upgrade for more demanding applicationsUpgrade for more demanding applications
• CPS are also considered by forthcoming projects– CBM @ FAIR (>2016): baseline– ILD @ ILC@ 500 GeV: TDR option– ALICE @ LHC: baseline for ITS upgrade
• ILC motivations– Robustness with respect to predicted beam background occupancy– Capabilities to stand the increased occupancy @ 1 TeV (x3-5)– Stand alone tracking capabilities (low momentum tracks)
• How to improve read-out speed ?– Elongated pixels (+staggered pixels)
Less row per column Allow in pixel discriminator r.o 2 x faster
– More parrallelisation 2 or 4 rows read out simutaneously r.o 2-4 x faster Sub arrays read out in // r.o 2-4 x faster Only possible in smaller feature size process (0.18 m) see next slide
higher particles rates
14th ICATPP Conference, 2013 Auguste Besson 10
Evolving to an optimal process: Tower-Jazz 0.18 Evolving to an optimal process: Tower-Jazz 0.18 mm
• CMOS 0.35m process does not allow to fully exploit the potential of CPS
• Main limitations of 0.35m:– Feature size in pixel circuitry, r.o. speed, power comsumption, radiation
hardness
– Number of metal layers in pixel circuitry, r.o. speed, insensitive area
– Clock frequency data output
– Epitaxial layer flexibility: (thickness and resistivity) Charge collection/sharing
• Tower-Jazz 0.18 m– Smaller feature size process – Stitching multi chips slabs (yield ?)
– 6 metal layers in pixel discri.
– Deep P-well small pitch in pixel discri.
– higher epitaxial resistivity (1-6 k.cm), epi thickness 18-40 m Enhances signal
Higher read-out speed, higher radiation tolerance
Faster and smarter pixels
14th ICATPP Conference, 2013 Auguste Besson 11
Validation of the 0.18Validation of the 0.18m technology m technology roadmaproadmap
• Goal: ALICE ITS upgrade (cf. TDR draft) scheduled for 2017-18 LHC shutdown– Addionnal L0(22mm) + replacement of inner layers– scheduled for 2017-18 LHC long shutdown
(See talks by Beolè and Bufalino) 0.25-1 MRad + 0.3-1x1013neq/cm2
Chip sensitive area 1x3 cm2
• STEP 1 (2012): First prototypes Validation of MIP detection performances
• STEP 2 (2013):
• STEP 3 (2014-15): 2 strategies
Read-out architectureRead-out architecture Pixels architecturePixels architecture
SparsificationSparsification
Charge encodingCharge encoding
Engineering run Tower 0.18 mEngineering run Tower 0.18 m
Mimosa-22THRA1/A2 (1l)Mimosa-22THRB (2l)
SUZE-02
Noise: Mimosa-32N1/N2Optimisation Mimosa-32FEEPixels/diodes dim.: Mimosa-34
AROM-0 (1bit)MIMADC (3bits)
ASTRALMISTRAL
Inner layers 0.3% X0 Spatial resolution ~ 4 m Read-out speed ~ 10-30 s
Col. // read-out with in pixel ampli. Simultaneaous 2 rows encoding (x2 faster) Read-out speed ~ 30 s
In pixel discri & 2/4-row encoding 2-4 x faster than M22THR r.o. speed ~ 10-20 s Pdiss ~< 150-200 mW / cm2
14th ICATPP Conference, 2013 Auguste Besson 12
Validation of the 0.18Validation of the 0.18m technology m technology roadmaproadmap
• Goal: ALICE ITS upgrade (cf. TDR draft) scheduled for 2017-18 LHC shutdown– Addionnal L0(22mm) + replacement of inner layers– scheduled for 2017-18 LHC long shutdown
(See talks by Beolè and Bufalino) 0.25-1 MRad + 0.3-1x1013neq/cm2
Chip sensitive area 1x3 cm2
• STEP 1 (2012): First prototypes Validation of MIP detection performances
• STEP 2 (2013):
• STEP 3 (2014-15): 2 strategies
Read-out architectureRead-out architecture Pixels architecturePixels architecture
SparsificationSparsification
Charge encodingCharge encoding
Engineering run Tower 0.18 mEngineering run Tower 0.18 m
Mimosa-22THRA1/A2 (1l)Mimosa-22THRB (2l)
SUZE-02
Noise: Mimosa-32N1/N2Optimisation Mimosa-32FEEPixels/diodes dim.: Mimosa-34
AROM-0 (1bit)MIMADC (3bits)
(next slides)
(next slides)
ASTRALMISTRAL
Inner layers 0.3% X0 Spatial resolution ~ 4 m Read-out speed ~ 10-30 s
(next slides)
Col. // read-out with in pixel ampli. Simultaneaous 2 rows encoding (x2 faster) Read-out speed ~ 10-30 s
In pixel discri & 2/4-row encoding 2-4 x faster than M22THR Pdiss ~< 150-200 mW / cm2
14th ICATPP Conference, 2013 Auguste Besson 13
STEP 1: Tower-Jazz 0.18 STEP 1: Tower-Jazz 0.18 mm
• 2012: First prototypes (M32 & M32ter)– Validation of MIP detection performances (120 GeV/c Pions @ CERN)
Charge collection properties, pitch, in pixel amplification, CDS, etc. Beam test: SNR & det.eff. 20 m pitch (1MRad, 1013 neq/cm2 @ 30 °C)
– Remaining room for improvement Suspected RTS noise
14th ICATPP Conference, 2013 Auguste Besson 14
STEP 1: Resolution with digital outputSTEP 1: Resolution with digital output
• Resolution obtained from analog data + simulated binary charge encoding– Spatial resolution vs discriminator threshold scan
AMS 0.35 (Mi 28) 20.7x20.7 m2 pitch
THR 0.18 (Mi 32) 20x20 m2 pitch
THR 0.18 (Mi 32) 20x40 m2 pitch
14th ICATPP Conference, 2013 Auguste Besson 15
• MIMOSA-22THRA1 design (adapted from M28-STAR)– 128 col. x 320 rows (22x22/33 m2)
+ end of col. discri– 8 col. with analog output for tests– Rolling shutter (single row) read-out
tr.o. ~ 50 s– RTS noise optimisation:
enlarged preamp T gate– 4 different submatrices
Study RTS– Different epitaxial layers
18m(HR18), 20m(HR20), etc.
• Beam Test (5GeV e- @ DESY)– Det.Eff. ~ 99.5 % with fake 10-5 (lab test)
Few 10-3 inefficiency may come from track-hit mismatch (under investigation)
STEP2: Read-out architecture STEP2: Read-out architecture M22 THRA1 M22 THRA1 resultsresults
14th ICATPP Conference, 2013 Auguste Besson 16
M22 THRA1 results : digital partM22 THRA1 results : digital part
• Fixing the Noise tail– Enlarge pre-amp transistor gate dimension
Right: L/W = 0.18/1 m Tail Left: L/W = 0.36/1 m TN ~ 17 e-
• Efficiency – fake rate – vs discri threshold scan– Different epitaxial layers
thicknesses 18m(HR18), HR20,
HR30
14th ICATPP Conference, 2013 Auguste Besson 17
M22 THRA1 results : analog part (S2)M22 THRA1 results : analog part (S2)
• Anlog part of M22 THRA1 HR18 @ 30°C:– SNR of cluster seed pixel ~ 34 (in agreement with M32ter values)
14th ICATPP Conference, 2013 Auguste Besson 18
Step 2: Pixel optimizationStep 2: Pixel optimization M34 results M34 results
• Mimosa 34: explores various pixel dimensions (pitch, diode, etc.)– Different epitaxial layer thickness 18m (HR18), 20m (HR20)– Signa-to-Noise ratio distribution– e.g. 22x33 m2 (2T) pixels @ 30 °C
~0.1% of cluster with SNR <8
diode size optimisation 8 m2 prefered
14th ICATPP Conference, 2013 Auguste Besson 19
SummarySummary
• CPS have reached a level of maturity which allow them to equip vertex detector of HEP experiments whose specifications are governed by:– Spatial resolution, material budget, power dissipation and costs.– 0.35 m technology already suited for STAR-PXL, ILC@ 500 GeV, etc.
• 0.18 m technology will allow to exploit fully the potential of the technology– Promising results on first prototypes– More demanding applications are now possible
Faster read-out O(few s), enhanced rad. tol. O(1014 neq/cm2 + 10MRad @ 30°C)
ILC @ 1 TeV, ALICE-ITS upgrade, CBM@ FAIR, AIDA beam telescope, etc.
• 0.18 m roadmap– 2013: validation of upstream and downstream sensor elements
– 2014-15: validation of complete sensor architecture (1cm2 ASTRAL/MISTRAL proto)
– 2015-16: preproduction of ASTRAL/MISTRAL sensors CBM, ALICE
– 2017-19: adapt MISTRAL/ASTRAL for ILC-VTX detector
Back upBack up
14th ICATPP Conference, 2013 Auguste Besson 21
ALICE ITS UpgradeALICE ITS Upgrade
14th ICATPP Conference, 2013 Auguste Besson 22
0.35 0.35 m limitationsm limitations
14th ICATPP Conference, 2013 Auguste Besson 23
M22THRA1/B FPNM22THRA1/B FPN
14th ICATPP Conference, 2013 Auguste Besson 24
Deep P-wellDeep P-well
14th ICATPP Conference, 2013 Auguste Besson 25
MISTRALMISTRAL
14th ICATPP Conference, 2013 Auguste Besson 26
HR 18 vs HR 20HR 18 vs HR 20