Design, Modeling, and Reliability of Flexible Electronics
Transcript of Design, Modeling, and Reliability of Flexible Electronics
Design, Modeling, and Reliability
of Flexible Electronics
TAU 2011
K.-T. Tim Cheng and T.-C. Huang
Electrical and Computer Engineering
University of California, Santa Barbara
2
Introduction
Key element: thin-film transistors (TFTs)
Reliability modeling and simulation
Robust circuit design
Printed Pressure Sensors and Applications
Conclusion and future works
Outline
Si MOFET
TFT
Performance
Cost
What is Flexible Electronics
Thin-film, light-weight, and low-cost
Bendable, durable, and large-area
Flexible substrates
Plastics and metal foils
Non-photolithography manufacturing
• Ink-jet printing
• Roll-to-roll imprinting
3
[1]
[2]
[1] Roll-to-roll process, PolyIC;
[2] Ink-jet printed electronics,
Phillips
4
Applications: Large Area Electronics
Polymer Vision
RFIDPOLY IC
E-paper
Solar Cell
Contactless
Power
Flexible Display
E-Skin
Plastic Logic
H-Alpha
Univ. TokyoUniv. Tokyo
TFT
Si MOSFET
Performance
Cost
Flexible Electronics Market
Source: IDTechEx, 2008Display, Photovoltaics dominate the market share,
but new flexible module will change the segment
$B
Low-Cost
Large-Area Manufacturing
6Ref: ISSCC’07 Tutorial, T. Sakurai
Ink-Jet Printing
LG-Phillips©
Fujifilm-Dimatix©
PolyIC©
Roll-to-roll printing
Roll-to-roll imprinting
Screen
Printing
Someya group, Univ. Tokyo
Someya group, Univ. Tokyo
Screen printing
Thin-Film Transistors (TFTs)
The Key Element of Flexible Electronics
7
Hydrogenated Amorphous Silicon
(a-Si:H) TFTs
8Ref: Y.H. Yeh et al, SID 2007
Process Lithography
Min. Length 10 μm
Dev. Type N-type only
Mobility 1 cm2/Vs
Substrates Glass or plastics
Degradation Bias Stress
Self-Assembly-Monolayer (SAM)
Organic TFTs
9
Process Shadow Mask
Min. Length 50 μm
Dev. Type Complementary
Mobility P:0.5 / N:0.01 cm2/Vs
Substrates Rigid wafer or plastics
Degradation Bias Stress, ChemicalCourtesy: K. Fukuda, Univ. of Tokyo
Transparent InGaZnO (IGZO) TFTs
10
6-inch glass substrate
12 x 7 cm2 Polyimide
6-inch glass substrate
12 x 7 cm2 Polyimide
6-inch glass substrate
12 x 7 cm2 Polyimide
6-inch glass substrate
12 x 7 cm2 Polyimide
Courtesy: Y.H. Yeh, ITRI-FETD
Process Magnetron Sputtering
Min. Length 10 μm
Dev. Type N-type only
Mobility 6 cm2/Vs
Substrates Rigid wafer or plastics
Degradation (Mild) Bias Stress
Transparency 86 % Visible spectrum
Technology Comparison
11
Device TypeCrystalline-Si
MOSFET
Amorphous Si
TFT
Metal-Oxide
TFT
Organic
TFT
Process
Temperature1000 °C 200 °C ~ 150 °C room temp.
Process
Technologylithography lithography
roll-to-roll
lithography
Ink-jet printing
/shadow mask
Feature size 32 nm 10 μm 8 μm 20 μm
Dielectrics
Thickness~ 1.5 nm 350 nm 300 nm
300 nm /
7 nm (SAM)
Substrate wafer glass/plastics wafer/plastics wafer/plastics
Device Type Complementary N-type N-type P-type/ CMOS
Supply
Voltage1V 20V 40V
40V (Ink-jet)
/ 2V (SAM)
Mobility (cm2/Vs)
~1000 1 10P:0.5 / N:0.01
(SAM)
Cost/Area High Medium Low Low
Lifetime Years Months ~ Year weeks
Challenges in TFT Circuits Design
Material instabilities Electrical degradation (ex. bias-stress)
Chemical degradation (ex. oxygen, water vapor)
Process variations More than 50% variations in key device parameters (ex. VTH)
Device mismatches are common
Unable to have high quality VIAs for multiple interconnects
Device limitations Mono-type only (either p- or n-type, depending on materials)
Lower mobility
Higher supply voltage
EDA supports Lack of trustworthy and compact device models
Lack of design verification supports (ex. LVS/DRC)12
Design/EDA Research Opportunities
for Reliable Flexible Electronics
Reliability simulation platform
Reliability analysis, modeling, and simulation
System solutions for reliability enhancement
Robust design for unreliable devices
Post-manufacturing self-test and self-tunable
design
Design-for-printability for roll-to-roll process
Substrate-aware physical design methodology
Self-aligned layer-to-layer patterning
Reliability Modeling and
Simulation*
Predicting the degraded circuits performance
14
Refs: 1. T.-C. Huang, et al, Design Auto. Conf. (DAC) 07
2. T.-C. Huang, et al, ACM J. Emerging Technologies in
Computing Systems (JETC), Aug. 2008
Electrical Instability in a-Si:H TFTs
ΔVTH results from prolonged bias-stress
Charge-trapping is the major mechanism
a-Si:H
(Semiconductor)
Substrate
SiNx (Insulator)
SiNx
Gate
Drain Source
n+ a-Si:H
15
10 100 1000
0.0
0.4
0.8
1.2
15V
Th
res
ho
ld V
olt
ag
e S
hif
t (V
)
Stress Time (s)
9V
22V
25V
W/L=50/8
T=25oC
Vstress
=32V
VGS > 0
10 100 1000
-3
-2
-1
0-5V
-10V
-25V
-30V
W/L=50/8
T=25o
Th
resh
old
Vo
ltag
e S
hif
t (V
)
Stress Time (s)
Vstress
=-35V
VGS < 0
Analytical Model for ΔVTHDuty Ratio VDS
0.1
1
10
0 10 20 30 40
VGS > 0
VGS < 0
Slope = 2.1
Slope = 1.2
|VGS-VTH0| (V)
|∆V
TH| (V
)
VGS
Stress Time = 1000 s
T = 25ºC
a-Si:H
(Semiconductor)
Substrate
SiNx (Insulator)
SiNx
Gate
Drain Source
n+ a-Si:H
)()1(
exp1
)(exp1
),,,(
0
0
DSR
THGS
DSR
THGS
RDSGSTH
VfDt
VV
VfDt
VV
tDVVV
α,β : process
parameters
16
a-Si:H TFT-based Scan Driver
17
Data Driver
Scan
Dri
ve
r
T1T2
VDD
Data Line
Scan
Line
CS
OLED
G(N)
CLK
CLKB
G(N-1)
G(N+1)
Scan
Driver
G(N+1)
CLK
CLKB
G(N)
G(N+2)
Scan
Driver
Ref: Y.H. Yeh et al, SID 2007
Reliability Simulation Methodology
18
Purpose: to find out
reliability problems in
early design stage
Validation with a-Si:H TFT Scan Drivers
Measured
19
Simulated
Successfully predicted a-Si TFT scan driver
degraded performance (85℃ / 9.2 hrs burn-in time)
Simulation time: ~ 20 mins
Robust Circuit Design
Pseudo-CMOS:Realizing CMOS performance and
reliability using only mono-type TFTs
Refs: 1. T.-C. Huang, et al, ISFED ‘07
2. T.-C. Huang, et al, IEEE J. Display Tech. (JDT) ‘09
3. T.-C. Huang, et al, DATE ‘10
4. T.-C. Huang, et al, IEEE Trans. Electron Devices, ‘11
Cell-Library for Flexible Electronics
21
Existing
VLSI Flow
Reusable
Existing
VLSI Flow
Not-reusable
22
Pseudo-CMOS Inverter
MUP
MDOWN
MDIODE
MININ
OUT
VDD
VSS
Level
Shifter
GND
PMOS-based
MUP
MDOWN
MDIODE
MIN
IN
OUT
VDDVDP
GND
NMOS-based
Ratioless-logic, 3 voltage levels, 1 direct path
“Pseudo-CMOS” Cell-Library
based on 2V p-type SAM OTFTs
23
Die
Photo
Assembly method
SAM OTFT Specifications
Dev. Type P-type only (no dev. model)
Shadow
Mask 4-Layer
Via Process Mechanical drill
Layout toolAdobe Illustrator
(no LVS/ DRC available)
Ref: H. Klauk et al, Nature 2007; R. Blache et al, ISSCC’09; E. Cantatore et al, JSSC’07
OTFT Inverters Comparison
24
MUP
VOUT
GND
VDD
VIN
MDN
Complementary
MUP
VOUT
GND
VDD
VIN
MDN
Phillips RFID
MUP
MDP
VOUT
GND
VDD
VIM
VSS
VIN
M1
M2
Pseudo-CMOS
0.5V 1.0V 1.5V 2.0 V
Max-
PlanckPolyIC Phillips
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
IN
VDD=2 V
D type
VSS=-2 VUCSB
PerformanceMax-
PlanckPolyIC Phillips
Pseudo-
CMOS
VDD/ SNM (Convt. 2V) 3V/ 0.53V 20V/ 0.67V 30V/ 0.14V 2V/ 0.91V
Static Power (μW) 0.03 1.4 (Est.) 3 (Est.) 0.1
Mobility (P/N-type)
(cm2/Vs)0.6 / 0.02 0.03 / 0.05 0.01 0.5
Lifetime (ambient) Days Months Months Months
MaterialPentacene
/F16CuPC
P3HT
/ N2000
Soluble
Pentacene
Evaporated
Pentacene
Post-Fabrication Tunability
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
INVDD=2 V
D type
VSS=-1 V
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
IN
VDD=2 V
D type
VSS=-1.5 V
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
IN
VDD=2 V
D type
VSS=-0.5 V
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
IN
VDD=2 V
D type
VSS=-2 V
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
INVDD=2 V
D type
VSS=0 V
0
0.5
1
1.5
2 -20
-15
-10
-5
00 0.5 1 1.5 2
VO
UT (
V)
VIN (V)
GA
IN
VDD=2 V
D type
VSS=1 V
25
A Portable Multi-Pitch
e-Drum Based on Printed
Pressure Sensors
Ref: C.-M. Lo, et al, DATE 2010 (joint project of UCSB
and ITRI)
27
Application: Rollable, Bendable
Percussion Instrument
Critical component of
percussion instrument
Human-instrument interface
Physical resonator
Amplifier
Elements of a rollable
percussion instrument
Linear pressure sensor
Linear transimpedance
amplifier
External DSP ICs
28
Demo Video Clip
Ref: C.-M. Lo, et al, DATE 2010.
Printed Flexible Sensors
Manufacturing process: Screen-printing piezo-
resistive material on plastic substrate
Can fabricate versatile shapes
Special requirements:Rollable and reliable
Functioning correctly under 5cm-radius bending
29Ref: C.M. Lo, et al, DATE 2010.
Printed Flexible Sensors - Principles
30
L / A
R
Ring-Shaped Sensors
Sensor array requires extra scan circuitry - not
ideal for low-cost sensors
Ring-shaped arrangement results in a low-cost
sensor structure - in terms of both fabrication
and reading operation
31
Sensor Performance
• High linearity
• measured conductivity vs applied pressure: <2.5% error
from an ideal straight line)
• High uniformity
• High robustness
32
3 different locations: After pressing 1M
and 10M times:
<2.5% from an
ideal straight line
Possibilities in Large-Area Applications
Displays
Rollable displays with integrated drivers (ex. scan driver)
E-poster for public information display
Full-color wall-size displays with multiple-touch capability
Sensors and detectors
Motion detectors for security and energy use controls
Artificial-skin for robots
Solar-powered wireless sensor networks
Invisible surveillance sensors
Flexible music instrument
Energy
DC-AC or DC-DC converters for flexible solar cells (ex.
amorphous Si, organic)
Electroluminescent (EL) lighting for efficient energy use33
Summary
Flexible circuit design ≠ Silicon ckt design
Significantly larger area
Significantly lower cost
Significantly slower
Larger process variations
Lower device reliability
Mono-type devices
Many new applications in large-area
electronics (including displays, sensors,
energy, etc.)34
35
Q & A
Thank you for your attention !
Amazon Kindle DX Plastic Logic QUE