Design esign methodologiesmethodologies forfor E ...retis.sssup.it/iwes/groups/uniaq.pdfDesign esign...

DDesign esign methodologiesmethodologies forfor EEmbeddedmbedded controllerscontrollers, , WWireless ireless interconnectinterconnect and and SSystemystem--onon--chipchip

Center Center ofof ExcellenceExcellence DEWSDEWS

Università degli Studi dell’Aquila

Luigi [email protected]

1st Italian Workshop on Embedded Systems (IWES 2016)

IWES 2016IWES 2016 22DEWSDEWS

Overview

• Introduction

• Main Research Topics

• Main Research Projects

• Contacts

Introduction


Introduction

• Center of Excellence DEWS Design methodologies for

Embedded controllersWireless interconnect andSystem-on-chip

MIUR Call

2000

2001

2002

2003

2004

Start

2005

2006

2007

2008

EECI NCSLaboratory

2009

2010

20112015

Member ofArtemis-IA

http://dews.univaq.it

2016Member of HiPEAC


Introduction

• Center of Excellence DEWS Research Lines

Main Research Topics (M3)



• Electronic System-Level HW/SW Co-Design

• HW Profilers for Parallel Architectures on FPGA

• Mixed-Criticality Systems

• Wireless Sensor Networks

• Advanced Processing Architectures for SDR/TSR

• ICT for New Arts


Electronic System-Level HW/SW Co-Design



• Electronic System-Level HW/SW Co-Design HEPSYCODE

HW/SW Co-Design of Heterogeneous Parallel Dedicated/Embedded Systems System-Level Synthesis: DSE and HW/SW Co-Simulation

Concurrent Error Detection Mixed-Criticality Monitorability

SystemBehaviour

Model

FunctionalSimulation

ReferenceInputs

Co-AnalysisCo-Estimation

- Affinity- Timing- Size- Concurrency- Load- Bandwidth

TimingConstraints

HW/SW Partitioning,Mapping and

Architecture Definition

TimingCo-Simulation

Design Space Exploration

Algorithm-LevelFlow

System-Level Flow

HetrogeneousParallel

DedicatedSystem

Technologies Library-Processors-Memories

-Interconnections

SchedulingDirectives

ArchitecturalConstraints


HW Profilers for Parallel Architectures on FPGA



• HW Profilers for Parallel Architectures on FPGA Distributed HW Profiling System Platforms

4-LOOP, A-LOOP ARM, MicroBlaze, LEON3

core core

Bridge

Cache I/D

core

Cache I/D

Cache I/D

SDRAM

Controller

NetworkUART

SSSSSS

SS SSSSSSSS

SS

SS SSSSSS

Global monitorGlobal monitor


Mixed-Criticality Systems



• Mixed-Criticality Systems Hypervisor technologies for mixed-criticality multi-core platforms

PikeOS, Xtratum ARM, LEON3, LEON4

Mixed-criticality Network-On-Chip Ad-hoc HW mechanisms to support isolation

PARTITION 1

HYPERCALL INTERFACE

KER

NE

L M

OD

EU

SER

MO

DE

PARTITION 2 PARTITION 3

XTRATUM

USER PARTITIONS

SUPERVISORPARTITIONS

PARTITION 1

HYPERCALL INTERFACE

KER

NE

L M

OD

EU

SER

MO

DE

PARTITION 2 PARTITION 3

XTRATUM

USER PARTITIONS

SUPERVISORPARTITIONS

PIKEOS SYSTEM SOFTWARE

PARTITION 1 PARTITION 2 PARTITION 3

PIKEOS SEPARATION MICROKERNEL

ARCHITECTURE SUPPORT PACKAGE

PLATFORM SUPPORT PACKAGE

KER

NE

L M

OD

EU

SER

M

OD

E

PIKEOS SYSTEM SOFTWARE

PARTITION 1 PARTITION 2 PARTITION 3

PIKEOS SEPARATION MICROKERNEL

ARCHITECTURE SUPPORT PACKAGE

PLATFORM SUPPORT PACKAGE

KER

NE

L M

OD

EU

SER

M

OD

E


Wireless Sensor Networks


• Wireless Sensor Networks Basic technologies

HW CrossBow/Memsic, Advanticsys, Texas Instruments, Atmel

SW C/HAL, TinyOS, FreeRTOS, Contiki

Communication protocols IEEE 802.15.4 (802.15.4e), OpenZB, TinyAODV

Remote Lab and Testbed (LabSMILING) Up to 100 nodes remotely programmable and monitorable

WSN data collection and analysis Communication protocols assessment



• Wireless Sensor Networks Middlewares for WSN

Heterogeneous HW/SW/radio platforms Mobile-agents based Virtual Machines

Support to IOT application development and deployment Services

Indoor Localization TinyGIS

Security Cryptography Intrusion Detection System

Technologies TinyOS Agilla/Agilla2 IBM MoteRunner DEWS MW (WIP)



Advanced Processing Architectures



• Advanced Processing Architectures SDR Platforms

Sundance HW/SW development kits for Software-Defined-Radio Wi-Fi, 802.15.4, Wi-Max

Many-core accelerators Development of Parallel SW for True Software Radio

Avionic/TLC algorithms for a 64 VLIW cores accelerator Simulator for PRAM MoC


ICT for New Arts



• ICT for New Arts RF Sounding

Awareness of surrounding electromagnetic fields due to both base stationsand users mobile terminals

Augmented Trumpet Avoid any sensor and use a camera to gather data from a trumpet player

Crazy Square E-learning music environment for digital natives

Main Research Projects (M3)



• VISION (ERC-2009-StG 240555) [CLOSED] Video-oriented UWB-based Intelligent Ubiquitous Sensing

http://www.vision-ercproject.eu/

• SMILING (RIDITT 2009, national project) [CLOSED] SMart In home LIviNG

http://smiling.univpm.it/

• PRESTO (Artemis-JU ASP 2010-269362) [CLOSED] ImProvements of industrial Real Time Embedded SysTems develOpment process

http://www.presto-embedded.eu/

• CRAFTERS (Artemis-JU ASP 2011-295371) [CLOSED] ConstRaint and Application-driven Framework for Tailoring Embedded Real-time

Systems http://www.ecsi.org/crafters



• EMC2 (Artemis-JU AIPP 2013-621429) Embedded Multi-Core systems for Mixed Criticality applications in dynamic and

changeable real-time environments http://www.artemis-emc2.eu/

• CASPER (H2020-MSCA-RISE-2014) User-centric MW Architecture for Advanced Service Provisioning in Future

Networks

• SAFECOP (ECSEL-JU RIA-2015) Safe Cooperating Cyber-Physical Systems using Wireless Communication

ContactsLuigi Pomante (Assistant Professor): [email protected]

Marco Santic (Post-doc): [email protected] Rinaldi (Post-doc): [email protected] Alesii (Post-Doc): [email protected]

Giacomo Valente (PhD Student): [email protected] Muttillo (PhD Student): [email protected]

Center of Excellence DEWS - Università degli Studi dell’AquilaVia Giovanni Gronchi 18, Zona Ind.le Pile, 67100 L’Aquila

ITALY

http://dews.univaq.it

Design esign methodologiesmethodologies forfor E ...retis.sssup.it/iwes/groups/uniaq.pdfDesign esign...

Documents

Transcript of Design esign methodologiesmethodologies forfor E ...retis.sssup.it/iwes/groups/uniaq.pdfDesign esign...