Dead Time Compensation Method for Voltage-Fed PWM Inverter-Tjy

IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010 1

Dead Time Compensation Methodfor Voltage-Fed PWM Inverter

Seon-Hwan Hwang, Student Member, IEEE, and Jang-Mok Kim, Member, IEEE

Abstract—A new dead time compensation method for apulsewidth modulation (PWM) inverter is proposed. In the PWMinverter, voltage distortion due to the dead time effects producesfifth and seventh harmonics in the phase currents of the stationaryreference frame, and a sixth harmonic in the d- and q-axis currentsof the synchronous reference frame, respectively. In this paper, thesixth harmonic of the integrator output of the synchronous d-axisproportional–integral (PI) current regulator is used to compensatethe output voltage distortion due to the dead time effects, since theintegrator output has ripple corresponding to six times the statorfundamental frequency. The proposed method can be easily im-plemented by feedforwardly adding compensation voltages to theoutput reference voltage of the synchronous PI current regulator.The proposed method, therefore, has some significant advantagessuch as simple implementation without additional hardware, easymathematical computation, no offline experimental measurements,and application in both the steady state and the transient state. Thevalidity of the proposed compensation algorithm is shown throughseveral experiments.

Index Terms—Dead time effects, integrator output of the syn-chronous d-axis proportional–integral (PI) current regulator, sixthharmonic, voltage distortion.

I. INTRODUCTION

PULSEWIDTH modulation (PWM) inverters have widely

been used in adjustable speed motor drives. However, these

inverters produce voltage distortion caused by the nonlinear

characteristics of switching devices such as dead time, turn-

ON/turn-OFF time, and voltage drop of switches and diodes. The

most significant nonlinearity is represented by the dead time

to avoid short circuit of inverter legs. Turn-ON/OFF time and

voltage drop inevitably exist in practical devices. To solve the

nonlinear characteristics of the inverter, various solutions have

already been suggested [1]–[15]. In most cases, compensation

techniques are based on an average value theory where the lost

volt·seconds are averaged over an entire cycle and added vecto-

rially to the voltage reference [1], [2]. A pulse-based compensa-

tion method has been proposed in [3], wherein the compensation

is realized for each PWM pulse. These methods are dependent

on the polarity of the phase currents [1]–[3]. In [4]–[8], the

methods are based on a feedforward method, where the com-

pensated voltages are fed to the reference voltages in order to

generate a modified voltage. The compensation voltages in [5]

Manuscript received February 14, 2009; revised June 24, 2009. First pub-lished November 3, 2009; current version published February 17, 2010. Paperno. TEC-00066-2009.

The authors are with the Department of Electrical Engineering, Pusan Na-tional University, Busan 609-735, Korea (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TEC.2009.2031811

are calculated by using the dead time, switching period, current

command, and dc-link voltage. This approach can compensate

the fundamental and harmonic components of the voltage error

in the d- and q-axis frame. In the calculation of the compensat-

ing signals, nonlinear characteristics of the switching devices

such as finite switching times and voltage drops are also con-

sidered in [4]–[8]. However, these methods can be implemented

only by offline methods because the switching times and voltage

drops of switching devices and diodes are varied with operating

conditions such as dc-link voltage, phase currents, and motor

speed. Thus, it is difficult to accurately compensate for the dead

time effects by offline methods. The other methods adjust the

switching frequency and PWM according to the operation condi-

tions [9], [10]. However, these approaches require an additional

hardware and lot of efforts to determine the stable parameter

set. Accordingly, online methods are proposed in [11]–[15].

The method in [11] needs the additional computational burden

to determine the phase angle of currents and set up a lookup

table. These methods are proposed in [12] and [13] for the dead

time compensation strategy using disturbance observer for per-

manent magnet synchronous motor (PMSM) drive. Therefore,

it is necessary to tune parameters such as observer gains and

load conditions. In [14], this method is based on an emerging

learning technique called by support vector regression (SVR).

It is difficult to implement SVR model method requiring some

parameters, online computation, and extra memory to construct

the regression function.

In this paper, a new dead time compensation method using

the integrator output of the synchronous d-axis proportional–

integral (PI) current regulator is proposed. The proposed com-

pensation algorithm does not require any additional hardware,

complicated mathematical calculations, or offline experimen-

tal measurements. Moreover, this method can be easily imple-

mented in both the steady state and the transient state because the

d-axis reference current is usually constant or zero in the ac drive

systems. Therefore, the integrator output of the synchronous d-

axis PI current regulator is nearly constant and stable for the

input signal of the proposed dead time compensator at all oper-

ating conditions. The proposed algorithm can be used only for

vector-controlled motor drives in which current control loop is

employed. The experimental results show the effectiveness of

the proposed compensation algorithm.

II. ANALYSIS OF DEAD TIME EFFECTS

A. Dead Time Effects in the PWM Inverter

The typical three-phase PWM inverter with a PMSM load

is shown in Fig. 1(a). Since a switching device has a finite

switching time, the dead time should be considered in the PWM

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2 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 25, NO. 1, MARCH 2010

Fig. 1. PMSM drive system. (a) Three-phase PWM inverter with a PMSMload. (b) Basic configuration of one phase leg of the PWM inverter during thedead time.

gating signals in order to prevent the simultaneous conduction

of two switching devices in the same leg. Although the dead

time is very short, it causes performance degradation.

Fig. 1(b) shows one phase leg of the PWM inverter. It is

convenient to analyze the dead time effects from one phase leg

of the PWM inverter and extend the results to the other phase

legs. During the dead time Td , both of the switching devices

in Fig. 1(b) cease to conduct, and one of the diodes conducts.

If the current polarity is positive, the lower diode will conduct.

Otherwise, the upper diode will conduct. Therefore, the output

voltage depends on the direction of the a-phase current ias , as

shown in Fig. 1(b).

The zero-current clamping effects and nonideal characteris-

tics such as voltage drops and parasitic capacitance in switching

devices are not considered, and are beyond the scope of this

paper [14]–[16]. Therefore, the switching patterns and output

voltages are shown in Fig. 2 [2]–[4], [12]. In practice, because

of the finite turn-ON/turn-OFF time associated with any type of

switch devices, a switch is turned off at the instant of the switch-

ing time determined in Fig. 2(a). However, the turn-ON of the

other switch in the inverter leg is delayed by the dead time Td .

The gating signals for the two switches in the presence of a dead

time are shown in Fig. 2(b). The voltage distortion caused by the

dead time and turn-ON/turn-OFF time is shown in Fig. 2(d) and

(e) according to the direction of the a-phase current. From Fig. 2,

the average distorted voltage ∆V according to the direction of

the a-phase current ias can be represented as [4], [12]

∆V =−Td − tON + tOFF

2TsVdc , ias > 0 (1)

∆V =Td + tON − tOFF

2TsVdc , ias < 0 (2)

where Ts , tON, and tOFF are the sampling period of the current

Fig. 2. Switching patterns and output voltages. (a) Ideal gating pattern.(b) Real gating pattern with dead time. (c) Ideal pole voltage. (d) Real polevoltage (ias > 0). (e) Real pole voltage (ias < 0).

regulator, turn-ON time, and turn-OFF time, respectively.

The average distorted voltages of three phases may be ex-

pressed according to the direction of the respective three-phase

currents as [4]

v′as =

−Td − tON + tOFF

2Ts

× Vdc

{

2 sign(ias) − sign(ibs) − sign(ics)

3

}

v′bs =


2Ts

× Vdc

{

2 sign(ibs) − sign(ics) − sign(ias)

3

}

v′cs =


2Ts

× Vdc

{

2 sign(ics) − sign(ias) − sign(ibs)

3

}

(3)

where

sign(ias) =

{

1, ias > 0

−1, ias < 0.

v′as , v′

bs , and v′cs are the average distorted voltages of three

phases, respectively.

Fig. 3 shows the three-phase currents and the distorted a-

phase voltage of the six-step waveform that is based on (3).

The distorted voltages and the dq-axes currents of the station-

ary reference frame are shown in Fig. 4. Note that the distorted

voltages are 180◦ out of phase with the phase currents. In Fig. 4,

the distorted d- and q-axis voltages can be derived by taking the


HWANG AND KIM: DEAD TIME COMPENSATION METHOD FOR VOLTAGE-FED PWM INVERTER 3

Fig. 3. Three-phase currents and the distorted a-phase voltage in the PWMinverter.

Fig. 4. Distorted voltages and dq-axes currents of the stationary referenceframe.

Fourier series as follows:

vs ′

ds =4

π∆V

{

sin ωet +1

5sin 5ωet +

1

7sin 7ωet

+1

11sin 11ωet +

1

13sin 13ωet + · · ·

}

(4)

vs ′

qs =4

π∆V

{

− cos ωet +1

5cos 5ωet −

1

7cos 7ωet

+1

11cos 11ωet −

1

13cos 13ωet + · · ·

}

. (5)

Considering a balanced three-phase load, the distorted d-and

q-axis currents is′

ds and is′

qs of the stationary reference frame can

be expressed as [6]

is′

ds =4

π

∆V

ZL

{

sin(ωet − φ) +1

5sin 5(ωet − φ)

+1

7sin 7(ωet − φ)

}

+4

π

∆V

ZL

{

1

11sin 11(ωet − φ)

+1

13sin 13(ωet − φ) + · · ·

}

(6)

is′

qs =4

π

∆V

ZL

{

− cos(ωet − φ) +1

5cos 5(ωet − φ)

−1

7cos 7(ωet − φ)

}

+4

π

∆V

ZL

{

1

11cos 11(ωet − φ)

−1

13cos 13(ωet − φ) + · · ·

}

(7)

where ZL and φ are the load impedance and the load impedance

angle, respectively.

From (4) and (5), the distorted voltages of the synchronous

reference frame ve ′

ds and ve ′

qs can be obtained as

ve ′

ds =4

π∆V

{

12

35sin 6ωet +

24

143sin 12ωet + · · ·

}

(8)

ve ′

qs =4

π∆V

{

−1 +2

35cos 6ωet +

2

143cos 12ωet + · · ·

}

.

(9)

Therefore, the distorted d- and q- axis currents ie′

ds and ie′

qs in

the synchronous reference frame can be rewritten as follows:

ie′

ds =4∆V

π

{

12

35Z6sin(6ωet − φ6)

+24

143Z12sin(12ωet − φ12) · · ·

}

(10)

ie′

qs =4∆V

π

{

−1

Rs+

2

35Z6cos(6ωet − φ6)

+2

143Z12cos(12ωet − φ12) · · ·

}

(11)

where

Zk = |Rs + jkωeLs | =√

R2s + (kωeLs)2

φk = tan−1 kωeLs

Rs, (k = 6, 12, . . .)

Rs is the stator resistance, and Ls is the stator self-inductance

of PMSM.

In (10) and (11), the distorted d- and q-axis currents of the

synchronous reference frame contain the 6th, 12th, and high-

order harmonic components due to the dead time effects. The

dominant harmonic component is the sixth harmonic, as shown

in (10) and (11).

III. PROPOSED DEAD TIME COMPENSATION METHOD

A. Processing the Integral Output of the Synchronous d-axis PI

Current Regulator for Dead Time Compensation

Fig. 5 shows a block diagram of the synchronous d-axis PI

current regulator with the proposed dead time compensator. In

Fig. 5, ie∗ds is the d-axis reference current, ve∗ds is the d-axis ref-

erence voltage, ve ′

ds is the d-axis distorted voltage caused by the

dead time effects, and veds com and ve

qs com are the compensation

voltages calculated by the proposed dead time compensator. The

variable veds integ is the output of the integral of the synchronous

d-axis PI current regulator and veds ff is the feedforward d-axis

voltage term of the synchronous PI current regulator, as shown

in Fig. 5.



Fig. 5. Block diagram of the synchronous d-axis PI current regulator with theproposed dead time compensator.

As mentioned previously, the dead time effects mainly pro-

duce the fifth and seventh harmonic components in the dq-axes

currents of the stationary reference frame. Consequently, these

main harmonics appear in the 6th and 12th harmonic compo-

nents of d- and q-axis currents of the synchronous reference

frame, as shown in (10) and (11). The integrator output of the

synchronous d-axis PI current regulator is used for the input sig-

nal of the proposed dead time compensator in this paper. This is

because the d-axis reference current is usually constant or zero

in ac drive systems so that the output signal of the synchronous

d-axis PI current regulator is nearly constant and stable for the

dead time compensation at all operating conditions. In addition,

the 6th harmonic component of the d-axis current is about six

times larger than the q-axis current in the synchronous refer-

ence frame, as shown in (10) and (11). Therefore, the integrator

output of the synchronous d-axis PI current regulator can be

derived as [17]

veds integ = Ki

∫ t

0

(ie∗ds − ieds)dt = Ki

∫ t

0

(ie∗ds − ie′

ds)dt.

(12)

For convenience, only the 6th harmonic of the d-axis current is

derived and considered temporarily because the 12th harmonic

component is too small to affect system performance compared

to the 6th harmonic, as shown in (10). The resulting signal of the

integrator output of the synchronous d-axis PI current regulator

can be acquired in (13) by inserting (10) into (12) as

veds integ = Ki

∫ t

0

(ieds err)dt

= −Ki4∆V

π

∫ t

0

{

12

35Z6sin(6ωet − φ6)

}

dt

= Ki4

π

∆V

Z6

2

35ωe{cos 6ωet(cos φ6)

+ sin 6ωet(sin φ6)}. (13)

From (13), the integrator output can be rearranged only for

mathematical simplification, as in (14). As stated earlier, (14) is

composed of sine and cosine waveforms that have six times the

Fig. 6. Integrating the sixth harmonic of the synchronous d-axis PI currentregulator. (a) Integration of the integrator output about sine waveform. (b)Integration of the integrator output about cosine waveform.

stator fundamental frequency

veds integ = K1 cos 6ωet + K2 sin 6ωet (14)

where

K1 = Ki4

π

∆V

Z6

2

35ωe(cos φ6)

K2 = Ki4

π

∆V

Z6

2

35ωe(sin φ6).

B. Proposed Dead Time Compensation Method

From (14), the dead time effects cause the integrator out-

put of the synchronous d-axis PI current regulator to generate

successive sine and cosine waveforms at six times the stator

fundamental frequency. Therefore, the dead time effects can be

compensated by reducing and suppressing the harmonic com-

ponents of the integrator output of the current regulator.

Fig. 6 shows the integral operation of the sine and cosine

waveforms about the integrator output of the synchronous d-

axis PI current regulator according to the rotor position between

0 and π/3, respectively. From Fig. 6, the magnitude of the sixth

harmonic can be detected by using integral operation with rotor

position. In Fig. 6, secI, secII, secIII, and secIV are the integral

sections between 0 and π/3 according to the rotor position.

Also, Integ1, Integ2, Integ3, and Integ4 are the integral results

of each integral section.

In order to extract the magnitude of sixth harmonic com-

ponent from Fig. 6, two steps must be taken. First, the sine

waveform of the integrator output can be divided into secI and



Fig. 7. Block diagram of the proposed dead time compensation algorithm.

secII, as shown in Fig. 6(a). Integ1 can be acquired by integrat-

ing sin 6θe of secI between 0 and π/6, as shown in (15), and

Integ2 can be obtained by integrating sin 6θe of secII between

π/6 and π/3, as shown in (16)

Integ1 =

∫ π/6

0

(veds integ)dθe =

∫ π/6

0

K2 sin 6θedθe =K2

3

(15)

Integ2 =

∫ π/3

π/6

(veds integ)dθe=

∫ π/3

π/6

K2 sin 6θedθe =−K2

3

(16)

where

θe = ωet.

The process of the first step has the function of automatically

removing the cosine term by the integrating operation in (15)

and (16), respectively. By subtracting Integ2 from Integ1, as

in (17), the difference ε1 between secI and secII reflects the

amplitude of the sine term K2 in (14)

ε1 = Integ1 − Integ2 = 2K2

3. (17)

Second, the cosine term in (14) can be divided into secIII

and secIV, as shown in Fig. 6(b). Integ3 can be acquired by

integrating cos 6θe of secIII between 0 and π/12, and Integ4

can be calculated by integrating cos 6θe of secIV between π/12and π/6, respectively as

Integ3 =

∫ π/12

0

(veds integ)dθe =

∫ π/12

0

K1 cos 6θedθe =K1

6

(18)

Integ4 =

∫ π/6

π/12

(veds −integ)dθe

=

∫ π/6

π/12

K1 cos 6θedθe = −K1

6. (19)

The difference ε2 between secIII and secIV reflects the am-

plitude of the cosine term, K1 in (14) as

ε2 = Integ3 − Integ4 =K1

3. (20)

The summation εsum of ε1 and ε2 is given as

εsum = ε1 + ε2 = 2K2

3+

K1

3. (21)

The sixth harmonic component due to the dead time effects

can be compensated by making εsum zero.

C. Implementation of the Proposed Compensation Method

Fig. 7 shows the block diagram of the proposed dead time

compensation algorithm. The part of the proposed dead time

compensator is indicated by dashed block. The detailed com-

pensation process is shown in the dashed block. The compen-

sation voltages, as shown in Fig. 7, are achieved by adding the

amplitude of the 6th and 12th harmonic components to the out-

put reference voltage of the d- and q-axis current regulators. The

magnitude of the compensation voltages Kcom can be acquired

by using the integral (I) controller with an integral gain Ki−comp

and a limiter, as shown in Fig. 7. In addition, the integral con-

troller of the dead time compensator forces εsum to be zero. The

integral (I) controller has a memory function to store the magni-

tude of the compensation voltages Kcom , which is used in (22)

and (23) to get voltages veds com and ve

qs com . Moreover, these

voltages are added to the output voltages of the synchronous PI

current regulator, respectively, as shown in Fig. 7.



In the proposed algorithm, the final d- and q-axis output volt-

ages of the dead time compensator are composed of the follow-

ing equations, as shown in Fig. 7

veds com = Kcom

(

−12

35sin 6ωet −

24

143sin 12ωet

)

(22)

veqs com = Kcom

(

−2

35cos 6ωet −

2

143cos 12ωet

)

. (23)

Unlike (8), the first term of (9) is compensated by the inte-

gration part of the PI current regulator, which accounts for zero

steady-state error of dc term.

In the proposed compensation algorithm, since the integrator

output of the synchronous d-axis current regulator is used to

compensate the dead time effects, both the bandwidth of the

current regulator and the integral gain Ki−comp of the dead time

compensator affect the performance of the dead time compensa-

tion. If Ki−comp is large, the response of the proposed compen-

sator is quicker, but there are ripples in the output voltages of

the proposed dead time compensator. However, when the small

integral gain Ki−comp is given, the operation of the proposed

compensator can be completed with the slow response and more

accuracy. The integral gain Ki−comp can be experimentally ob-

tained according to the change of the bandwidth of the current

regulator. For example, in the high-bandwidth current regulator,

Ki−comp will be decreased for stable compensation operation.

In this paper, Ki−comp = 1 is chosen for stable and precise

operation of the proposed dead time compensator.

IV. EXPERIMENTAL RESULTS

The proposed compensation method was implemented with

a PMSM drive system whose parameters are given in Table I in

the Appendix. The sampling period of the current regulator is

100 µs. The PWM switching frequency is 5 kHz [18]. The dead

time is configured at 3.5 µs, and turn-ON/turn-OFF times of the

switching devices are 0.8–2.0 and 2.0–2.9 µs, respectively [19].

The proposed algorithm was performed by a DSP board with

a TMS320VC33 and field-programmable gate array (FPGA,

EPF10K30A).

The several experiments are carried out in the steady state

with different sampling periods of the current regulator and

in the transient state by load step change. In Figs. 8–11, the

motor was operated at 5 Hz (75 r/min) stator frequency. For the

experiments, the 6th and 12th harmonic components in the d-

and q-axis currents are compensated using (22) and (23) under

its given conditions.

Figs. 8 and 9 show the experimental waveforms without and

with the dead time compensation when the motor operates at

75 r/min at no load. In Fig. 8(a), the x–y plot displays hexagonal

rather than circular waveforms. The dq-axes currents of the

stationary reference frame with the distorted waveforms are

shown in Fig. 8(b). The dq-axes currents of the synchronous

reference frame have the 6th and 12th harmonic components,

as shown in Fig. 8(c). The fast Fourier transform (FFT) results

in Fig. 8(c) show the magnitude difference of the harmonic

Fig. 8. Current waveforms without the dead time compensation under no load(75 r/min), sampling period of current regulator (100 µs). (a) x–y plot of d-

and q-axis currents. (b) Current waveforms of the stationary reference frame.(c) Current waveforms of the synchronous reference frame and FFT results.

components in the d- and q-axis currents of the synchronous

reference frame. Therefore, it is useful to use the d-axis current

of the synchronous d-axis PI current regulator for the dead time

compensation, as shown in Fig. 5.

After the dead time compensation, the phase currents have

nearly sinusoidal waveforms, as shown in Fig. 9(a) and (b).

Moreover, the d- and q-axis current ripples considerably de-

creased due to the proposed compensation method, as shown in

Fig. 9(c).

The proposed compensation method may be influenced by

the sampling period of the current regulator with respect to the

accuracy of the integrals in (15), (16), (18), and (19). Therefore,

Figs. 10 and 11 show the experimental results when the sampling

period of the current regulator is changed from 100 to 50 µs.



Fig. 9. Current waveforms with the dead time compensation under no load(75 r/min), sampling period of current regulator (100 µs). (a) x–y plot ofd-and q-axis currents. (b) Current waveforms of the stationary reference frame.(c) Current waveforms of the synchronous reference frame and FFT results.

Fig. 10 shows the experimental waveforms without the dead

time compensation. In Fig. 10(a) and (b), the d- and q-axis

currents of the stationary reference frame show the distorted

waveforms. The d- and q-axis currents of the synchronous ref-

erence frame have the dominant 6th and 12th harmonics, as

shown in Fig. 10(c). If the sampling period of the current regu-

lator decreases, the distortion of the phase currents increases a

little at low-speed range, as in (3).

In Fig. 11, the d- and q-axis current waveforms of the sta-

tionary and synchronous reference frame are shown in the case

of the proposed compensation algorithm. As seen in Fig. 11(a)

and (b), the dq-axes currents of the stationary reference frame

are nearly sinusoidal waveforms and the x–y plot displays al-

most circular waveforms. The ripple components of the d- and

Fig. 10. Current waveforms without the dead time compensation under noload (75 r/min), sampling period of current regulator (50 µs). (a) x–y plot ofd- and q-axis currents. (b) Current waveforms of the stationary reference frame.(c) Current waveforms of the synchronous reference frame and FFT results.

q-axis currents are also significantly reduced by the proposed

algorithm, as shown in Fig. 11(c).

From Figs. 8–11, the experimental results show that the dead

time effects can be effectively compensated by the proposed al-

gorithm despite the change of the sampling period of the current

regulator.

Figs. 12 and 13 show the experiment results to compare

the proposed method with another method that uses direct

pulsewidth compensation with current measurement [5]. In

Figs. 12 and 13, the phase current and FFT results show the

experimental waveforms when the motor is operated at steady



Fig. 11. Current waveforms with the dead time compensation under no load(75 r/min), sampling period of current regulator (50 µs). (a) x–y plot of d-

and q-axis currents. (b) Current waveforms of the stationary reference frame.(c) Current waveforms of the synchronous reference frame and FFT results.

state of 8 Hz (120 r/min). The d- and q-axis currents, isds and

isqs in the stationary reference frame, are less distorted by the

proposed scheme, as shown in Fig. 12(c), than in the no dead

time compensation or in the offline compensation method, as

shown in Fig. 12(a) and (b), respectively.

Moreover, the d- and q-axis currents, ieds and ieqs in the syn-

chronous reference frame, have the 6th and 12th harmonics

without the dead time compensation, as shown in Fig. 13(a). In

Fig. 13(b), the d–q axis currents and FFT results show almost

the reduced current harmonics by offline method [5]. As can be

seen in Fig. 13 (b), the d-axis current ripple considerably existed

Fig. 12. Current waveforms under no load (120 r/min), sampling period ofcurrent regulator (100 µs). (a) Without dead time compensation. (b) With deadtime compensation using [5]. (c) With dead time compensation using proposedmethod.

after compensating the dead time. However, the proposed com-

pensation method nearly removed the 6th and 12th harmonics,

as shown in Fig. 13(c).

Fig. 14 shows the speed waveform, d- and q-axis currents,

and a-phase current during a step load torque of 2.7 N·m. The

load is generated from another PMSM that operates at torque

control mode, and applied to PMSM for the test of the tran-

sient. In Fig. 14(b), the proposed algorithm is slowly decreasing

the ripple of the d-axis current by adjusting the integral gain



Fig. 13. Current waveforms and FFT results under no load (120 r/min), sam-pling period of current regulator (100 µs). (a) Without dead time compensation.(b) With dead time compensation using [5]. (c) With dead time compensationusing proposed method.

Ki−comp , as shown in Fig. 7. In the experimental results, the

dead time effects can be compensated by the proposed algorithm

without the degradation of the control performance in both tran-

sient and steady states, as shown in Fig. 14. Due to the function

of the limiter to suppress the excessive components during the

transient, as shown in Fig. 7, the proposed compensation algo-

rithm can work for the compensation at all operation conditions.

Therefore, the proposed dead time compensation method shows

Fig. 14. Experimental results under the transient state (75 r/min, 2.7 N·m),sampling period of current regulator (100 µs). (a) Without the dead time com-pensation. (b) Process of the dead time compensation. (c) With the dead timecompensation.

a good dynamic performance in the transient state, as shown in

Fig. 14.

V. CONCLUSION

In this paper, a new dead time compensation algorithm is pro-

posed by using the integrator output of the synchronous d-axis

PI current regulator as the input signal of the dead time com-

pensator. Moreover, the integral operation according to the rotor



position is used to detect the dominant harmonic components of

the integrator output of the synchronous d-axis PI current reg-

ulator. The proposed algorithm does not require any additional

hardware, excessive computation time, or offline experimental

measurements. This algorithm can be easily implemented and

applied both in the steady state and transient state. Experimen-

tal results verify the effectiveness of the proposed compensation

algorithm.

APPENDIX

TABLE IPARAMETERS OF PMSM

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Seon-Hwan Hwang (S’07) was born in Cheongyang,Korea, in 1978. He received the B.S. and M.S. de-grees in electrical engineering in 2004 and 2006, re-spectively, from Pusan National University, Busan,Korea, where he is currently working toward thePh.D. degree.

His current research interests include the controlof the electric machine drives and renewable energy.

Jang-Mok Kim (M’03) was born in Busan, Korea,in August 1961. He received the B.S. degree fromPusan National University (PNU), Busan, in 1988,and the M.S. and Ph.D. degrees from the Departmentof Electrical Engineering, Seoul National University,Seoul, Korea, in 1991 and 1996, respectively.

From 1997 to 2000, he was a Senior ResearchEngineer with Korea Electrical Power Research In-stitute. Since 2001, he has been with the Departmentof Electrical Engineering, PNU, where he is currentlya Faculty and a Research Member in the Research In-

stitute of Computer Information and Communication. His research interestsinclude the control of the electric machines, electric vehicle propulsion, andpower quality.


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