DDi Tech Microvia & SMV Design Guidelines 11-4-04

Providing Providing

Solutions for Solutions for

Next Next

Generation Generation

ProductsProducts

Dynamic Details, Inc.Dynamic Details, Inc.

DDiTime &

Technology

Gil White November 2004

www.www.ddiglobalddiglobal.com.com

Laser Drilled

Blind & Buried

Microvias

DDi Technology

DDi TechnologyIPC-2315 HDI/ Microvia Types

IPC Type I IPC Type II

IPC Type II - variable depth IPC Type II – stacked vias

IPC Type III IPC Type III – stacked vias

cost

Enabling Technology

• RCC™ Resin Coated Copper– single stage, double stage or B & C stage

• RCF Resin Coated Foil Single stage• Glass Reinforced Prepreg FR4 = 106, 1080• Thermount®• SpeedBoard ™ C

Microvia Materials

DDi Technology

DDi Technology

Test test test

PresentTechnology

Via-in-PadTechnology

QFP Land Pattern

PresentTechnology Via-in-Pad

Technology

BGA Land Pattern

Fine Pitch-SMT and BGA area array with Via-in-Pad

Via-in-Pad Microvia Technology

DDi TechnologyBuild-Up-Multilayer (BUM)

1. Fabricate multilayer PCB (2 - 38 layers)



2. Fill plated through holes with non-conductive epoxy fill




3. Laminate Microvia material (FR4, RCF, Thermount™, Speedboard C)





4. Laser Drill Microvias (150 microns down to 100 microns)






5. Mechanical Drill through-holes

6. Desmear through holes and microvias to roughen dielectric surface prior to plating








7. Electroless copper plate through holes, Microvias, and surface areas








7. Electroless copper plate through holes, Microvias, and surface areas

8. Pattern Plate outer layer circuits

Prior to the Design of Microvia Technology, Consult with your assembly Team to ensure they have experience with the assembly of Microvia or

Via-in-Pad Technology

Microvia Design

Guidelines

DDi Technology

DDi Technology

NA125 to 150NA125 to 150Laser drilled Microvia diameter from layer 1 to 2INA0.5 to 0.6:1NA0.3 to 0.4: 1Aspect ratioJ

10%25 to 7510%25 to 50Layer 1 – 2 dielectric thicknessC10%4020%40Minimum Layer 2 copper thicknessB10%4520%52Minimum Layer 1 copper thicknessA

+/- 0.6+/-0.6NANANA

+/-

7575250250300

µmStandard Microvia

+/- 0.350Minimum Line width on Layer 2H+/- 0.350Minimum Line width on Layer 1G

NA200Minimum drill diameter for buried viaFNA250Minimum Layer 1 pad for Layer 1 to 2 MicroviaENA300Minimum Layer 2 pad for Layer 1 to 2 MicroviaD

+/-µmAdvanced Microvia Description#

Laser Drilled Microvias

Layer 1 to 2

B

AC

D

E

F

Microvia Technology

DDi Technology

NA350NA300Minimum Layer 1 pad for Layer 1 to 3 MicroviaJNA400NA350Minimum Layer 2 pad for Layer 1 to 3 MicroviaI

NA250NA300Minimum drill diameter for buried viaK

10%40+- 20%40Minimum Layer 3 copper thicknessC10%40+- 20%40Minimum Layer 2 copper thicknessB10%45+- 20%52Minimum Layer 1 copper thicknessA

+/- 20%

NANANA

+- 10%+- 10%

+/-

75

400250300

25 to 5025 to 50


+/- 10%50Minimum Line Width/Space on Layers 1, 2, & 3L

NA450Minimum Layer 3 pad for Layer 1 to 3 MicroviaHNA250Minimum Layer 1 pad for Layer 1 to 2 MicroviaGNA300Minimum Layer 2 pad for Layer 1 to 2 MicroviaF10%25 to 75Layer 2-3 dielectric thicknessE10%25 to 75Layer 1-2 dielectric thicknessD

+/-µmAdvanced MicroviaDescription#

G J

Laser Drilled Microvia from layer 1 to 2 = 150 µm diameter From 1 to 3 = 200 – 250 µm diameter

C

B

A

E

DF

H

I

K

Microvia TechnologyLaser Drilled

MicroviasLayer 1 to 2 & Layer 1 to 3

Aspect Ratio: 0.3 to 0.6:1

DDi Technology

NA125NA125 or 150Laser drilled Microvia diameter from layer 1 to 2JNA500Minimum Pad diameter for buried viaI

NA0.5 to 0.6:1NA0.3 to 0.4: 1Aspect ratioK

10%25 to 7510%25 to 50Layer 1 – 2 dielectric thicknessC10%4020%40Minimum Layer 2 copper thicknessB10%4520%52Minimum Layer 1 copper thicknessA

NANANANANA

+/-

300NANA250300


NA250Minimum drill diameter for buried viaHNA250Minimum Layer 2 pad for Stacked MicroviaGNA250Minimum Layer 1 pad for Stacked MicroviaFNA250Minimum Layer 1 pad for Layer 1 to 2 MicroviaENA300Minimum Layer 2 pad for Layer 1 to 2 MicroviaD

+/-µmAdvanced Microvia Description#


Layer 1 to 2 &Stacked Vias

Microvia Technology

B

AC

D

E

H

F

G

12

DDi Technology

RCC Via fill

IssuesRegistrationVia FillResin Starvation

C-CAP, Sub via plug

IssuesVia fillVia fill expansion at assemblyPlating thickness of sub

Mac -U-Via

Conductive Via fill

IssuesVia fillVia fill expansion at assembly

Dupont CB100 Silver

Laser Drilling Technology

ESI ND:YAG Drilling System

Laser Drilling Techniques ND:YAG (Ultra-Violet)Capable of drilling copper, allre-enforcing materials and alllaminate resin systems. 25 to 50micron beam forms holes by spiraling or trepanning the beam

C02 (Infrared) Capable of drilling most re-enforcing materials and laminate resin systems. Not effective for drilling copper (copper is reflective in the infrared spectrum) Forms holes by pulsing a larger high energy beam

Combination ND:YAG CO2 forms holes by removing copper with the ND:YAG laser and the dielectric and re-enforcing material with the CO2 laser

DDiDDi MicroviaMicrovia TechnologyTechnology

Laser Drilling SystemsLaser Drilling Systems


10 Laser Drilling Systems10 Laser Drilling Systems

• Anaheim = 4 3 ESI 5200 & 1 GSI 600

• UK = 3 3 ESI 5200

• Virginia = 2 2 ESI 5200

• Milpitas = 1 1 ESI 5200

Laser DrilledLaser DrilledMicroMicro--viavia

(ESI Equipment)(ESI Equipment)

Characteristics

• Laser drilling can be performed in any laminate.

• Typical thickness requested is .002 in and may be drilled to multiple layers

• Picture indicates UV Laser drilling through surface copper and .002 laminate.


DDi TechnologyLaser Drilling Technology

Traditional laser drilled Microvia geometry

Laser drilled MicroviaLayer 1 to 2

Laser drilled MicroviaLayer 1 to 3

0.005” (125 µm)

Note: Typical aspect ratio on laser drilled holes is 0.5:1 to 0.8:1 max

0.00

5”

Microvia Technology - Via-in-Pad

0.008” (200 µm)

50 µm125 µm

DDi Technology

Chip Scale BGA Package with Microvia in Pad

BGA Pad

Microvia Capture padPWB Land Pad

Solder Ball

Ideal Solder Joint

Laser Drilling Technology Via In PadMicrovia Technology - Via-in-Pad

DDi Technology

2+4+2 HDI Substrate

4 Layer MLB Core

Microvia 1 3

Microvia 1 2

Drilled PTH

Buried via (epoxy filled)

HDI DielectricLayers

Aspect ratio on Microvia’s approximately 0.5:1max.Microvia 1 3 require larger hole diameter

Typical HDI StructureLaser Drilling Technology

Traditional Laser Drilled hole GeometryMicrovia Technology - Via-in-Pad

DDi Technology

Mechanical drilled via’s offset from attachment pad

Conventional MLB Substrate

HDI Substrate

0.8 mm

Laser drilled via in pad(Solder mask defined attachment pad layer # 1)

0.8 mm BGA µ

Solder maskdefined pad Signal routing on layer # 2

Conventional MLB vs HDI

Laser Drilling TechnologyMicrovia Technology - Via-in-Pad

DDi Technology

Thermount Dielectric

Microvia in pad

Two tracksignal routingon surface

1.0 mm BGA

Interstitial Microvia


DDi Technology

0.8 mm BGA

Interstitial Microvias

Layer 1 to 2

Via in pad

Offset via

Laser Drilling Technology

Microvia Technology - Via-in-Pad

DDi Technology

39 x 39 1.0 mm BGA

Layer 1 SignalRouting

1.0 mm


Enabling Technology

Aspect Ratio 10:1

.0394”

Internal Layers

.0046” (115 µm) Trace & space

6 track routing

1 mm BGA

.010” (250 µm) drill

.0194” (485 µm) via pad

Thickness of .093” (2.362 mm) - .100” (2.54 mm)

Hybrid Approach

Laser drilled via’s Mechanically drilled via

0.8 mm BGA

0.8 mm BGATin/Lead Surface Finish


DDi Technology

DDi Technology

Microvias in SMT Pads0.5 mm


Via location doesnot impact assemblydue to it’s extremelysmall volume


0.8 mm BGA

Design Guidelines

DDi Technology

0.8 mm BGA

Aspect Ratio 10:1

.0155” (388 µm)BGA pad

.002” sm clr

.0315”.005” (125 µm) trace

External Layer

SM cv = .001” (25 µm)

DDi Technology


.0223” (0.566 mm) space

.010” (125 µm) trace

.010” (250 µm) drill

.019” (475 µm) via pad

.003” (75 µm) space

Aspect Ratio 10:1

Internal Layer

.0315”


1 track routing

DDi Technology

0.8 mm BGAIPC 6011/6012 Class 2


.010” (250 µm) drill

.0195” (488 µm) via pad

.028” (0.711 mm) clearance.0035” (88 µm) copper

Aspect Ratio 10:1

DDi Technology0.8 mm BGA

IPC 6011/6012 Class 2


0.8 mm BGA IPC 6011/6012 Class 2

Aspect Ratio 10:1

Internal Layer

.0315”

.005” (125 µm) Trace

.00425 (106 µm) Space

1 track routing

DDi Technology


.008” (200 µm ) drill

.018” (450 µm) via pad

Aspect Ratio 7.75:1

DDi Technology0.8 mm BGA

IPC 6011/6012 Class 2


.026” (0.660 mm) clearance.0055” (138 µm) copper

Microvia Via-in-Pad Technology = Eliminates through vias

31.5 mils

Layer 1 Ball Diameter

0.42 - 0.5 mm

DDi Technology

0.8 mm BGA Design

.0165” (.419 mm) pad

.006” (150 µm)

laser drill

.002” (50 µm)sm clr

.005” (125 µm) Trace

.005 (125 µm) Space

0.8 mm BGA Design

Microvia Technology

Layer 2

DDi Technology

.0115” (288 µm) Pad

.004” (100 µm) Trace

.004 (100 µm) Space

0.8 mm BGA Design

Microvia Technology

No clearance required

DDi Technology

0.8 mm BGA 256 I/O Full Array

Layer 1 Layer 2 Layer 3

Option = 2 layers with 3/3 & .010 pad = 3 track

DDi Technology

DDi Technology

Microvia

DDi Technology

DDi Technology

Chip Scale BGA Package with Microvia in Pad

BGA Pad

Microvia Capture padPWB Land Pad

Solder Ball

Ideal Solder Joint

Laser Drilling Technology Via In PadMicrovia Technology - Via-in-Pad

Microvias with solder voids after assembly

Unacceptable Via-in-Pad Solder Joints

DDi Technology

Conductive Filler

Cu Pad Plating

Component Pad

Rendering

Plated through hole

DDi TechnologyConductive Epoxy Fill & Plate

Conductive Fill

Capture Pad

Copper Plating

DDi TechnologyConductive Epoxy Fill & Plate

Single MicroVias

.004” (100 µm) laser drilled & solid copper plate

.008” (200 µm) pad diameter

Maintain Planar Surface

DDi SMVSMV™™ TechnologyStacked MicroVia (SMVSMV™™)

DDi

Topic # 8

Stacked MicroVias(SMVSMV™™)


www.www.ddiglobalddiglobal.com.com


SMVSMV™™ Technology Provides Solutions for Next Generation Products


Definition:.004” (100 µm) laser drilled MicroVia

(solid copper plate)

Stacked MicroViasSingle MicroVias

Single MicroVias

.004” (100 µm) laser drilled & solid copper plate

.008” (200 µm) pad diameter

Maintain Planar Surface


Definition: .004” (100 µm) laser drilled MicroVia

Planar Surface Stacked MicroVias (SMV)


solid copper plate

10 Layer SMV™ Technology

Core = Solid Copper Plate


1:1 aspect ratio

.004” (100 µM) dielectric

.004” (100 µM) laser drill

Six Stacked MicroVias

Seven layers for fan-out of 0.65 mm, 0.5 mm & 0.4 mm BGAs

0.5 mm = .008” (200 µm) diameter pad using a .004” (100 µm) laser drill, .0039” (98 µm) trace & space

0.4 mm = .008” (200 µm) diameter pad, .004” (100 µm) laser drill, .0026” (65 µm) trace & space

Capable of creating a 14 Layer stacked configuration


Advantages:

• Design flexibility (SMV post or buried SMV) single or stacked

• Provides a solid copper plate

• Improves Current Carrying Capability & Thermal Management

• Provides a Planar surface for BGA (Via-in-Pad)

• Increases routing density for Fine Pitch BGAs (0.65 mm, 0.5 mm & 0.4 mm)

• Allows Design Fan-out on multiple layers using .010” (250 µm) or .008” (200 µm) pad diameters


Applications:

• Mobile Phones (including Cell/PDA & camera phone)

• Hand Held products (PDAs, Cameras, GPS/Navigation)

• Telecom (Networks, Switches, Servers)

• Wireless LAN

• Medical Equipment

• Reference Designs

• Flip Chip BGA Interposer

• MCM BGA Interposer


1mm BGA

Design Guidelines

IPC 6011 / 6012

Class 2

DDi Technology

1 mm BGA

.0278” (706 µm) space

Thickness of .093”(2.362 mm) Aspect Ratio 10:1

.020” (500 µm)BGA pad

.010” (250 µm) drill

.020” (500 µm) via pad

.003” (75 µm)sm clr

.010” (250 µm) trace

.03937”.005” (125 µm) trace

External

DDi Standard Technology

1 mm BGA IPC 6011/6012 Class 2

Aspect Ratio 10:1

.0394”

Internal


2 track routing

DDi Standard Technology

.010” (250 µm) drill

.0194” (492 µm) via pad

Thickness of .093”(2.362 mm)


.004” (100 µm) laser drill

.008” (200 µm) via

.0394”

Internal

.00348” (88 µm) trace & space

4 track routing

OR


.004” (100 µm) Trace

.003” (75 µm) space

4 track routing


.0394”

Internal

.0045” (112.5 µm) Trace & space

3 track routing


.004” (100 µm) drill

.008” (200 µm) via pad

0.8 mm BGA

Design Guidelines

IPC 6011 / 6012

Class 2

DDi Technology

Microvia Technology

.0165” (.419 mm) pad 31.5 mils

.006” (150 µm) laser drilled Microvias

.002” (50 µm) dielectric from Layer 1 to 2

Layer 1 Ball Diameter

0.42 - 0.5 mm

DDi Standard Microvia Technology

0.8 MM BGA Design

.003” (75 µm)sm clr

Standard Microvia Technology Layer 1 - 2

.004” (100 µm) trace 2 plcs

.004” (100 µm) space 3 plcs

.0115” (292 µm) Pad

Layer 2


0.8 MM BGA Design

Standard Microvia Technology Layer 1 - 3

Layer 3


0.8 MM BGA Design

.0165” (.416 mm) pad

.003” (75 µm) trace 2 plcs

.003” (75 µm) space 3 plcs

0.8 MM BGA Design

SMV™ Technology = Triple track on multiple layers

Layer 2 - 7


.0034” (85 µm) trace

.0034” (85 µm) space

.008” (200 µm) pad

0.65 mm BGA

Design Guidelines

DDi Technology

.012” (300 µm) BGA pad.006” (150 µm) laser drill

.002” (50 µm) sm clr

.0256”.005”(125 µm) trace

External

Soldermask dam = .0096” (240 µm)

DDi Standard Microvia Technology0.65 mm BGA

Via-in-Pad Microvia Technology

.012” (300 µm) pad

.0045” (112 µm) trace & space

.0256”

Internal

Single Track

0.65 mm BGA Via-in-Pad Microvia Technology


.008” (200 µm) pad

.0035” (87.5 µm) trace & space

.0256”

Double Track layers 2 - 7

0.65 mm BGA


0.5 mm BGA

Design Guidelines

IPC 6011 / 6012

Class 2

DDi Technology

0.5 mm BGA

.0139” (353 µm) space

.010” (250 µm)BGA pad


.010” (250 µm) Microvia pad

.002” (50 µm)sm clr

.010” (250 µm trace

.0197” .004” (100 µm) trace

External


0.5 mm BGA

.003” (75 µm) trace

.0033 (82.5 µm) space

.0197”

Internal


Single Track layer 2


.010” (250 µm) Microvia pad

0.5 mm BGA

.0039” (98 µm) trace

.0039” (98 µm) space

.008” (200 µm) MicroVia pad

.0197”

Internal


Single Track layers 2 - 7

0.4 mm BGA

Design Guidelines

IPC 6011 / 6012

Class 2

DDi Technology

0.4 mm BGA

.002” (50 µm)sm clr

.0157” .004” (200 µm) trace

External



.010” (250 µm) pad

.0157”

0.4 mm BGA

.004” (200 µm) trace

.004 (200 µm) space


Single Track layer 1 & 2 Two row BGA Limit

Layer 3 not an option

.010” (250 µm) pad

0.4 mm BGA

.008” (200 µm) SMV™ pad


.0157”

Single Track layers 1 – 7 7 layers available for routing

with option of 14 layers

.004” (100 µm) trace

.004 (100 µm) space


0.4 mm BGA

.0026” (65 µm) trace

.0026 (65 µm) space

.008” (200 µm) SMV™ pad


.0157”

Single Track layers 2 – 7 7 layers available for routing

with option of 14 layers

.004” (100 µm) trace

.004 (100 µm) space


0.25 mm BGA

Design Guidelines

IPC 6011 / 6012

Class 2


.003” trace or .004” trace

.004” laser drill

.007” SMV™ pad

0.25 mm Flip Chip

.003” space

.0098”

External Layer 1


.004” laser drill

.007” SMV™ pad

0.25 mm Flip Chip

.003” space

.0098”

Internal Layer 2



.007” SMV™ pad

0.25 mm Flip Chip .0098”

Internal Layer 3



DDi Technology

Gil White

[email protected]

Time & Technology


Providing Providing

Solutions for Solutions for

Next Next

Generation Generation

ProductsProducts


DDiTime &

Technology

DDi Tech Microvia & SMV Design Guidelines 11-4-04

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Transcript of DDi Tech Microvia & SMV Design Guidelines 11-4-04