Data Center Future Directions and High Performance ...€¦ · • Holistic Vision • Focus on...

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Data Center Future Directions and High Performance Computing in the Global Intel Enterprise Gregg Wyant Chief Architect, GM, Director of Strategy, Architecture, & Innovation, Intel IT, Intel Corporation Shesha Krishnapura Senior Principal Engineer, IT Engineering, Intel Corporation IAIS004

Transcript of Data Center Future Directions and High Performance ...€¦ · • Holistic Vision • Focus on...

Page 1: Data Center Future Directions and High Performance ...€¦ · • Holistic Vision • Focus on Consolidation • Begin Execution . 2008-2009. Refocus • Lessons Learned • Strategy

Data Center Future Directions and High Performance Computing in the Global Intel EnterpriseGregg WyantChief Architect, GM, Director of Strategy, Architecture, & Innovation, Intel IT, Intel Corporation

Shesha KrishnapuraSenior Principal Engineer, IT Engineering, Intel Corporation

IAIS004

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• Data Center Future Directions • High Performance Computing in the

Global Intel Enterprise

Agenda

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Data Center Future

Direction

Gregg Wyant

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Intel Data Center Profile

70% of Servers in Intel are in D30% of Servers in Intel are in O, M and E

Intel has 4 major groups driving data center requirements (DOME):

DesignEngineering Computing

Support the chip design communityHas most of the servers in IntelD

OfficeGeneral Purpose

Supporting typical IT and customer servicesO

ManufacturingFAB/ATM

Manufacturing computing supporting fabrication and assemblyM

EnterpriseEnterprise applications supporting eBiz and ERPE

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Intel’s Data Center Journey

High Growth with No DC Ownership• Intel acquisitions, large data center growth

• Hardware being procured independently

• Chip design used at site level

• No centralized system to use resources

1995-2000 2000-2004

Get Organized• Inventory/ Assessment of Data Centers

• Standardized Designs

• Started Efficiency efforts

• Began developing a Strategy

• Beginning of DC Team

2005-2007

Data Center Strategy• Holistic Vision • Focus on Consolidation

• Begin Execution

2008-2009

Refocus• Lessons Learned• Strategy Change• ROI vs. Consolidation

• Focus

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Why change Data Center Model?The Old Way The New WayLayered, tactical, IT focused End2End integrated strategy

focused on business needsMega Data Center is “the Wave”; ride it

Business Segment Optimized Data Center strategy

Applications Hosting – Limited Virtualized Environment

Hosting - Maximize Virtualization

Primary focus is on making IT efficient - Limited choices

Primary focus is on making Intel/Customer effective - Business fit standard choices

Space available? Force-fit Fit for purposeSustain-a-what? Sustainability designed-in &

managed operationallyOpaque visibility into Data Center domain

Transparency (costs, utilization, health, plans)

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New Data Center Model

Solutions/Applications

Computing Infrastructure (Server/Storage & Networking)

Facility Infrastructure

Co

ntr

ols

Routing/Switching, Connectivity/VPN, Firewalls, Load Balancing/caching, DNS/DHCP, Proxy

Application Integration, Landing Engagement

Monitoring, provisioning, software distribution, patching, Governance

DC capacity, power, HVAC. Server forecasts/landing

Core service authentication, directory, Service/Message Bus, App Security Authentication/Authorization

Server, OS, Virtualization, dynamic pool management, database

SAN, Network File System, JBOD, Virtual storage, BAR

Dat

a C

ente

r –

Vert

ical

Int

egra

tion

Standards

Business Needs

Design, Office, Manufacturing, Enterprise

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High Performance Computing in

Intel

Shesha Krishnapura

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Presentation OverviewDesigning Intel® microprocessors is extremely compute intensive. Tapeout is a final step in silicon design and its computation demand is growing exponentially for each generation of silicon process technology.

Intel IT adopted HPC to address this very large computational scale and realized significant improvements in computing performance, reliability, and cost.

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Silicon Design Phases

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The Tapeout Compute Challenge• Deliver 10x more computing

– 45nm process technology based chip require 10x more computing compared to 65nm process technology chip

• Reduce tapeout from 25 days to 10 days– Reference: Earlier 65nm process technology based first

CPU product took 25 days to tapeout– Challenge: Make 45nm process technology based first

CPU product to tapeout in10 days• Find greater than 128GB RAM servers

– Large memory needs expected to be within 200GB• Increase compute environment reliability

– There were ~80 compute related issues in the past year• Reduce capital spending by $20 Million• Make it all happen in 11 months

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HPC Strategy for Tapeout• Mission

– Deliver reliable, and optimal HPC environment for Tapeout

• Strategies– Leverage industry and internal

expertise to architect HPC environment for tapeout

– Design optimized HPC solution aligned with Process Technology generations

– Maximize utilization of open standards components to develop an agile environment

– Certify the quality of the solution for effective deployment

– Benchmark & adopt best-in-class HPC technologies & operational best known methods regularly

HPC capability development aligned with Process

Technology generations

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HPC Solution Stack

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HPC delivered Scale & Stability

(1.00X)

(3.95X)

(7.39X)

(13.20X)

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Storage Solution

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The Performance Bottleneck in 2005

Master Server Distributing800 OPC Jobs

1 NASStorage Server

Input Data File100+ GB

Master Server Distributing1600 OPC Jobs

1 NASStorage Server

Input Data File100+ GB

OPC – Optical Proximity Correction

A Cluster of Slave Servers 800 CPU Cores A Cluster of Slave Servers 1600 CPU Cores

No change in throughput

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Expensive Non-HPC Solution in 2005Master Server Distributing

8000 OPC Jobs

10 Clusters of Slave Servers – 8000 CPU Cores

10 NAS Storage Servers

Input Data File100+ GB

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Breakthrough with Parallel Storage

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Large Memory Solution

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16-cores 256GB Server in HPC-1

• Left: One node based on four single-core processors with 64 GB of RAM. • Right: How four nodes interconnect to create a 256-GB system.

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32-cores 256GB Server in HPC-1

• Left: One node based on four dual-core processors with 64 GB of RAM.• Right: How four nodes interconnect to create a 256-GB system.

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64-cores 512GB Server in HPC-1

• Interconnectivity for first-generation high-performance computing environment (HPC-1) large-memory compute server with eight nodes and 512 GB of RAM.

• Each node is based on four dual-core processors with 64 GB of RAM

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• Left: One node based on four 6-core processors with 256 GB of RAM.• Right: How four nodes interconnect to create a 1-TB system.

96-cores 1TB Server in HPC-2

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HPC-1 vs HPC-2 Large Memory Servers

HPC-1 HPC-2

Total CPU Cores 32 or 64 96

Memory Capacity 512 GB 1 TBData Center Rack Space Needed 24U 16U

Power Consumed 7.3 KW 3.6KW

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Server Solution

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OPC throughput advantages with Intel® quad-core servers

15 Quad-CoreIntel® Xeon®

processor X5355 based servers

32GB RAM per server (4GB RAM/core)

Total power consumed 6450Watts

120 Distributed OPC jobs

11 minutes and 04seconds

30 Dual-Core Intel®Xeon® processor 5150 based servers

16GB RAM per server (4GB RAM/core)

Total Power Consumed 9360Watts

120 Distributed OPC jobs

11 minutes and 41seconds

10 Quad-CoreIntel® Xeon®

processor E5450 based servers

32GB RAM per server (4GB RAM/core)

Total power consumed 3200Watts

80 Distributed OPC jobs

11 minutes and 36seconds

6 Quad-Core Intel®Xeon® processor X5570 based servers

24GB RAM per server (3 GB RAM/core)

Total power consumed 2250Watts

78 Distributed OPC jobs

10 minutes and 25seconds

Intel internal measurements May 2006, November 2006, November 2007, and February 2009.

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations..27

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April 1, 2009

Intel internal measurements May 2007, November 2007, and February 2009.

Runtime Performance for OPC Application

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations.28

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Intel internal measurements May 2007, November 2007, and February 2009

Intel® Architecture Performance Improvement for OPC

(1.00X)

(3.95X)

(7.39X)

(13.20X)

Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit Intel Performance Benchmark Limitations.29

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Results Summary

• HPC has offered significant business value to Intel silicon tapeout– Met 13X increase in compute demand with 11x

improvement in stability– $44.72M net present value to Intel

• HPC has improved Intel’s ability to bring newer chips to market more quickly– Reduced tapeout time from 25 days to 10 days

(65nm to 45nm)

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Call to Action

• HPC is not expensive• Multi-Core Intel Architecture based

platforms making HPC a commodity• Use HPC for your advantage – Just like how

we did it inside Intel

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Legal Disclaimer• INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO

LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL® PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.

• Intel may make changes to specifications and product descriptions at any time, without notice.• All products, dates, and figures specified are preliminary based on current expectations, and are

subject to change without notice.• Intel, processors, chipsets, and desktop boards may contain design defects or errors known as errata,

which may cause the product to deviate from published specifications. Current characterized errata are available on request.

• Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance.

• Intel, Xeon and the Intel logo are trademarks of Intel Corporation in the United States and other countries.

• *Other names and brands may be claimed as the property of others.• Copyright © 2010 Intel Corporation.

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Risk FactorsThe above statements and any others in this document that refer to plans and expectations for the first quarter, the year and the future are forward-looking statements that involve a number of risks and uncertainties. Many factors could affect Intel’s actualresults, and variances from Intel’s current expectations regarding such factors could cause actual results to differ materially from those expressed in these forward-looking statements. Intel presently considers the following to be the important factors that could cause actual results to differ materially from the corporation’s expectations. Demand could be different from Intel's expectations due to factors including changes in business and economic conditions; customer acceptance of Intel’s and competitors’ products; changes in customer order patterns including order cancellations; and changes in the level of inventory at customers. Intel operates in intensely competitive industries that are characterized by a high percentage of costs that are fixed or difficult to reduce in the short term and product demand that is highly variable and difficult to forecast. Additionally, Intel is in the process of transitioning to its next generation of products on 32nm process technology, and there could be execution issues associated with these changes, including product defects and errata along with lower than anticipated manufacturing yields. Revenue and the gross margin percentage are affected by the timing of new Intel product introductions and the demand for and market acceptance of Intel's products; actions taken by Intel's competitors, including product offerings and introductions, marketing programs and pricing pressures and Intel’s response to such actions; defects or disruptions in the supply of materialsor resources; and Intel’s ability to respond quickly to technological developments and to incorporate new features into its products. The gross margin percentage could vary significantly from expectations based on changes in revenue levels; product mix and pricing; start-up costs, including costs associated with the new 32nm process technology; variations in inventory valuation, including variations related to the timing of qualifying products for sale; excess or obsolete inventory; manufacturing yields; changes in unit costs; impairments of long-lived assets, including manufacturing, assembly/test and intangible assets; the timing and execution of the manufacturing ramp and associated costs; and capacity utilization;. Expenses, particularly certain marketing and compensation expenses, as well as restructuring and asset impairment charges, vary depending on the level of demand for Intel's products and the level of revenue and profits. The majority of our non-marketable equity investment portfolio balance is concentrated in companies in the flash memory market segment, and declines in this market segment or changes in management’s plans with respect to our investments in this market segment could result in significant impairment charges, impacting restructuring charges as well as gains/losses on equity investments and interest and other. Intel's results could be impacted by adverse economic, social, political and physical/infrastructure conditions in countries where Intel, itscustomers or its suppliers operate, including military conflict and other security risks, natural disasters, infrastructure disruptions, health concerns and fluctuations in currency exchange rates. Intel’s results could be affected by the timing of closing of acquisitions and divestitures. Intel's results could be affected by adverse effects associated with product defects and errata (deviations from published specifications), and by litigation or regulatory matters involving intellectual property, stockholder, consumer, antitrust and other issues, such as the litigation and regulatory matters described in Intel's SEC reports. An unfavorable ruling could include monetary damages or an injunction prohibiting us from manufacturing or selling one or more products, precluding particular business practices, impacting our ability to design our products, or requiring other remedies such as compulsory licensing of intellectual property. A detailed discussion of these and other risk factors that could affect Intel’s results is included in Intel’s SEC filings, including the report on Form 10-Q.

Rev. 1/14/10