cs302 digital logic design
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Transcript of cs302 digital logic design
Assignment No. 02Semester: Spring 2015CS302-Digital Logic DesignTotal Marks: 20Due Date: 04/06/2015
Uploading instructions: Your assignment must be in .ppt or .pptx format. (Solution in any other format will not be accepted)
Save your assignment with your ID (e.g. bc020200786.ppt).
No assignment will be accepted through email.
Rules for Marking:
It should be clear that your assignment will not get any credit if: The assignment is submitted after due date. The submitted assignment does not open or file is corrupted. Your assignment is copied from internet, handouts or from any other student (Strict disciplinary action will be taken in this case).
Assignment
Question: (20 Marks)
You are required to extract the Boolean expression from following function table and then generate a minimal SOP expression by using the Karnaugh Map.
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Instructions for the assignment:
You are required to make a presentation file (.ppt) for your assignment solution
Presentation will consist of maximum of 4-5 slides
First slide will contain student name and ID
Remaining slides will contain all the steps involved in solving above question You are also required to embed your voice (record your voice) in all slides of the presentation In first slide, you will speak your name and ID, and in remaining slides, you are required to explain all the steps Your introduction and explanation should not take more than 4 to 5 minutes
NOTE:
Tutorial for how to embed (record your voice) in power point is available on the following URL:http://www.indezine.com/products/powerpoint/learn/share/powerpoint2010/record-slide-show.htmlNo marks will be awarded if you do not embed your voice in the presentation.Do not put any query on MDB about this assignment, if you have any query then email at [email protected].
Deadline: Your assignment must be uploaded/submitted on or before 4th June 2015.