Crosstalk Modeling

download Crosstalk Modeling

of 4

Transcript of Crosstalk Modeling

  • 7/27/2019 Crosstalk Modeling

    1/4

    Research of Crosstalk Reduction between MicrostripLines Based on High-Speed PCBs

    H-H #! C-J GUO# Y Z#

    #Colegeo

    fElectronic in

    for

    mation, Northweste Poly technical Universi, Xi/an Shaai,

    119China'uz8@6

    ju@wuu3q68@6

    b b Tb y b b b T b T

    b y y ; b; ; ;

    I. NTRODUCTON

    s mode technology progress, the design of digitaldevices and chip packages tends toward high-speed, highdensity, and low-voltage operation. This makes theinterconection of multiple traces within a printed circuited

    bod (PCB ad among chips much dicult. Since highspeed operations will cause more noise of the side effect,

    poor designs of interconnection traces d the couplingeffect of multiple traces aect signal integrity (SI. SI is acritical factor in the design of a high-speed PCB. Crosstalk isone noise sorce in PCBs ad is of particular conce in

    high-density ad high-speed circuits, is one major sorce ofnoise to interfere with SI. Moreover, since crosstalk occsdue to the coupling eects of the mutual capacitace andinductace of two adjacent traces when trsient signals inone trsfer energy to the other, then, this c disrpt noalsial operation. Nowadays, attention has increasinglyfocused on the SI design ad layout within d PCBs.

    Microstrip lines, which is typically used for pallel linkson PCB, cause nea-end crosstalk NEXT and far-endcrosstalk (FEXT by electromagnetic coupling. In a paallelterminated interface, the FEXT is more problematic thaNEXT since it seriously aects the signal integrity at thereceiver side. This far-end crosstalk voltage reduces the eyeopening and eventually decreases the maximum data rate thatca be transmitted through e microstrip lines. The fa-endcrosstalk voltage is induced by the dierence between thecapacitive ad inductive coupling ratios of two microstrip

    978-1-4244-6908-6/10/$26.00 2010

    99

    lines. The capacitive coupling ratio Cm /C of e twomicrostrip lines is slightly smaller tha the inductive

    coupling ratio / , because the dielectric constant of

    surrounding air is smaller than at of the PCB dielectric

    material. C CT L ad L represent the mutualm m scapacitance, the sm of self capacitace and mutualcapacitance, the mutual inductace ad the self inductance

    per unit length, respectively.The crosstalk noise can be reduced by increasing the

    spacing, decreasing dielectric thickness, using differentialsignaling, minimizing pallel length, etc., but affectingthe system cost as tradeoffs. To reduce the far-end crosstalkin the microstrip lines, the extra dielectric material ca bedeposited over the microstrip lines [1]. However, this extra

    material deposition is a cost-adding process. To reduce thefaend crosstalk, a guard ace can be placed between e

    two signal lines. However, e guard trace ed out to benot effective. lso, the via-stitch gud was proposed, whereground vias were placed uniformly on the guard trace [2].This via-stitch guad imposes the restriction on e PCB

    backside routing due to via holes. serpentine guad tracewas proposed to reduce the far-end crosstalk by about 40%[3], but NEXT becomes larger and some extra space is

    needed for fabrication, which seems not attractive in denseinterconnects. Stub-alteated microstrip lines were proposedto eliminate the fa-end crosstalk almost completely [4],where e vertical stubs e attached alteately to thepaallel microstrip lines. In this work, a new routing methodis proposed, which eliminates fa-end crosstalk moreeffectively th ay routing method mentioned above d

    has a relatively simpler structure.

    II. HEORETC YSS

    Crosstalk occs due to the coupling eects caused by the

    mutual capacitance (C and mutual inductance L ofm mthe victim ad aggressor, driven by the trasient signals inthe aggressor. A isolated trasmission line ca be modelled

    by the unifoly distributed self capacitace (Cs and self

    inductace L . pair of coupled trsmission lines can besmodelled by the nifoly distributed mutual capacitace

  • 7/27/2019 Crosstalk Modeling

    2/4

    ( Cm) ad mutual inductace (Lm) in addition to the self

    capacitace (C and the self inductce (L , as shown ins s

    Fig.. In the coupled trasmission lines, the activetrasmission line to which the signal is applied is called theaggressor line ad the passive transmission line to which nosignal is applied is called the victim line. The fa-end

    crosstalk voltage is the voltage induced at e receiving endof the victim line. The fa-end crosstalk voltage waveform in

    the lossless case can be represented by (1 [5]

    V ( )_1

    (Cm L

    ) TV d1n{t -TD)xt t - XL X-"-2 CT LS dt

    (1

    where TD is the propagation time through the transmission

    line, n (t) is the applied voltage at the aggressor line.

    Because the inductive coupling / is larger tha the capacitive coupling Cm / CT in the microstrip line with one

    side exposed to air, Vfext (t)

    has the negative pulse at the

    rising edge of n (t) .

    Ls.T -]O( Lm -

    Ies

    \ mC-

    '- -o1 0

    esFig. I Model of a section coupled trasmission line

    In this letter, a new routing method is proposed to

    eliminate FEXT by increasing C /CT with little chage in

    L /Ls .Fig.2 shows structure model of the proposedrouting method. Stubs ae uniformly distributed along one ofparallel double trsmission lines. e length of the nitstructre is g and the length of each stub is p. e width ofeach stub is equal to that of microstrip line for preventing

    reection.

    The increase in electric eld ond edges of the stbsinduces lager capacitive coupling while the inductivecoupling is affected little since the stubs ae perpendicula tothe cuent ow. e increase in the self ad the mutualcapacitaces due to the addition of the stubs also

    increases C , but the ratio C / C increases rther ands mcan be eventually equal toL /Ls ' resulting in zero FEXT.However, NEXT increases a little due to increase of the

    coupling ratio C /CT.If e propagation delay trough the

    995

    unit sucture with the length of g is sufciently smallcompared with the signal transition time, structure

    uniformity is valid and the line with alteated stubs can beregarded as a trsmission line.

    r-

    Fig. 2 The proposed routing method

    III. LTON ND ERFCTON

    Simulation ModelsFig. 3 shows the cross-sectional view d top view of

    pallel double microstrip lines on PCB. ey ae placed onFR4 PCB with the dielecic thickness of O.2mm (8mil. Thewidth of each microstrip line is 0.36mm (14mil, whichchaacteristic impedce is 50hms. e thickness of copperis negligible. The ickness of reference grond is O.036mm(1.4mil. e spacing between the aggressor line d thevictim line is 1.07mm (42mil that is three times themicrosip line width. When sient signal is applied to portned p as shown g.3 (b, there will generate ne-endcrosstalk ad far-end crosstalk respectively in ports named p2ad p4. Therefore, S(2,1 d S(4,1 of scattering paaeterscan represent the crosstalk strength of NEXT and FEXT.

    14

    ( = )

    2

    (a)

    vm l(b)

    14

    Fig. 3 Pallel double microstrip lines on PCB (a) cross-sectional view (b)top view

    Fig.4(ac shows simulation models of a pair ofmicrostrip lines, a serpentine guard ad a via-stitch guardadded between the two microstrip lines. The spacing betweenthe aggressor ad victim lines are maintained to be the saevalue of 1.07mm (42mil for fair comparison. The distance xand y is respectively O.15mm (6mil and O.76mm (30mil

    therein. The width of the serpentine gud is O.15mm (6mil,which chaacteristic impedance is 80hms. For preventing

  • 7/27/2019 Crosstalk Modeling

    3/4

    reection, each port of all above mentioned models ismatched.

    (a)

    AC

    (b)C 0 0 0 0 0 (c)

    Fig. 4 Simulation models (a) no guard (b) serpentine gurd (c) via-stitchguard

    B. Simulation Res ults and VercationI High Frequency Strcte Simulator (SS), all

    simulation models of g.2 d gA e established. roughmultiple optimizations, the optimum results c be fod onthe condition that e length of horizontal section inseentine gud is 2.54mm (100mil), d the length of sb

    and e unit strctre is 0.89mm (35ml) d 2mm (80ml)respectively in the proposed routing method. If e discebetween the adjacent vias is not shorer th /2 of the sgnalin via-stitch gud, resonce will occur at some equenciesin noise voltage of FEXT [3], which should be avoided.3.8mm (50mil) is considered as the best spacing betweenadjacent vias.

    Fig.5 shows e optimum simulation results of FEXT .dNEXT in the above mentioned dierent cases. Table I gvesthe maximum values of FEXT d NEXT in coespondingcases.

    From the simulation results, comparing with no guad, thevia-stitch guard reduces both FEXT and NEXT, but notsignictly; the serpentine guard trace c reduce FEXT by

    more than 40%, but NEXT becomes larger in someequency, in addition, some exta space is needed fofabrication; the proposed routing method reduces FEXT

    under -45 dB, that is it can eliminate FEXT almostcompletely, with a small increase in NEXT. In comparison

    with oer methods, the effect of the new proposed routingmethod to suppress FEXT is prominent especially in highequency. Because FEXT is more problematic than NEXT,

    the proposed routing method is prefeed in high-speed dhigh-density PCBs.

    996

    2

    30

    4

    50"> 6

    70

    90

    10

    10

    30

    4

    so

    -6>" 0Z

    90

    100

    sepentin guad via-stch guad- proposd outng mthodno guard

    frequency(GHz)

    (a)

    sepentne guadvasttch guad poposed roulng mthod

    no!'ad

    5 6

    quencyz

    (b)

    10

    0

    Fig. 5 Optimum simulation results in different cases (a) FEXT (b) NEXT

    ABLE IAL ALUE OF FEXT ADNEXT I IFFEET CAE

    No Via-stitch Serpentine ProposedGuard Guard Guard Routing

    Method

    FEXT -21.48 -24.93 -30.48 -45.04

    dBNEXT -35.51 -38.73 -37.16 -30.07

    (dB)

    IV. ONCLUSONS

    In is paper, a new routing method is proposed to reducethe pea far-end crosstalk voltage of parallel microstrip lineson printed circuit bods. Compaison with the no guad, eseentine guad, ad e via-stitch guard shows the

    proposed routing method gives the smallest values in thepeak far-end crosstalk voltage ad has a relatively simplerstructure. e proposed routing method can be usel forlarge high-speed d high-density digital electronicequipment.

  • 7/27/2019 Crosstalk Modeling

    4/4

    ACKNOWLEDGNT

    Thanks for my tutor . Guo to give me some goodsuggestions for writing this paper. lso, to discuss with myclassmate Zhag Limin was ve helpl for me.

    EFERENCES

    [I] Yung-Shou Cheng, Wei-Da Guo, Chih-Pin Hung, et all, "Enhancedmicrostrip gud trace for ringing noise suppression using a dielectric

    superstre", IEEE trans.aanced packaging, Vo.32,No.4 ,pp.I-7,2010.

    [2] Li Zhi, Wang Qiang, Shi Chgsheng, "pplication of guard traceswith vias in the PCB layout", in the 3rd inteationa symposiumon electromagnetic compatibility, Beijing, 2002,pp.771- 774.

    997

    [3] Kyoungho Lee, Hyun-Bae Lee, Hae-Kang ung, et all, "Serpentineguard trace to reduce far-end crosstalk d even-odd mode velocitymismatch of microstrip lines by more th 40%",in Proc.of the 57thIEEE electronic components and technolo conference, Reno,NV.,US,2007,pp.329-332.

    [4] S.-K. Lee, K. Lee, H.-J. Pk and J.-Y. Sim,"FEXT-eliminated stubalternated microstrip line for multi-gigabisecond parallel links",

    Electronics letters, Vo.44,No.4,pp.272-273,2008.[5] Kyoungho Lee, Hyun-Bae Lee,Hae-Kang ung, etc all, " serpentine

    gud trace to reduce the far-end crosstalk voltage and the crosstalk

    induced timing jitter of pallel microstrip lines", IEEE trans.advanced pacging, Vol.3,No.4,pp. 809- 812, 2008.