COSC 3330/6308 Computer Architecture

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COSC 3330/6308 Computer Architecture Jehan-François Pâris [email protected]

description

COSC 3330/6308 Computer Architecture. Jehan-François Pâris [email protected]. Administrative details (I). Instructor: Jehan-François Pâris E-mail:jparis AT uh DOT edu Office:569 PGH Phone:713-743-3341 (office hours) Office hours:MW 3:00-3:45 pm and 5:30-6:45 pm - PowerPoint PPT Presentation

Transcript of COSC 3330/6308 Computer Architecture

Page 1: COSC 3330/6308  Computer Architecture

COSC 3330/6308 Computer Architecture

Jehan-François Pâ[email protected]

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Administrative details (I)

• Instructor: Jehan-François Pâris• E-mail: jparis AT uh DOT edu• Office: 569 PGH• Phone: 713-743-3341 (office hours)• Office hours: MW 3:00-3:45 pm and

5:30-6:45 pm• Web page: www.cs.uh.edu/~paris• Email group: COSC_3330_fall_2012• Twitter: jehanfrancois (emergency)

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Administrative details (II)

• TA: Xifeng Gao– Email: gxf.xisha AT gmail DOT com– Hours: Th 4:30-6:00 in PGH 309

• TA: Salah Taamneh – Email: taamneh_07 AT hotmail DOT com – Hours: M 1- 2 pm and Tu 11am-12 noon

in PGH 201

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What we will cover

• Focus is on hardware, not software• Will discuss

– The various components of a computer• CPU, memory, storage

– How they are built• Combinatorial circuits (have no memory)• Sequential circuits

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Textbook

• D. A. Patterson and J. L. Hennessy,Computer Organization and Design,Morgan Kaufmann,4th Edition, 2009.– Third edition remains helpful

• Authors are top experts in the field– Patterson: Berkeley RISC and RAID arrays– Hennessy: MIPS

• Very unusual

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Course organization (I)

• Introduction:– Chapter 1

• Principles of digital design:Boolean algebra, gates, combinatorial circuits, ALU, flip-flops, latches and registers, SRAM and DRAM, finite state machines– Appendix B

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Course organization (II)

• Control units:combinational control units and finite state machine control – Appendix C

• Instruction set design:a brief overview – Chapter 2

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Course organization (III)

• Computer arithmetic:addition and subtraction, multiplication, division, floating point operations – Chapter 3

• The processor:data paths, pipelining, data and control hazards, parallelism– Chapter 4

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Course organization (IV)

• The memory hierarchy:main memory, cache organization, cache consistency – Chapter 5

• Storage subsystems:hard drives flash drives, RAID arrays, performance issues – Chapter 6

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Course organization (V)

• Parallel architectures:multicore, multiprocessors, clusters, hardware multithreading – Chapter 7

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Grading policy (I)

• Grade will be based on– Two midterms (20% each)– One final (40%)– Problem sets (20%)

• Ten percent penalty for late submissions

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Grading policy (II)

• All tests will be closed book• You will be responsible for all materials

discussed in class– Not for the readings

• You will be allowed one 8.5"×11" page of notes for each test – One page means one side of a sheet!

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Timetable

• First Midterm Monday, October 1• Second Midterm Monday, November 5• Final Friday, December 14

at 5:00 pm

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Academic honesty

• No cheating or plagiarism will be tolerated in any graded assignment

• You cannot pass for your own anything you did not write

• The minimum penalty for any transgression will be an F grade for the course

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You havebeen

warned!

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A word for the new students

• The American system of higher education favors those who work diligently through the semester

– Final examinations tend to be much less critical than in many other countries

– System offers no second chances