Computer archi&mp

253
1 Computer Computer Architecture Architecture and and Microprocessor Microprocessor

Transcript of Computer archi&mp

Page 1: Computer archi&mp

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ComputerComputer

Architecture Architecture andand

MicroprocessorMicroprocessor

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Computer Architecture

& Microprocessor

Session ISession I

Number SystemNumber System ConversionsConversions Binary OperationsBinary Operations CodeCode Logic GatesLogic Gates Boolean AlgebraBoolean Algebra Registers & CountersRegisters & Counters Computer LanguagesComputer Languages

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Number SystemNumber System

Systematic representation of data in Numerical FormatSystematic representation of data in Numerical Format

Decimal Number SystemDecimal Number System 0 to 9 0 to 9

Binary Number System Binary Number System 0 and 1 0 and 1

Octal Number SystemOctal Number System 0 to 7 0 to 7

Hexa Decimal Number SystemHexa Decimal Number System 0 to 9 and A to F 0 to 9 and A to F

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Decimal Number SystemDecimal Number System

Uses digits from 0 to 9.Uses digits from 0 to 9.

Has a base of 10Has a base of 10

Value of digit corresponds to its position in the numberValue of digit corresponds to its position in the number

number X (base)number X (base)position-1position-1

Example :Example :

4954951010 , 84 , 841010

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Binary Number SystemBinary Number System

Computer uses the Binary Number System Computer uses the Binary Number System

Consists of numbers 0 and 1Consists of numbers 0 and 1

Bit (Bit (BBinary diginary digitit))

Byte (8 - bits)Byte (8 - bits)

Example:Example:101010102 2 , 1110, 111022

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Octal Number SystemOctal Number System

Uses the digits from 0 to 7.Uses the digits from 0 to 7.

Has a base of 8Has a base of 8

can be represented by a group of 3 bitscan be represented by a group of 3 bits

Example:Example:

1231238 8 , 435, 43588

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Hexa Decimal Number SystemHexa Decimal Number System

Uses the digits from 0 to 15.Uses the digits from 0 to 15.

Numbers from 10 to 15 represented by alphabets A through FNumbers from 10 to 15 represented by alphabets A through F

Has a base of 16Has a base of 16

Can be represented by a group of 4 bits. Can be represented by a group of 4 bits.

Example:Example:

B3A1B3A116 16 , 98C, 98C1616

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Computer Architecture

& MicroprocessorNumber System TableNumber System Table

Decimal Decimal Number Number SystemSystem

Binary Binary Number Number SystemSystem

Octal Number Octal Number SystemSystem

Hexa Decimal Hexa Decimal Number Number SystemSystem

00

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

00000000

00010001

00100010

00110011

01000100

01010101

01100110

01110111

10001000

10011001

10101010

10111011

11001100

11011101

11101110

11111111

00

11

22

33

44

55

66

77

1010

1111

1212

1313

1414

1515

1616

1717

00

11

22

33

44

55

66

77

88

99

AA

BB

CC

DD

EE

FF

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Conversion of decimal Number to Hexadecimal NumberConversion of decimal Number to Hexadecimal Number

To convert, divide the decimal number by 16 successively To convert, divide the decimal number by 16 successively

ExampleExample

To convert 540 to decimalTo convert 540 to decimal

16 54016 540 16 33 -1216 33 -12 2 - 1 2 - 1

The decimal equivalent of 540The decimal equivalent of 54010 10 = 21C= 21C1616

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Conversion from Hexadecimal to DecimalConversion from Hexadecimal to Decimal

Multiply the digits of the number by the powers of 16 and addMultiply the digits of the number by the powers of 16 and add

ExampleExample To convert 21CTo convert 21C1616 to its decimal equivalent to its decimal equivalent

2 1 C

C X160 = 12 X 1 = 121 X161 = 1 X 16 = 16

2 X162 = 2 X 256= 512

540

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Conversion of Hexadecimal to Binary NumberConversion of Hexadecimal to Binary Number

The binary equivalent of each digit is usedThe binary equivalent of each digit is used

ExampleExample

To convert 5BTo convert 5B1616 to binary equivalent: to binary equivalent:

5 B5 B

010110110101101122

To convert B316 to binary equivalent:To convert B316 to binary equivalent: B 3B 3

101100111011001122

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Conversion of Binary to Decimal NumberConversion of Binary to Decimal Number

Sum of product of each digit with 2 raised to the power Sum of product of each digit with 2 raised to the power of positional value of positional value

Example:Example:

To find the decimal equivalent of 1011To find the decimal equivalent of 10112 2 ::

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Conversion from Octal to DecimalConversion from Octal to Decimal

Multiply the digits of the number by the powers of 8 and addMultiply the digits of the number by the powers of 8 and add

ExampleExample To convert 215To convert 21588 to its decimal equivalent to its decimal equivalent

2 1 5

5 X 80 = 5 X 1 = 51 X 81 = 1 X 8 = 8

2 X 82 = 2 X 64= 128

141

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9’s Complement9’s Complement

Difference of each digit of a number from 9Difference of each digit of a number from 9

Example:Example:

To find 9’s complement of To find 9’s complement of 5454 : :

9 99 9

5 45 4

4 54 5

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10’s Complement10’s Complement

Equivalent to the negative of a numberEquivalent to the negative of a number

Obtained by adding 1 to the 9’s complement of a numberObtained by adding 1 to the 9’s complement of a number

Example:Example:

To find 10’s complement of 54To find 10’s complement of 54= 9’s complement of 54 + 1 = 9’s complement of 54 + 1 = 45 + 1= 45 + 1= = 4646

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1’s Complement of binary number1’s Complement of binary number

Similar to 9’s complement of decimal numberSimilar to 9’s complement of decimal number

Obtained by subtracting each digit from 1Obtained by subtracting each digit from 1

ExampleExample

To find 1’s complement of 101To find 1’s complement of 101

1 1 11 1 11 0 11 0 10 1 00 1 0

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2’s complement of a binary number2’s complement of a binary number

Equivalent to 10’s complement of a decimal numberEquivalent to 10’s complement of a decimal number

Represents the negative equivalent of that numberRepresents the negative equivalent of that number

ExampleExample

To find the 2’s complement of 1010To find the 2’s complement of 1010= 1’s complement of 1010 + 1= 1’s complement of 1010 + 1= 0101 + 1= 0101 + 1= = 01100110

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Binary SubtractionBinary Subtraction

To subtract To subtract 1010 1010 from from 11001100

Find 2’s complement of 1010Find 2’s complement of 1010 Number Number : 1010: 1010

1’s complement1’s complement : 0101: 01012’s complement2’s complement : 0110: 0110

Add 2’s complement of 1010 with 1100Add 2’s complement of 1010 with 1100110011000110011000100010

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& MicroprocessorBCDBCD

Each digit is represented by four bits Each digit is represented by four bits

Decimal NumberDecimal Number BCDBCD

88 0000100000001000

99 0000100100001001

1010 0001000000010000

1111 0001000100010001

1212 0001001000010010

1313 0001001100010011

1414 0001010000010100

1515 0001010100010101

Decimal NumberDecimal Number BCDBCD

00 00000000

11 00010001

22 00100010

33 00110011

44 01000100

55 01010101

66 01100110

77 01110111

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Gray CodeGray Code

Only one bit changes for each consecutive numbersOnly one bit changes for each consecutive numbers

Decimal NumberDecimal Number Gray CodeGray Code

88 11001100

99 11011101

1010 11111111

1111 11101110

1212 10101010

1313 10111011

1414 10011001

1515 10001000

Decimal NumberDecimal Number Gray CodeGray Code

00 00000000

11 00010001

22 00110011

33 00100010

44 01100110

55 01110111

66 01010101

77 01000100

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ASCII CodesASCII Codes

American Standard Code for Information InterchangeAmerican Standard Code for Information Interchange

7 bit code7 bit code

Represents upto 128 charactersRepresents upto 128 characters

First 3 bits-zone bitsFirst 3 bits-zone bits

Second 4 bits-numeric bitsSecond 4 bits-numeric bits

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ASCII Code Character

00 NUL

01 SOH

02 STX

03 ETX

04 EOT

05 ENQ

06 ACK

07 BEL

08 BS

09 HT

0A LF

0B VT

0C FF

0D CR

0E S1

0F S0

10 DLE

ASCII Code Character

11 DC1 (X-on)

12 DC2 (Tape)

13 DC3 (X-off)

14 DC4

15 NAK

16 SYN

17 ETB

18 CAN

19 EM

1A SUB

1B ESC

1C FS

1D GS

1E RS

1F US

20 SP

21 !

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ASCII CodeASCII Code

ASCII Code Character

22 “

23 #

24 $

25 %

26 &

27 ‘

28 (

29 )

2A *

2B +

2C ,

2D -

2E .

2F /

30 0

31 1

ASCII Code Character

32 2

33 3

34 4

35 5

36 6

37 7

38 8

39 9

3A :

3B ;

3C <

3D =

3E >

3F ?

40 @

41 A

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ASCII Code Character

42 B

43 C

44 D

45 E

46 F

47 G

48 H

49 I

4A J

4B K

4C L

4D M

4E N

4F O

50 P

51 Q

52 R

53 S

54 T

55 U

ASCII Characters

56 V

57 W

58 X

59 Y

5A Z

5B [

5C \

5D ]

5E ^ ( )

5F - ( )

61 a

62 b

63 c

64 d

65 e

66 f

67 g

69 h

6A i

6B j

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& MicroprocessorASCII Code Character

6B k

6C l

6D m

6E n

6F o

70 p

71 q

72 r

73 s

74 t

75 u

76 v

77 w

78 x

79 y

7A z

7B {

7C |

7D }

7E ~

7F DEL

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ASCII -8 CodeASCII -8 Code

Uses 8 bit codeUses 8 bit code

Represents upto 256 charactersRepresents upto 256 characters

First 4 bits-zone bitsFirst 4 bits-zone bits

Second 4 bits-numeric bitsSecond 4 bits-numeric bits

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Logic GatesLogic Gates

NOT gateNOT gate or Inverter or Inverter

output is opposite of inputoutput is opposite of input

Truth TableTruth Table I/P 0/PI/P 0/P 0 10 1 1 0 1 0

I/P O/P

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AND GateAND Gate

Truth TableTruth TableI/P1 I/P1 I/P2I/P2 O/P O/P 00 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 1 1

I/P1

I/P2O/P

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NAND GateNAND Gate

Truth TableTruth TableI/P1 I/P1 I/P2I/P2 O/P O/P 00 0 0 1 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0

I/P1

I/P2O/P

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OR GateOR Gate

Truth TableTruth Table

I/P1I/P1 I/P2I/P2 O/PO/P00 00 0000 11 1111 00 1111 11 11

I/P1

I/P2O/P

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NOR GateNOR Gate

Truth TableTruth Table

I/P1I/P1 I/P2I/P2 O/PO/P00 00 1100 11 0011 00 0011 11 00

I/P1

I/P2O/P

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XOR GateXOR Gate

Truth TableTruth Table

I/P1I/P1 I/P2I/P2 O/PO/P00 00 0000 11 1111 00 1111 11 00

I/P1

I/P2O/P

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XNOR GateXNOR Gate

Truth TableTruth Table

I/P1I/P1 I/P2I/P2 O/PO/P00 00 1100 11 0011 00 0011 11 11

I/P1

I/P2O/P

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Boolean AlgebraBoolean Algebra

Algebra of binary values(1 & 0)Algebra of binary values(1 & 0)

Types of operationsTypes of operations

OR (+)OR (+) AND ( . )AND ( . ) NOT (- or ‘ )NOT (- or ‘ )

Minimizes the basic circuits to perform digital operations Minimizes the basic circuits to perform digital operations

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Algebraic TheoremsAlgebraic Theorems

OR LawsOR Laws

• A + 0 = AA + 0 = A• A + 1 =1A + 1 =1 • A + A = AA + A = A• A + A = 1A + A = 1

AND LawsAND Laws

• A . 0 = 0A . 0 = 0• A . 1 = AA . 1 = A• A . A = AA . A = A• A . A = 0A . A = 0

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Laws of ComplementationLaws of Complementation

A = AA = A 1 = 01 = 0 0 = 1 0 = 1 If A=0, then A =1If A=0, then A =1 If A=1, then A = 0If A=1, then A = 0

Commutative LawsCommutative Laws

A + B = B + AA + B = B + A A .B = B .AA .B = B .A

Associative LawsAssociative Laws

(A + B) + C = A + (B + C) = A + B + C(A + B) + C = A + (B + C) = A + B + C (A.B).C = A.(B.C) = A.B.C(A.B).C = A.(B.C) = A.B.C

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Computer Architecture

& MicroprocessorDistributive LawsDistributive Laws

A . (B+C) = A .B + A .CA . (B+C) = A .B + A .C A + B.C = (A + B) . (A + C)A + B.C = (A + B) . (A + C)

Other ExpressionsOther Expressions

A + AB = AA + AB = A A . (A + B) = AA . (A + B) = A A + AB = A + BA + AB = A + B A . (A + B) = ABA . (A + B) = AB AB + AB = AAB + AB = A (A + B)(A + B) = A(A + B)(A + B) = A AB + AC = (A + C) . (A + B)AB + AC = (A + C) . (A + B) (A + B) ( A + C) = AC + AB(A + B) ( A + C) = AC + AB AB + AC + BC = AB + ACAB + AC + BC = AB + AC (A + B)(A + C)(B + C) = (A + B)(A + C)(A + B)(A + C)(B + C) = (A + B)(A + C)

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Half Adder

Has two inputs (the bits to be summed)

Has two outputs (the sum bit and the carry bit)

AB CD

00011011

00101001

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an bn cn

 

sn cn+1

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

Full Adder – Truth Table

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0 0 0 0 01 0 0 0 12 0 0 1 03 0 0 1 14 0 1 0 05 0 1 0 16 0 1 1 07 0 1 1 18 1 0 0 09 1 0 0 1 

 

1 1 1 1 1 1 0 0 1 1 0 0 0 0 1 1 0 1 1 0 1 1 1 1 1 0 0 1 0 1 1 0 0 1 1 1 0 1 1 0 1 1 1 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 1 1 

INPUTS

X Y Z W A B C D E F G

OUTPUT

LEGAL DIGITS

1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 

1 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 1 

 

ERROR

7 Segment LED Display– Truth Table

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Stands for transistor - transistor logic. Stands for transistor - transistor logic.

Operates between cut-off and saturation.Operates between cut-off and saturation. Advantages:Advantages:

• SpeedSpeed• good fan – in and fan – out good fan – in and fan – out • easy interface with other digital circuitry easy interface with other digital circuitry

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Flip FlopFlip Flop

Stores a binary digitStores a binary digit

Stable till a signal switches itStable till a signal switches it

Types of Types of flip flopTypes of Types of flip flop

S-R flip flopS-R flip flop J-K flip flopJ-K flip flop D flip flopD flip flop T flip flopT flip flop

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RegistersRegisters

Group of flip-flopsGroup of flip-flops

Connected in parallelConnected in parallel

D flip-flop commonly usedD flip-flop commonly used

Shift RegisterShift Register

Shifts content unchangedShifts content unchanged

Temporary storageTemporary storage

Types:Types: Serial-in, serial-outSerial-in, serial-out Serial-in, parallel-outSerial-in, parallel-out Parallel in, serial-outParallel in, serial-out Parallel in, parallel outParallel in, parallel out

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Counts no. of pulsesCounts no. of pulses

Modulus of CounterModulus of Counter

• Binary CounterBinary Counter• Decade CounterDecade Counter• Pre settable CounterPre settable Counter

Binary CounterBinary Counter

J

k

Q

Q

J

k

Q

Q

J

k

Q

Q

J

k

Q

Q

CLK

3 2 1 0

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Types of CountersTypes of Counters

Up CounterUp Counter Down CounterDown Counter Up-Down CounterUp-Down Counter Controlled CounterControlled Counter Ring CounterRing Counter

Synchronous

Asynchronous

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& MicroprocessorComputer LanguagesComputer Languages

Machine Language Machine Language

– – 0 and 10 and 1

Assembly Language Assembly Language

– – mnemonics mnemonics – – assembler assembler

High Level Language High Level Language

– – English like language English like language – – Interpreters and CompilersInterpreters and Compilers

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Execution of Assembly Language programExecution of Assembly Language program

Source Program

Assembler

Object Program

Loader

Floppy Disk

Floppy Disk

One to One Translation

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Execution of High Level LanguageExecution of High Level Language

Source Code

Translator

Object Code 1 Object Code 2 Object Code 3

One to Many Translation

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Compiler & InterpreterCompiler & Interpreter

Interpreter translates line by lineInterpreter translates line by line

- Slower- Slower

Compiler translates the entire codeCompiler translates the entire code

- faster- faster

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Session IISession II

Microprocessor – an Introduction Microprocessor – an Introduction General Architecture of MicroprocessorGeneral Architecture of Microprocessor MemoryMemory I/OI/O Architecture of 8085 MicroprocessorArchitecture of 8085 Microprocessor

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Computer Architecture

& MicroprocessorMicroprocessor – An Microprocessor – An IntroductionIntroduction

Programmable Logical device Programmable Logical device

FunctionalityFunctionality

• manipulates data manipulates data • Controls timing of various operationsControls timing of various operations• communicates with peripheralscommunicates with peripherals

ApplicationsApplications

• Automation & ControlAutomation & Control

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Computer Architecture

& MicroprocessorArchitecture & Operations of Architecture & Operations of MPUMPU Architecture Architecture

- Logical design of microprocessor- Logical design of microprocessor

Types of OperationsTypes of Operations

• Microprocessor initiated operationsMicroprocessor initiated operations

• Internal Data OperationsInternal Data Operations

• Peripheral initiated OperationPeripheral initiated Operation

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Computer Architecture

& MicroprocessorMicroprocessor initiated Microprocessor initiated operationsoperations

Communications OperationsCommunications Operations

• Memory ReadMemory Read• Memory WriteMemory Write• I/O ReadI/O Read• I/O WriteI/O Write

Steps involvedSteps involved

• Location IdentificationLocation Identification• Transfer of dataTransfer of data• Providing Timing or synchronization signalsProviding Timing or synchronization signals

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RequirementRequirement

Address BusAddress Bus

• UnidirectionalUnidirectional• Arbitrary number – (commonly used 16)Arbitrary number – (commonly used 16)• Capable of Addressing 2 Capable of Addressing 2 nn

Data BusData Bus

• BidirectionalBidirectional• Decides the range of data being handledDecides the range of data being handled• Determines the word length and the register sizeDetermines the word length and the register size

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Control BusControl Bus

• A number of Single linesA number of Single lines• Provides timing signalsProvides timing signals

Communication ProcessCommunication Process

To Read an instructionTo Read an instruction

• Location is identified by placing the address in Address BusLocation is identified by placing the address in Address Bus• A pulse for initiating a READ is sentA pulse for initiating a READ is sent• Data Bus brings the data to MPUData Bus brings the data to MPU

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& MicroprocessorInternal Data Operations

Processing of Data and its StorageProcessing of Data and its Storage

• Arithmetic & Logical OperationArithmetic & Logical Operation• Condition TestingCondition Testing• Order of ExecutionOrder of Execution• Storing of DataStoring of Data

RequirementRequirement

• AccumulatorAccumulator• Flag RegisterFlag Register• General purpose RegistersGeneral purpose Registers• Program CounterProgram Counter• StackStack

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(8085 Microprocessor)(8085 Microprocessor)

AccumulatorAccumulator

• Performs Arithmetic and logical OperationsPerforms Arithmetic and logical Operations• 8 bit Register8 bit Register

Flag RegisterFlag Register

• Used for Decision MakingUsed for Decision Making• 5 Flags – Carry, Zero, Auxiliary Carry, Sign, Parity5 Flags – Carry, Zero, Auxiliary Carry, Sign, Parity

Program Status WordProgram Status Word

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RegistersRegisters

• Stores Data during ExecutionStores Data during Execution• 6 8-bit registers – B, C, D, E, H and L6 8-bit registers – B, C, D, E, H and L• Register Combination – BC, DE and HLRegister Combination – BC, DE and HL

Program Counter (PC)Program Counter (PC)

• 16 Bit Memory Pointer16 Bit Memory Pointer• Sequences the ExecutionSequences the Execution

Stack Pointer (SP)Stack Pointer (SP)

• 16 Bit Memory Pointer16 Bit Memory Pointer• Points to location in R/W MemoryPoints to location in R/W Memory

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Peripheral initiated OperationPeripheral initiated Operation

Operations initiated by external devicesOperations initiated by external devices

ResetReset• Program Counter is clearedProgram Counter is cleared

InterruptInterrupt• Normal Execution interrupted to execute Service RoutineNormal Execution interrupted to execute Service Routine

ReadyReady• Synchronizes MPU operations with PeripheralsSynchronizes MPU operations with Peripherals

HoldHold• Peripherals takes Control of BusesPeripherals takes Control of Buses

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MemoryMemory

Stores Binary ValuesStores Binary Values

TypesTypes

• Read Write Memory (R/W M)Read Write Memory (R/W M)• Read Only Memory (ROM)Read Only Memory (ROM)

R/W Memory (Random Access Memory)R/W Memory (Random Access Memory)• VolatileVolatile• processes data processes data • Types:- Types:- Static & DynamicStatic & Dynamic

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Static R/W MemoryStatic R/W Memory

• Flip-flopsFlip-flops• Stored as VoltageStored as Voltage

Dynamic R/W MemoryDynamic R/W Memory

• MOS Transistor MOS Transistor • Stored as chargesStored as charges• FasterFaster• Refreshing CircuitRefreshing Circuit

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ROM MemoryROM Memory

• Non VolatileNon Volatile

• Used for subroutinesUsed for subroutines

• Cheap & DenseCheap & Dense

• Types: - Types: -

Masked ROM Masked ROM PROM (Programmable Read Only Memory)PROM (Programmable Read Only Memory) EPROM (Erasable Programmable Read Only Memory)EPROM (Erasable Programmable Read Only Memory) EEPROM (Electrically Erasable PROM)EEPROM (Electrically Erasable PROM)

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Memory OrganizationMemory Organization

A memory requires:A memory requires:

• Chips containing Registers Chips containing Registers • Chip Select lineChip Select line• R/W lineR/W line• Address linesAddress lines• I/O linesI/O lines

Memory MapMemory Map

• Assigning a unique address for each registerAssigning a unique address for each register

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Control LogicADDRESS

DECODER

R/W

D7 D6 D5 D4 D3 D2 D1 D0

A2

A1

A0

110

110

101

100

011

010

001

000

Size of MemorySize of Memory• Number of RegisterNumber of Register• Number of I/O linesNumber of I/O lines

CS

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Input / OutputInput / Output

• Communicates to the external worldCommunicates to the external world

Methods of CommunicationMethods of Communication

• Peripheral or Direct I/OPeripheral or Direct I/O

• Memory-Mapped I/OMemory-Mapped I/O

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& Microprocessor

• Peripheral or Direct I/OPeripheral or Direct I/O IN/OUTIN/OUT Transfers data Transfers data 8 Address Lines - 256 devices – Port Numbers8 Address Lines - 256 devices – Port Numbers Uses Control Lines – IOW & IORUses Control Lines – IOW & IOR

• Memory-Mapped I/OMemory-Mapped I/O

16 Address Lines 16 Address Lines Memory Map is sharedMemory Map is shared Uses Control Lines – MEMW & MEMRUses Control Lines – MEMW & MEMR

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Interfacing DevicesInterfacing Devices

Tri-State DeviceTri-State Device• 3 stages – logic 1, logic 0 and high impedance3 stages – logic 1, logic 0 and high impedance

BufferBuffer• Logic circuit which amplifies the currentLogic circuit which amplifies the current

LatchLatch• a D flip-flopa D flip-flop• Types :-Types :-

D

G

Q

Q

Transparent Latch Positive Edge Triggered

D

CK

Q

Q

PR

CLR

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DecoderDecoder• Displays an output based on the Displays an output based on the

combination of inputcombination of input

EncoderEncoder• Outputs a code based on the inputOutputs a code based on the input

2 to 4Decoder

2 to 4Encoder

Output

Output

Input

Input

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8085 Microprocessor8085 Microprocessor

FeaturesFeatures

• 8 bit8 bit• Has 40 pinsHas 40 pins• Multiplexed Address/ Data BusMultiplexed Address/ Data Bus

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& Microprocessor8085

PINOUTX1

X2

RESET OUT

SOD

SID

TRAP

RST 7.5

RST 6.5

RST 5.5

INTR

INTA

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

VSS

Vcc

HOLD

HLDA

CLK(OUT)

RESET IN

READY

IO/M

S1

RD

WR

ALE

S0

A15

A14

A13

A12

A11

A10

A9

A8

1

2

3

4

5

6

7

8

9

10

11

12

14

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

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& Microprocessor+5V GND

Serial

I/O

Ports

Interrupts

&

Externally

Initiated

Signals

External Signal

Acknowledgement

RESET CLK OUTOUT

X1 X2 Vcc Vss

ALE

S0

S1

IO/M

RD

WR

SID

SOD

TRAP

RST 7.5

RST 6.5

RST 5.5

INTR

READY

HOLD

RESET IN

INTA

HLDA

High-OrderAddress Bus

MultiplexedAddress/Data Bus

A15

A8

AD7

AD0

Control

And

Status Signals

8085 Signals

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8085 Microprocessor Signal Groups8085 Microprocessor Signal Groups

Address BusAddress Bus

• UniDirectionalUniDirectional• 8 Higher Order Address Bus8 Higher Order Address Bus

Multiplexed Address/Data BusMultiplexed Address/Data Bus

• BiDirectionalBiDirectional• Bus MultiplexingBus Multiplexing• Latching of Low - order Address Bus – ALE Latching of Low - order Address Bus – ALE

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Control and Status SignalControl and Status Signal

ALE (Address Latch Enable)ALE (Address Latch Enable)• Generated in the beginning of each operationGenerated in the beginning of each operation• Latches low - order address from the multiplexed busLatches low - order address from the multiplexed bus

RD (Read)RD (Read)• Active low Control SignalActive low Control Signal• Reads from Memory / IOReads from Memory / IO

WR (Write)WR (Write)• Active low Control SignalActive low Control Signal• Writes to selected Memory / IOWrites to selected Memory / IO

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IO/M

RD

8085

WR

A15

A8

ALE

AD7

AD0

ENLATCH

A15

A8

A7

A0

D7

D0

Data Bus

MEMR

MEMW

IOR

IOW

Control Signals

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& Microprocessor

IO/MIO/M

• High – IO OperationHigh – IO Operation• Low – Memory OperationLow – Memory Operation

SS11 and S and S00

• Status Signal – rarely usedStatus Signal – rarely used• Identifies various operationsIdentifies various operations

S1S1 So Desc. So Desc.0 0 0 0 HALT HALT0 0 1 1 WRITE WRITE1 1 0 0 READ READ11 1 1 FETCH FETCH

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Power Supply and Clock FrequencyPower Supply and Clock Frequency

• +5V power supply (Vcc)+5V power supply (Vcc)• 3 MHz clock (X1 & X2)3 MHz clock (X1 & X2)• CLK – Used as System Clock for other devicesCLK – Used as System Clock for other devices

Interrupts and Externally Initiated OperationsInterrupts and Externally Initiated Operations

• Interrupts transfer the program control to specific memory Interrupts transfer the program control to specific memory locationlocation

INTR (Interrupt Request)INTR (Interrupt Request)• A general-purpose interruptA general-purpose interrupt..

INTA (Interrupt Acknowledge)INTA (Interrupt Acknowledge)• Acknowledges an interruptAcknowledges an interrupt

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RST 7.5 (Restart Interrupt)RST 7.5 (Restart Interrupt)• Highest priority Vectored InterruptHighest priority Vectored Interrupt

RST 6.5 (Restart Interrupt)RST 6.5 (Restart Interrupt)• Vectored interrupt with a priority less than RST 7.5, but Vectored interrupt with a priority less than RST 7.5, but

more than RST 5.5 and INTR.more than RST 5.5 and INTR.

RST 5.5 (Restart Interrupt)RST 5.5 (Restart Interrupt)• Vectored interrupt with the least priority among Restart Vectored interrupt with the least priority among Restart

Interrupts but more priority than INTR signals.Interrupts but more priority than INTR signals.

TRAP (Input)TRAP (Input)• A non-maskable restart interrupt. A non-maskable restart interrupt. • highest priority of any interrupt.highest priority of any interrupt.

• Externally initiated signals are instantiated by an external Externally initiated signals are instantiated by an external device device

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Computer Architecture

& Microprocessor HOLDHOLD

• Indicates a peripheral’s request to use address and data Indicates a peripheral’s request to use address and data buses. buses.

HLDA ( Hold Acknowledge)HLDA ( Hold Acknowledge)• Acknowledges the HOLD request. Acknowledges the HOLD request.

READYREADY• Delays microprocessor’s operation to work in pace with the Delays microprocessor’s operation to work in pace with the

slow peripherals connected to it. slow peripherals connected to it.

RESET INRESET IN• Sets program counter to zero Sets program counter to zero • The buses are tri-stated and MPU is reset.The buses are tri-stated and MPU is reset.

RESET OUTRESET OUT• Indicates MPU is being reset Indicates MPU is being reset • Can be used to reset other devices.Can be used to reset other devices.

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Serial I/O PortsSerial I/O Ports

SID (Input)SID (Input)

• Serial input data Line Serial input data Line • The data on SID is loaded into accumulator when a RIM The data on SID is loaded into accumulator when a RIM

instruction is executed.instruction is executed.

SOD (output)SOD (output)

• Serial output data line. Serial output data line. • The output SOD is set or reset as specified by the SIM The output SOD is set or reset as specified by the SIM

instruction.instruction.

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Address Buffer

Accumulator (8)

Temp Reg. (8)

Arithmetic Logic Unit

(ALU)

(8)

Instruction Decoder

and Machine

Cycle Encoding

Flag (5)

Flip-flops

Instruction Register (8)

W Temp. Reg. Z Temp. Reg.

B Reg.

D Reg.

H Reg.

Stack

Program Counter

C Reg.

E Reg.

L Reg.

Address Latch (16)

Data Address Buffer (8)

Multiplexer

Timing and ControlCLK ResetGEN Control Status DMA

Re

g.

Se

lec

t

Serial I/O Control

SID

Interrupt Control

TRAPRST 7.5

RST 6.5RST 5.5

INTA INTR

SOD

ReadyRD WR ALE S0 S1 IO/M HLDA RESET OUT

RESET INHOLDA15 – A8

Address Bus AD7 – AD0

Address/Data Bus

X1

x2

Register Array

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& Microprocessor

RegistersRegisters

A A (Accumulato(Accumulato

r) r)

8 Bits8 Bits

Arithmetic OperationsArithmetic Operations

Logical OperationsLogical Operations

BB

8 8 BitsBits

CC

8 Bits8 BitsB & C combined to form 16 B & C combined to form 16 BitsBits

DD

8 8 BitsBits

EE

8 Bits8 BitsD & E combined to form 16 D & E combined to form 16 BitsBits

HH

8 8 BitsBits

LL

8 Bits8 BitsH & L combined to form 16 H & L combined to form 16 BitsBits

PC (Program PC (Program Counter)Counter)

16 Bits16 Bits

Has the Program Pointer Has the Program Pointer AddressAddress

SP (Stack SP (Stack Pointer)Pointer)

16 Bits16 Bits

Has the Memory Pointer Has the Memory Pointer AddressAddress

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& Microprocessor

FlagsFlags

SS ZZ ACAC PP CYCY D7 D6 D5 D4 D3 D2 D1 D0

SS SignSign Set – PositiveSet – Positive

Reset – NegativeReset – Negative

ZZ ZeroZero Set – ZeroSet – Zero

Reset – Non-ZeroReset – Non-Zero

AACC

AuxilAuxiliary iary CarrCarr

yy

Set – Carry From D3 to Set – Carry From D3 to D4D4

Reset – No Carry From Reset – No Carry From D3 to D4D3 to D4

PP ParitParityy

Set – EvenSet – Even

Reset – Odd Reset – Odd

CCYY

CarrCarryy

Set – Carry ExistsSet – Carry Exists

Reset – No Carry existsReset – No Carry exists

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& Microprocessor

Bus TimingsBus Timings

• Sequence of operations called instruction Sequence of operations called instruction cycle executes an instruction cycle executes an instruction

• Instruction Cycle is divided into few basic Instruction Cycle is divided into few basic machine cyclesmachine cycles

• Machine cycles are in turn divided into Machine cycles are in turn divided into System Clock Period.System Clock Period.

Example:Example:• To fetch a data 10101010 from a location To fetch a data 10101010 from a location

2005H2005H

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& Microprocessor

T1 T2 T3

CLK

A15 – A8

AD7 –AD0

ALE

IO/M

RD

Low -Order

Memory Address

Memory

Contents

M

High –Order

Memory Address

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& Microprocessor

ALUInstruction

Decoder

ControlLogic

B

D

H

Stack

Program Counter

C

E

L

Address Bus

Data Bus

Memory

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& Microprocessor

Instruction Set of 8085Instruction Set of 8085

Instruction Instruction • A command to perform a given task. A command to perform a given task. • A binary pattern designed inside a microprocessor to A binary pattern designed inside a microprocessor to

perform a specific function on a specified data. perform a specific function on a specified data.

Instruction SetInstruction Set• Entire group of instructions that determines what Entire group of instructions that determines what

functions the microprocessor can perform. functions the microprocessor can perform.

Parts of Instruction: Parts of Instruction: • Task to be performed – operation code (opcode)Task to be performed – operation code (opcode)• Data to be operated on – operand. Data to be operated on – operand.

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ClassificationClassification• Instruction Word Size Instruction Word Size

One-word or 1-byte instructionsOne-word or 1-byte instructions Two-word or 2-byte instructionsTwo-word or 2-byte instructions Three-word or 3-byte instructionsThree-word or 3-byte instructions

• FunctionalityFunctionality Data transfer (copy) operationsData transfer (copy) operations Arithmetic operationsArithmetic operations Logical operationsLogical operations Branching operationsBranching operations Machine-control operations. Machine-control operations.

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ONE-BYTE INSTRUCTIONSONE-BYTE INSTRUCTIONS

• Includes opcode and operand in single byte.Includes opcode and operand in single byte.• Operand(s) are internal registerOperand(s) are internal register

Example:Example:• MOV C,AMOV C,A

Both operand registers are specified.Both operand registers are specified.

• ADD BADD B The operand B is specified and the accumulator is The operand B is specified and the accumulator is

assumed. assumed.

• CMA CMA Accumulator is assumed to be the implicit operand Accumulator is assumed to be the implicit operand

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& Microprocessor

TWO-BYTE INSTRUCTIONSTWO-BYTE INSTRUCTIONS

• Uses two-bytes Uses two-bytes First byte specifies the operation code First byte specifies the operation code Second byte specifies the operand. Second byte specifies the operand. Source operand is a data byteSource operand is a data byte

• ExampleExample MVI A, 32HMVI A, 32H

THREE-BYTE INSTRUCTIONTHREE-BYTE INSTRUCTION

• First byte specifies the opcodeFirst byte specifies the opcode• Following two bytes specify the 16-bit address. Following two bytes specify the 16-bit address.

second byte – low-order address or datasecond byte – low-order address or data third byte is the high-order address or datathird byte is the high-order address or data

• ExampleExample JMP 2085H, LXI H, 2050HJMP 2085H, LXI H, 2050H

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DATA TRANSFER (COPY) OPERATIONSDATA TRANSFER (COPY) OPERATIONS

• Copies data from a location called a source to Copies data from a location called a source to another location called a destinationanother location called a destination

• Contents of source not modifiedContents of source not modified

• Types of data transfer :Types of data transfer :

Between Registers.Between Registers. Specific data byte to a register or a memory location.Specific data byte to a register or a memory location. Between a memory location and a registerBetween a memory location and a register

Between an I/O device and the accumulator.Between an I/O device and the accumulator.

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& Microprocessor

MOVMOV• Copies data from one register to anotherCopies data from one register to another• Syntax:Syntax:

MOV RMOV Rdd, R, Rss

• Example:Example: MOV A, BMOV A, B

MVIMVI• Copies 8 Bit data to a specific registerCopies 8 Bit data to a specific register• Syntax:Syntax:

MVI Rd, DMVI Rd, D

• Example:Example: MVI C, 5MVI C, 5

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OUTOUT• Copies the Contents of Accumulator to PortCopies the Contents of Accumulator to Port• Syntax:Syntax:

OUT PortNo.OUT PortNo.

• Example:Example: OUT 56OUT 56

ININ• Copies the Contents of the Port to AccumulatorCopies the Contents of the Port to Accumulator• Syntax:Syntax:

IN PortNo.IN PortNo.

• Example:Example: IN 57IN 57

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Between RegistersBetween Registers

OP OP CodeCode

OperOperandand

BytByteses

DescriptionDescription

MOVMOV Rd, Rd, RsRs

11 Copies data From Copies data From Source Register Source Register RsRs to to Destination Register Destination Register RdRdOP OP

CodeCodeOperOperandand

BytesBytes DescriptionDescription

MOVMOV M, RsM, Rs 11 Copies data From Copies data From Source Register Source Register RsRs to Memory to Memory MM

MOVMOV Rd, Rd, MM

11 Copies data From Copies data From memory memory MM to to Destination Destination Register Register RdRd

Between Registers and MemoryBetween Registers and Memory

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& MicroprocessorData to/from Register, Memory Data to/from Register, Memory or I/O Portor I/O PortOP OP

CodeCodeOperOperandand

BytByteses

DescriptionDescription

ININ 8 Bit 8 Bit Port Port AddrAddressess

22 Copies data From Copies data From Specified port Address Specified port Address to Accumulator to Accumulator AA

OUTOUT 8 Bit 8 Bit Port Port AddrAddressess

22 Copies data From Copies data From Accumulator Accumulator AA to to Specified port AddressSpecified port Address

MVIMVI R, R, Data Data (8 (8 Bits)Bits)

22 Loads the Data to the Loads the Data to the Specified RegisterSpecified Register

LHLDLHLD 16 16 Bit Bit AddrAddressess

33 Copies the content of Copies the content of the memory location the memory location pointed out by 16 bit pointed out by 16 bit address to Register address to Register LL and content of next and content of next memory location to memory location to Register Register HH

SHLDSHLD 16 16 Bit Bit AddrAddressess

33 Copies the content of Copies the content of the Register the Register LL to to memory location memory location pointed out by 16 bit pointed out by 16 bit address and content of address and content of Register Register HH to next to next memory locationmemory location

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OP OP CodeCode

OperOperandand

BytByteses

DescriptionDescription

LDALDA 16 16 Bit Bit AddrAddressess

33 Copies the content of Copies the content of Memory location Memory location specified by 16 bit specified by 16 bit address to Accumulator address to Accumulator AA

LDAXLDAX RP RP B/DB/D

11 Copies the content of Copies the content of Memory Location Memory Location Specified in Register Pair Specified in Register Pair B or DB or D to Accumulator to Accumulator A A

STASTA 16 16 Bit Bit AddrAddressess

33 Copies the content of Copies the content of Accumulator Accumulator AA to to Memory location Memory location specified by 16 bit specified by 16 bit addressaddress

STAXSTAX RP RP B/DB/D

11 Copies the content of Copies the content of Memory Location Memory Location AccumulatorAccumulator A A to to Specified in Register Pair Specified in Register Pair B or DB or D

LXILXI RP, RP, 16 16 Bit Bit DataData

33 Loads the 16 bit data Loads the 16 bit data into the Register Pair into the Register Pair

XCHXCHGG

NoneNone 11 Contents of Register Contents of Register HH is is exchanged with Register exchanged with Register DD and Contents of and Contents of Register Register LL is exchanged is exchanged with Register with Register EE

Data to/from Register, Data to/from Register, Memory or I/O PortMemory or I/O Port

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ARITHMETIC OPERATIONSARITHMETIC OPERATIONS

• Performs addition, subtraction, increment and decrement.Performs addition, subtraction, increment and decrement.

Addition Addition • Adds an 8-bit data to the accumulatorAdds an 8-bit data to the accumulator• Carry Flag is set if the sum exceeds 8-bitsCarry Flag is set if the sum exceeds 8-bits

ADDADD• Adds a register’s content to the accumulatorAdds a register’s content to the accumulator• Syntax:Syntax:

ADD RADD R

ADIADI• Adds an 8-bit data to the accumulatorAdds an 8-bit data to the accumulator• Syntax:Syntax:

ADI 8-bit DataADI 8-bit Data

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& Microprocessor

Subtraction Subtraction

• Subtracts an 8-bit data to the accumulator and the Subtracts an 8-bit data to the accumulator and the stores the difference in it.stores the difference in it.

• Performed in 2's complement methodPerformed in 2's complement method

SUBSUB• Subtracts a register’s content from the accumulatorSubtracts a register’s content from the accumulator• Syntax:Syntax:

SUB RSUB R

SUISUI• Subtracts an 8-bit data from the accumulatorSubtracts an 8-bit data from the accumulator• Syntax:Syntax:

SBI 8-bit DataSBI 8-bit Data

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& Microprocessor

Increment/Decrement Increment/Decrement

• Increments/Decrements 8-bit content by 1. Increments/Decrements 8-bit content by 1. • Increments/Decrements 16-bit contents of a register pair Increments/Decrements 16-bit contents of a register pair

(such as BC)(such as BC)

INRINR• Increments the content of a registerIncrements the content of a register• Syntax:Syntax:

INR B INR B

DCRDCR• Decrements the content of a registerDecrements the content of a register• Syntax:Syntax:

DCR BDCR B

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Arithmetic OperationsArithmetic OperationsOP OP

CodeCodeOpeOperandrand

BytByteses

DescriptionDescription

ADDADD R/MR/M 11 Content of the Content of the Register Register or Memory or Memory is added to is added to the content of the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

SUBSUB R/MR/M 11 Content of the Content of the Register Register or Memory or Memory is subtracted is subtracted from the content of from the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

ADIADI 8 Bit 8 Bit DataData

22 8 Bit Data 8 Bit Data is added to is added to the the AccumulatorAccumulator content content and stores the result in and stores the result in AccumulatorAccumulator

SUISUI 8 Bit 8 Bit DataData

22 8 Bit Data 8 Bit Data is subtracted is subtracted from the content of from the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

INRINR R/MR/M 11 The content of the The content of the specified specified Register or Register or MemoryMemory is is incrementedincremented by by 11

DCRDCR R/MR/M 11 The content of the The content of the specified specified Register or Register or MemoryMemory is is decrementeddecremented by by 11

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& Microprocessor

LOGICAL OPERATIONSLOGICAL OPERATIONS

• Performs logical operations with accumulator contentPerforms logical operations with accumulator content

AND, OR, Exclusive-OR AND, OR, Exclusive-OR

• Performed on an 8-bit data and accumulator content Performed on an 8-bit data and accumulator content

ANDAND• Logically AND the Register Content with Accumulator Logically AND the Register Content with Accumulator

ContentContent• Syntax:Syntax:

AND RAND R ANIANI

• Logically ANd Immediately 8-Bit Data with Accumulator Logically ANd Immediately 8-Bit Data with Accumulator ContentContent

• Syntax:Syntax: ANI 14ANI 14

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& Microprocessor

ORAORA

• Logically OR contents of Register with AccumulatorLogically OR contents of Register with Accumulator

• Syntax:Syntax: ORA CORA C

ORIORI

• Logically OR Immediately 8 Bit Data with AccumulatorLogically OR Immediately 8 Bit Data with Accumulator

• Syntax:Syntax: ORI DORI D

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& Microprocessor

XRAXRA

• Logically Exclusive - OR the contents of Register with Logically Exclusive - OR the contents of Register with AccumulatorAccumulator

• Syntax:Syntax: XRA CXRA C

XRIXRI

• Logically Exclusively - OR immediately 8 Bit Data with Logically Exclusively - OR immediately 8 Bit Data with AccumulatorAccumulator

• Syntax:Syntax: XRI 6XRI 6

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& Microprocessor

CMACMA

• Complements the contents of accumulatorComplements the contents of accumulator• No Flags are affectedNo Flags are affected• Syntax:Syntax:

CMACMA

RotateRotate

• Shifts Shifts BitsBits in the accumulator either left or right in the accumulator either left or right

CompareCompare• Compares an 8-bit data with accumulator contentCompares an 8-bit data with accumulator content

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& Microprocessor BRANCHING OPERATIONSBRANCHING OPERATIONS

• Alters program execution sequence either conditionally Alters program execution sequence either conditionally or unconditionally.or unconditionally.

Jump Jump • Conditional jump Conditional jump

Alters program sequence when condition test is trueAlters program sequence when condition test is true

• Unconditional jumpUnconditional jump Alters program sequence without condition checkingAlters program sequence without condition checking

CallCall• Changes sequence of a program by calling a subroutine Changes sequence of a program by calling a subroutine

ReturnReturn• Changes sequence of a program by returning from a Changes sequence of a program by returning from a

subroutine subroutine

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Unconditional jumpUnconditional jump

JMPJMP

• The program control is transferred to a The program control is transferred to a particular memory addressparticular memory address

• Syntax:Syntax: JMP AddressJMP Address

• Example:Example: JMP F200JMP F200

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& Microprocessor Conditional JumpConditional Jump

• Based on Condition of the flagsBased on Condition of the flags• All Instructions are followed by a 16-Bit addressAll Instructions are followed by a 16-Bit address

JCJC• Transfers program control to a particular address if Carry Transfers program control to a particular address if Carry

Flag is SetFlag is Set

JNCJNC• Transfers program control to a particular address if Carry Transfers program control to a particular address if Carry

Flag is not SetFlag is not Set

JZJZ• Transfers program control if Zero Flag is SetTransfers program control if Zero Flag is Set

JNZJNZ• Transfers program control if Zero Flag is not SetTransfers program control if Zero Flag is not Set

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JPJP• Transfers program control if Sign Flag is not SetTransfers program control if Sign Flag is not Set

JMJM• Transfers program control if Sign Flag is SetTransfers program control if Sign Flag is Set

JPEJPE• Transfers program control if Parity Flag is SetTransfers program control if Parity Flag is Set

JPOJPO• Transfers program control if Parity Flag is not SetTransfers program control if Parity Flag is not Set

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MACHINE CONTROL OPERATIONSMACHINE CONTROL OPERATIONS• Controls machine functions Controls machine functions • Examples:Examples:

Halt, Interrupts, No OperationHalt, Interrupts, No Operation

HaltHalt• Processor Stops ExecutingProcessor Stops Executing• Syntax:Syntax:

HLTHLT

No OperationNo Operation• No Operation is performedNo Operation is performed• Syntax:Syntax:

NOPNOP

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8085 ADDRESSING MODES8085 ADDRESSING MODES

• Addressing Modes specifies various formats for operands Addressing Modes specifies various formats for operands

a register, an input/ output port, or an 8-bit numbera register, an input/ output port, or an 8-bit number

Types:Types:

• Immediate addressing.Immediate addressing.

• Register addressing.Register addressing.

• Direct addressing.Direct addressing.

• Indirect addressing.Indirect addressing.

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Immediate AddressingImmediate Addressing

• Data is present in the instruction Data is present in the instruction • Example:Example:

MVI R,dataMVI R,data

Register addressingRegister addressing

• Data is provided through the registers. Data is provided through the registers. • Example: Example:

MOV Rd, RsMOV Rd, Rs

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& Microprocessor

Direct addressingDirect addressing

• Accepts data from or sends data to the outside device. Accepts data from or sends data to the outside device.

• Example: Example: IN 00H or OUT 01HIN 00H or OUT 01H

Indirect AddressingIndirect Addressing

• Effective Address is calculated by the processorEffective Address is calculated by the processor

• The contents of the address (and the one following) is The contents of the address (and the one following) is used to form a second address where the data is used to form a second address where the data is storedstored

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& MicroprocessorAssembly Language Assembly Language ProgrammingProgramming

Memory AddressMemory Address• 16 bit address of System Memory16 bit address of System Memory

Machine CodeMachine Code• Hexadecimal entered in System MemoryHexadecimal entered in System Memory

OpcodeOpcode• Abbreviated Symbols specified by manufacturerAbbreviated Symbols specified by manufacturer

OperandOperand• Item to be processedItem to be processed

CommentsComments• Documentation explaining purpose of instructions usedDocumentation explaining purpose of instructions used

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& Microprocessor

Assembly Language ProgramAssembly Language Program

Program to accept and display a number Program to accept and display a number

TaskTask MnemonicsMnemonics

1.1. Load Register B with 4EHLoad Register B with 4EH MVI B, 4EHMVI B, 4EH

2.2. Copy the Number to AccumulatorCopy the Number to Accumulator MOV A, BMOV A, B

3.3. Sent the Number to Output PortSent the Number to Output Port OUT, Port1OUT, Port1

4.4. End of the ProgramEnd of the Program HLTHLT

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Programming FormatProgramming Format

OP OP CodeCode

OperaOperandnd

DescriptionDescription

MVIMVI B, B, 37H37H

Loads 37H to Register BLoads 37H to Register B

MOVMOV A, BA, B Copies Content of Register B Copies Content of Register B to Accumulatorto Accumulator

OUTOUT Port1Port1 Sends 37H to Port ‘Sends 37H to Port ‘Port1Port1’’

HLTHLT NoneNone End of the ProgramEnd of the Program

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Arithmetic OperationsArithmetic OperationsOP OP CodeCode

OperOperandand

BytByteses

DescriptionDescription

ADDADD R/MR/M 11 Content of the Content of the Register Register or Memory or Memory is added to is added to the content of the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

SUBSUB R/MR/M 11 Content of the Content of the Register Register or Memory or Memory is subtracted is subtracted from the content of from the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

ADIADI 8 Bit 8 Bit DataData

22 8 Bit Data 8 Bit Data is added to is added to the content of the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

SUISUI 8 Bit 8 Bit DataData

22 8 Bit Data 8 Bit Data is subtracted is subtracted from the content of from the content of Accumulator Accumulator and the and the result is stored in result is stored in AccumulatorAccumulator

INRINR R/MR/M 11 The content of the The content of the specified specified Register or Register or MemoryMemory is is incrementedincremented by by 11

DCRDCR R/MR/M 11 The content of the The content of the specified specified Register or Register or MemoryMemory is is decrementeddecremented by by 11

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LoopsLoops

• Executes a set of instructions repeatedlyExecutes a set of instructions repeatedly• TypesTypes

Continuous LoopContinuous Loop Conditional LoopConditional Loop

Continuous LoopContinuous Loop• Uses unconditional jumpUses unconditional jump

Conditional LoopConditional Loop• Uses Conditional JumpUses Conditional Jump

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CounterCounter• Executes certain set of instructions a Executes certain set of instructions a

specified number of timesspecified number of times• Uses the concept of conditional loopUses the concept of conditional loop• Can be incremented or decrementedCan be incremented or decremented

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First ProgramFirst Program

Load a number to Register Load a number to Register BB and and display the output in display the output in Port1Port1

Steps:Steps:

1. Load register B with a Number1. Load register B with a Number

2. Send to Output to Port12. Send to Output to Port1

AlgorithmAlgorithm

Start

Input Number In Register

Output Number

Stop

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CA & CA & µPµP

Unit IVUnit IV

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& Microprocessor

Setting up a CounterSetting up a Counter Executes certain set of instructions a specified number of Executes certain set of instructions a specified number of

timestimes

A Register is Loaded with a numberA Register is Loaded with a number

Using INR (Increment) or DCR (Decrement) the number is Using INR (Increment) or DCR (Decrement) the number is Incremented or DecrementedIncremented or Decremented

Uses the concept of conditional loopUses the concept of conditional loop

Time delay requiredTime delay required

If the register reaches the final count the loop is terminatedIf the register reaches the final count the loop is terminated

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Flowchart Flowchart Start

Initialize

Update

Is the Final Count

End

No

Yes

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Time DelayTime Delay

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& Microprocessor

T - StatesT - StatesOne Subdivision of the operation performed in one clock One Subdivision of the operation performed in one clock

periodperiod

Frequency & Time/Clock PeriodFrequency & Time/Clock PeriodFrequency in the Processing Speed of a ProcessorFrequency in the Processing Speed of a Processor

Time Period = (Frequency)Time Period = (Frequency)-1-1

Time PeriodTime Period = = 1 1

FrequencyFrequency

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Time DelayTime Delay

Uses the concept of counterUses the concept of counter No. of Counts depends on T-States.No. of Counts depends on T-States.

Calculation of Time for Execution:Calculation of Time for Execution: Clock Period = 1/frequencyClock Period = 1/frequency Time for Execution of Instruction = Time for Execution of Instruction =

No. of T-States X Clock PeriodNo. of T-States X Clock Period

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Simple Time Delay ProgramSimple Time Delay Program

MVI B, 77HMVI B, 77H -- 7 T-States7 T-States

Loop:Loop: DCR BDCR B -- 4 T-States4 T-States

JNZ JNZ LOOPLOOP -- 10/7 10/7 T-StatesT-States

HLTHLT -- 5 T-States5 T-States

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Time DelayTime Delay

Time Delay in executing the LoopTime Delay in executing the Loop

TTLL = (Time Period = (Time Period T T X X Loop T-States Loop T-States X X Equivalent Decimal Number Equivalent Decimal Number NN1010))

Total Time Delay in executing the LoopTotal Time Delay in executing the Loop

TTLALA = T = TLL – Time Adjustment – Time Adjustment

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Time Delay for the ProgramTime Delay for the Program

Let us Assume the Let us Assume the Frequency of the Frequency of the Processor is Processor is 2MHz2MHz

f = 2 MHzf = 2 MHz

T = 1/fT = 1/f

T = 1/2 MHzT = 1/2 MHz

T = 0.5 T = 0.5 µSec.µSec.

T-States Inside the LoopT-States Inside the Loop

DCR BDCR B -- 4 4

JNZ LOOPJNZ LOOP -- 1010

TotalTotal == 1414

T-States Outside the LoopT-States Outside the Loop

MVI B, FFHMVI B, FFH -- 7 7

HLTHLT -- 5 5

TotalTotal == 1212

Count

FFH = 25510

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Time Delay Inside the LoopTime Delay Inside the Loop

TTLL = T x T States x N = T x T States x N1010

TTLL = 0.5 = 0.5 µSec. x 14 x 255µSec. x 14 x 255

TTL L == 1785 1785 µSec.µSec.

TTL L = 1.785 mSec.= 1.785 mSec.

Total TimeTotal Time TTLALA = = 1.785 mSec. - (10-7) x 0.5 1.785 mSec. - (10-7) x 0.5 µSec.µSec.

TTLALA = 1.785 mSec. - 0.0015 mSec. = 1.785 mSec. - 0.0015 mSec.

TTLALA = = 1.7835 mSec.1.7835 mSec.

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Total Time Delay Total Time Delay

Time to Execute the instruction outside the loop Time to Execute the instruction outside the loop

TTDD = = + +

Time taken to execute the instruction inside the Time taken to execute the instruction inside the looploop

TTDD = T = TOO + T + TLALA

WhereWhere T TO O = T-States Outside the loop = T-States Outside the loop XX Time Time PeriodPeriod

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Total Time Delay Total Time Delay

TTOO = 12 x 0.5 = 12 x 0.5 µSec.µSec.

TTOO = .006 mSec. = .006 mSec.

TTDD = T = TOO + T + TLALA

TTDD = 0.006 mSec + 1.7835 mSec. = 0.006 mSec + 1.7835 mSec.

TTDD = 1.7895 mSec. = 1.7895 mSec.

TTDD ≈ 1.8 mSec. ≈ 1.8 mSec.

Total Time Required to execute the program is Total Time Required to execute the program is 1.8 milli Seconds 1.8 milli Seconds (Approx.)(Approx.)

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Note:Note:

Time Delay can be Varied by Time Delay can be Varied by changing the Count number changing the Count number FFH. FFH.

To Increase the time delay To Increase the time delay more the more the 1.8 mSec. 1.8 mSec. the user should use the the user should use the Additional Instruction or Additional Instruction or Register Pair.Register Pair.

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Time Delay Using Register PairTime Delay Using Register Pair

Program Program

LXI B, FFFFHLXI B, FFFFH -- 10 T-States10 T-States

Loop:Loop: DCX BDCX B -- 6 T-States6 T-States

MOV A, CMOV A, C -- 4 T-States4 T-States

ORA BORA B -- 4 T-States4 T-States

JNZ LoopJNZ Loop-- 10/7 T-States10/7 T-States

HLTHLT -- 5 T-States5 T-States

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Time DelayTime Delay

Let us Assume the Let us Assume the Frequency of the Frequency of the Processor is Processor is 2MHz2MHz

f = 2 MHzf = 2 MHz

T = 1/fT = 1/f

T = 1/2 MHzT = 1/2 MHz

T = 0.5 µSec.T = 0.5 µSec.

T-States Inside the LoopT-States Inside the Loop

DCX BDCX B -- 6 6

MOV A,CMOV A,C -- 4 4

ORA BORA B -- 4 4

JNZ LOOPJNZ LOOP -- 1010

TotalTotal == 2424

T-States Outside the T-States Outside the LoopLoop

LXI B, FFFFHLXI B, FFFFH -- 1010

HLTHLT -- 5 5

TotalTotal == 1515

Count

FFFFH = 6553510

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Time Delay in the Loop Time Delay in the Loop

TTLL = T x T States x N = T x T States x N1010

TTLL = 0.5 = 0.5 µSec. x 24 x 65535µSec. x 24 x 65535

TTL L == 786420 786420 µSec.µSec.

TTL L = 786.42 mSec.= 786.42 mSec.

Total TimeTotal Time TTLALA = = 786.42 mSec. - (10-7) x 0.5 786.42 mSec. - (10-7) x 0.5 µSec.µSec.

TTLALA = 786.42 mSec. - 0.0015 mSec. = 786.42 mSec. - 0.0015 mSec.

TTLALA = = 786.4185 mSec.786.4185 mSec.

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Total Time Delay Total Time Delay

TTOO = 15 x 0.5 = 15 x 0.5 µSec.µSec.

TTOO = .0075 mSec. = .0075 mSec.

TTDD = T = TOO + T + TLALA

TTDD = 0.0075 mSec + = 0.0075 mSec + 786.4185786.4185 mSec. mSec.

TTDD = = 786.426786.426 mSec. mSec.

TTDD ≈ 786.4 mSec. ≈ 786.4 mSec.

Total Time Required to execute the program is Total Time Required to execute the program is 786.4 milli 786.4 milli Seconds (Approx.)Seconds (Approx.)

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Flowchart Flowchart Start

Initialize Loop2

Update

Is the Final Count

End

Initialize Loop1

Update

Is the Final Count

No

No

Yes

Yes

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& MicroprocessorTime Delay Using Loop within a Time Delay Using Loop within a LoopLoop

Program Program

MVI B, FFHMVI B, FFH -- 10 T-States10 T-States

Loop2: Loop2: MVI C, FFHMVI C, FFH -- 10 T-States10 T-States

Loop1:Loop1: DCR CDCR C -- 6 T-States 6 T-StatesJNZ Loop1JNZ Loop1 -- 10/7 T-States10/7 T-States

DCR BDCR B -- 6 T-States 6 T-StatesJNZ Loop2JNZ Loop2 -- 10/7 T-States10/7 T-States

HLTHLT -- 5 T-States 5 T-States

L1 L2

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Time DelayTime Delay

Let us Assume the Let us Assume the Frequency of the Frequency of the Processor is Processor is 2MHz2MHz

f = 2 MHzf = 2 MHz

T = 1/fT = 1/f

T = 1/2 MHzT = 1/2 MHz

T = 0.5 µSec.T = 0.5 µSec.

T-States Inside the T-States Inside the Loop1Loop1

DCR CDCR C -- 4 4

JNZ Loop1JNZ Loop1 -- 1010

TotalTotal == 1414

T-States Inside the T-States Inside the Loop2Loop2

DCR CDCR C -- 4 4

JNZ Loop1JNZ Loop1 -- 7 7

DCR BDCR B -- 4 4

JNZ Loop2JNZ Loop2 -- 1010

TotalTotal == 2121

Count

Loop1 Count = FFH = 25510

Loop2 Count = FFH = 25510

T-States Outside the T-States Outside the LoopsLoops

MVI B, FFHMVI B, FFH -- 7 7

MVI C, FFHMVI C, FFH -- 7 7

HLTHLT -- 5 5

TotalTotal == 1919

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Time Delay in the Loop1Time Delay in the Loop1

TTL1L1 = T x T States x N = T x T States x N1010

TTL1L1 = 0.5 = 0.5 µSec. x 14 x 255µSec. x 14 x 255

TTL1 L1 == 1785 1785 µSec.µSec.

TTL1 L1 = 1.785 mSec.= 1.785 mSec.

Total TimeTotal Time TTLA1LA1 = = 1.785 mSec. - (10-7) x 0.5 1.785 mSec. - (10-7) x 0.5 µSec.µSec.

TTLA1LA1 = 1.785 mSec. - 0.0015 mSec. = 1.785 mSec. - 0.0015 mSec.

TTLA1LA1 = = 1.7835 mSec.1.7835 mSec.

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Time Delay in the Loop2Time Delay in the Loop2

TTL2L2 = (T = (TLA1LA1 + T-States X Time Period) X Count N + T-States X Time Period) X Count N1010

TTL2L2 = (1.7835 mSec. + 21 x 0.5 = (1.7835 mSec. + 21 x 0.5 µSec.) x 255µSec.) x 255

TTL2 L2 == 457470 457470 µSec.µSec.

TTL2 L2 = 457.47 mSec.= 457.47 mSec.

Total TimeTotal Time

TTLA2LA2 = = 457.47 mSec. - (10-7) x 0.5 457.47 mSec. - (10-7) x 0.5 µSec.µSec.

TTLA1LA1 = 457.47 mSec. - 0.0015 mSec. = 457.47 mSec. - 0.0015 mSec.

TTLA1LA1 = = 457.4685 mSec.457.4685 mSec.

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Total Time Delay Total Time Delay

TTOO = 19 x 0.5 = 19 x 0.5 µSec.µSec.

TTOO = .0095 mSec. = .0095 mSec.

TTDD = T = TOO + T + TLA2LA2

TTDD = 0.0095 mSec + = 0.0095 mSec + 457.4685457.4685 mSec. mSec.

TTDD = = 457.478457.478 mSec. mSec.

TTDD ≈ 457.5 mSec. ≈ 457.5 mSec.

Total Time Required to execute the program is Total Time Required to execute the program is 457.5 milli 457.5 milli Seconds (Approx.)Seconds (Approx.)

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Sample ProgramSample Program

Write a program to count continuously in hexadecimal Write a program to count continuously in hexadecimal from FFH to 00H in a system with a clock period of 0.5 from FFH to 00H in a system with a clock period of 0.5 µSec. Use Register D to setup one millisecond delay µSec. Use Register D to setup one millisecond delay between each count and display the count in one of the between each count and display the count in one of the Output PortsOutput Ports

Note:Note:

To Count from FFH the register to be initialized with To Count from FFH the register to be initialized with 0OH0OH Separate Time Delay Loop to be SetSeparate Time Delay Loop to be Set The Count to be Displayed in Output PortThe Count to be Displayed in Output Port

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ProgramProgram

MVI E, 00HMVI E, 00H -- 7 T-states7 T-states

Count:Count: DCR EDCR E -- 4 T-states4 T-states

MVI D, MVI D, Count No.Count No. -- 7 7 T-statesT-states

Delay:Delay: DCR DDCR D -- 4 T-states4 T-states

JNZ JNZ DelayDelay -- 10/7 T-states10/7 T-states

MOV A, BMOV A, B -- 4 T-states4 T-states

OUT OUT PortPort -- 10 T-states10 T-states

JMP CountJMP Count -- 10 T-states10 T-states

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& MicroprocessorTo Calculate Time Delay Count To Calculate Time Delay Count No.No.

T = 0.5 T = 0.5 µSec.µSec.

TTLL = (T-States x T) x Count No. = (T-States x T) x Count No.

TTLL = (14 x 0.5 µSec.) x Count No. = (14 x 0.5 µSec.) x Count No.

TTLL = 0.007 mSec. x Count No. = 0.007 mSec. x Count No.

TTLALA = (0.007 mSec. x Count) - 0.0015 mSec. = (0.007 mSec. x Count) - 0.0015 mSec.

TTOO = 35 x 0.5 µSec. = = 35 x 0.5 µSec. = 0.0175 mSec0.0175 mSec..

TTDD = (0.007 mSec. x Count) - 0.0015 mSec. + 0.0175 mSec. = (0.007 mSec. x Count) - 0.0015 mSec. + 0.0175 mSec.

1 mSec. = (0.007 mSec. x Count) + 1 mSec. = (0.007 mSec. x Count) + 0.016 mSec.0.016 mSec.

1 mSec. – 0.016 mSec.1 mSec. – 0.016 mSec.Count NoCount No. =. = = = 140.571 140.571 ≈ 141≈ 14110 10 ≈ 8CH≈ 8CH

0.007 mSec.0.007 mSec.

Count No. = 8CH, 8CH Count No. = 8CH, 8CH should be loaded into register should be loaded into register D D to set to set 1 1 millisecond millisecond delaydelay

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StackStack Set of Memory Locations in R/W memorySet of Memory Locations in R/W memory

Used to store binary information temporarily during the Used to store binary information temporarily during the execution of a programexecution of a program

Beginning of Stack is defined usingBeginning of Stack is defined using

LXI SP, 16 bit AddressLXI SP, 16 bit Address

Stack pointer is decremented by oneStack pointer is decremented by one

The byte stored to stack with the address specified in Stack The byte stored to stack with the address specified in Stack PointerPointer

The Storage & Retrieval on stack follows LIFO (Last in First Out) The Storage & Retrieval on stack follows LIFO (Last in First Out)

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& MicroprocessorStoring Register Pair Content to Storing Register Pair Content to StackStack Using Inst. Using Inst. PUSHPUSH the contents of a Register Pair can be copied to stack the contents of a Register Pair can be copied to stack

Using Inst. Using Inst. POPPOP the contents from the stack is copied to Register Pair the contents from the stack is copied to Register Pair

OP OP CodCod

ee

OpeOperanrandd

BytesBytes DescriptionDescription

PUSPUSHH

Rp.Rp. 11 Decrement the Decrement the Stack Pointer by Stack Pointer by one the content of one the content of higher order higher order (B, D, (B, D, H, A)H, A) is copied into is copied into stack then the stack then the Stack Pointer is Stack Pointer is again decremented again decremented the lower order the lower order (C, (C, E, L, Flags) E, L, Flags) is is copied into stackcopied into stack

POPPOP Rp.Rp. 11 Copy the content of Copy the content of the stack which is the stack which is pointer by stack pointer by stack pointer to lower pointer to lower order register order register (C, (C, E, L, Flags) E, L, Flags) and and increment the stack increment the stack pointer by one then pointer by one then Copy the content of Copy the content of the stack which is the stack which is pointer by stack pointer by stack pointer to higher pointer to higher order register order register (B, (B, D, H, A)D, H, A)

AES001
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Stack InstructionsStack Instructions

PUSH BPUSH B -- From Rp. From Rp. BC BC to Stackto Stack

PUSH DPUSH D -- From Rp. From Rp. DE DE to Stackto Stack

PUSH HPUSH H -- From Rp. From Rp. HL HL to Stackto Stack

PUSH PSWPUSH PSW -- From From Accumulator & Flags Accumulator & Flags to Stackto Stack

POP BPOP B -- From Stack to Rp. From Stack to Rp. BCBC

POP DPOP D -- From Stack to Rp. From Stack to Rp. DEDE

POP HPOP H -- From Stack to Rp. From Stack to Rp. HLHL

POP PSWPOP PSW -- From Stack to From Stack to Accumulator & FlagsAccumulator & Flags

Note: Note: PSW stands for PSW stands for Program Status WordProgram Status Word

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Example:Example:

Program:Program:

11 LXI SP, 2000HLXI SP, 2000H

22 LXI H, 4253HLXI H, 4253H

33 PUSH HPUSH H

44 NOPNOP

55 POP BPOP B

66 HLTHLT

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& MicroprocessorRegister Contents after Register Contents after executing first 2 Instructionsexecuting first 2 Instructions

XXXX

20002000

53534242

A

B

D

H

SP

Register Contents after Register Contents after executing PUSH Instructionsexecuting PUSH Instructions

XXXX

20002000

53534242

XX

4242

5353

MemoryMemory

A

B

D 1FFE

H 1FFF

SP 2000

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& MicroprocessorRegister Contents after Register Contents after executing POP Instructionsexecuting POP Instructions

53534242

20002000

53534242

XX

4242

5353

MemoryMemory

A Flags

B C

D E

H L

SP

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Program to Clear all Flags , Load 00H in the accumulator Program to Clear all Flags , Load 00H in the accumulator and demonstrate the zero flag is not affected by data and demonstrate the zero flag is not affected by data transfer instruction. Logically OR the accumulator with transfer instruction. Logically OR the accumulator with itself to set the zero flag, and display the flag at Port1 or itself to set the zero flag, and display the flag at Port1 or store all the flags on the stack.store all the flags on the stack.

LXI SP, 2000HLXI SP, 2000H -- Initialize Stack PointerInitialize Stack Pointer

MVI L, 00HMVI L, 00H

PUSH HPUSH H To Clear FlagsTo Clear Flags

POP PSWPOP PSW

MVI A, 00HMVI A, 00H -- Loading Accumulator with 00HLoading Accumulator with 00H

A Data Transfer InstructionA Data Transfer Instruction

PUSH PSWPUSH PSW

Getting Flag content to Reg. LGetting Flag content to Reg. L

POP HPOP H

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MOV A, LMOV A, LDisplay FlagsDisplay Flags

OUT Port1OUT Port1

ORA AORA A -- Reset CY & ACReset CY & AC

PUSH PSWPUSH PSW Getting Flag content to Reg. LGetting Flag content to Reg. L

POP HPOP H

MOV A, LMOV A, L

ANI 40HANI 40H Masking all flags except Z & DisplayMasking all flags except Z & Display

OUT Port1OUT Port1

HLTHLT -- End of the ProgramEnd of the Program

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SubroutineSubroutine It is group of Instructions written separately from the main program to perform a It is group of Instructions written separately from the main program to perform a

function no. of times in the main program.function no. of times in the main program. If a Time Delay is required for no. of times in a main program, to avoid repetition If a Time Delay is required for no. of times in a main program, to avoid repetition

of same delay instruction, Subroutine is usedof same delay instruction, Subroutine is used

InstructionInstruction

OP OP CodeCode

OperOperandand

BytesBytes DescriptionDescription

CALLCALL 16 16 bit bit addraddressess

33 The Program The Program Sequence is Sequence is transferred to the transferred to the specified 16 bit specified 16 bit address address

RETRET NoneNone 11 The Program The Program Sequence is Sequence is transferred from transferred from subroutine to subroutine to calling program.calling program.

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CALL & RETCALL & RET

Call Inst.Call Inst.• Saves the contents of Program Counter on the stackSaves the contents of Program Counter on the stack• Jumps unconditionally to the memory location Jumps unconditionally to the memory location

specified by 16 bit address (Note: Conditional Call specified by 16 bit address (Note: Conditional Call Statements are also there)Statements are also there)

RET inst.RET inst.• Copies the content in the top two location of the Copies the content in the top two location of the

stackstack• Unconditional Return from Subroutine (Note: Unconditional Return from Subroutine (Note:

Conditional Return Statements are also there)Conditional Return Statements are also there)

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ExampleExample

Mem. Mem. Add.Add.

InstrucInstructiontion

DescriptionDescription

20002000HH

LXI SP, LXI SP, 4000H4000H

Initialize the stack pointer Initialize the stack pointer with 2400Hwith 2400H

20042004HH

CALL CALL 3000H3000H

Calling the subroutine at Calling the subroutine at 3000H3000H

20072007HH

Inst. Inst. Other InstructionsOther Instructions

20082008HH

HLTHLT End of Main ProgramEnd of Main Program

30003000HH

Inst.Inst. Instructions of SubroutineInstructions of Subroutine

30013001HH

Inst.Inst. Instructions of SubroutineInstructions of Subroutine

30023002HH

RETRET End of SubroutineEnd of Subroutine

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Flow of SubroutineFlow of Subroutine

Main ProgramMain Program2000H2000H SubroutineSubroutine

……

2004H2004H 3000H 3000H StartStart

2005H2005H 3001H 3001H

2006H2006H 3002H 3002H EndEnd

…… … …

…… … …

……

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& MicroprocessorData Transfer During CALL Data Transfer During CALL InstructionInstruction

Mem. Mem. Add.Add.

Code Code (H)(H)

20042004HH

CDCD

20052005HH

0000

20062006HH

3030

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& MicroprocessorPC, Stack & SP during CALL PC, Stack & SP during CALL Inst.Inst.

20200404

20200505

20200606

20200707

0077

2200

XXXX

CALL 40400000

3F3FFFFF

3F3FFEFE

Program Counter

Stack Pointer Register

3FFE

3FFF

4000

STACK

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& MicroprocessorData Transfer During CALL Data Transfer During CALL InstructionInstruction

MachiMachine ne

CycleCycless

Stack Stack PointPoint

erer

3FFE3FFE

AddrAddress ess BusBus

(AB)(AB)

ProgrProgram am

CountCounterer

Data Data BusBus

(DB)(DB)

InterInternal nal

RegisRegistersters

(W) (W) (Z)(Z)

MM11

OpcodOpcode e

FetchFetch

3FFE3FFE 30023002 30033003 C9C9

OpcodOpcodee

--

MM22

OpcodOpcode e

FetchFetch

3FFF3FFF 3FFE3FFE 0707

(Stack(Stack))

0707

MM33

OpcodOpcode e

FetchFetch

40004000 3FFF3FFF 2020

(Stack (Stack – I)– I)

2020

MM11

OpcodOpcode e

FetchFetch

20072007

(W) (W) (Z)(Z)

20 0720 07

(W) (W) (Z)(Z)

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Traffic Signal ControllerTraffic Signal ControllerProgram to provide given on/off timer to three traffic lights Program to provide given on/off timer to three traffic lights (Green, Yellow, and Red) and two pedestrian signs (WALK (Green, Yellow, and Red) and two pedestrian signs (WALK and DON’T WALK). The signal lights and signs are turned and DON’T WALK). The signal lights and signs are turned on/off by the data bits of an output port as shown below:on/off by the data bits of an output port as shown below:

Lights Lights Data Bits Data Bits On TimeOn Time

1. Green1. Green D0D0 15 seconds15 seconds

2. Yellow2. Yellow D2D2 5 seconds 5 seconds

3. Red3. Red D4D4 20 seconds20 seconds

4. WALK4. WALK D6D6 15 seconds15 seconds

5. DON’T WALK5. DON’T WALK D7D7 25 seconds25 seconds

The traffic and pedestrian flow are in the same direction; the The traffic and pedestrian flow are in the same direction; the pedestrian should cross the road when the Green light is on. pedestrian should cross the road when the Green light is on.

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The problem is primarily concerned with providing various time delays for a complete sequence of 40 seconds.

The on/off times for the traffic signals and pedestrian signs are as follows:

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The Green light and the WALK sign can be turned The Green light and the WALK sign can be turned on by sending data byte 41H to the output port. on by sending data byte 41H to the output port.

The 15-second delay can be provided by using a The 15-second delay can be provided by using a 1-second subroutine and a counter with a count 1-second subroutine and a counter with a count of 1510. of 1510.

Similarly, the next two bytes, 84H and 90H, will Similarly, the next two bytes, 84H and 90H, will turn on/off the appropriate lights/signs as shown turn on/off the appropriate lights/signs as shown in the flowchart. in the flowchart.

The necessary time delays are provided by The necessary time delays are provided by changing the values of the count in the counter. changing the values of the count in the counter.

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& MicroprocessorMain ProgramMain ProgramLXI SP, XX99 LXI SP, XX99 -- Initialize Stack Pointer with XX99HInitialize Stack Pointer with XX99H

START:START: MVI A, 41H MVI A, 41H -- Loading Accumulator with Pattern for Loading Accumulator with Pattern for Green & WalkGreen & Walk

OUT OUT PORT1PORT1 -- Turn on corresponding lightsTurn on corresponding lights

MVI B, 0FH MVI B, 0FH -- Reg. B is used to count 15 secondsReg. B is used to count 15 seconds

CALL CALL DELAY DELAY -- Call subroutine of one second delayCall subroutine of one second delay

MVI A, 90HMVI A, 90H -- Loading Accumulator with Pattern Loading Accumulator with Pattern

OUT OUT PORT1PORT1 -- Turn on corresponding lightsTurn on corresponding lights

MVI B, 05 MVI B, 05 -- Reg. B is used to count 5 secondsReg. B is used to count 5 seconds

CALL CALL DELAYDELAY -- Call subroutine of one second delayCall subroutine of one second delay

MVI A, 90H MVI A, 90H -- Loading Accumulator with PatternLoading Accumulator with Pattern

OUT OUT PORT1PORT1 - - Turn on corresponding lightsTurn on corresponding lights

MVI B, 14HMVI B, 14H -- Reg. B is used to count 20 secondsReg. B is used to count 20 seconds

CALL CALL DELAYDELAY - - Call subroutine of one second delayCall subroutine of one second delay

JMP JMP START START -- Go to START to repeat the SequenceGo to START to repeat the Sequence

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& MicroprocessorSubroutineSubroutineDelay:Delay: PUSH DPUSH D Save the contents of DE & AccumulatorSave the contents of DE & Accumulator

PUSH PSWPUSH PSW

Sec:Sec: LXI D, LXI D, COUNT No.COUNT No. -- Load Rp. DE with Count No.Load Rp. DE with Count No.

Loop:Loop: DCX DDCX D -- Decrement Rp. DE by oneDecrement Rp. DE by one

MOV A, DMOV A, D Check Rp. DE is ZeroCheck Rp. DE is Zero

ORA EORA E

JNZ JNZ LoopLoop -- Jump to Loop if Zero Flag is not SetJump to Loop if Zero Flag is not Set

DCR BDCR B -- Decrement Reg. BDecrement Reg. B

JNZ JNZ SecSec -- Jump to Sec if Zero Flag is not SetJump to Sec if Zero Flag is not Set

POP PSWPOP PSW

POP DPOP D Retrieve contents of saved RegistersRetrieve contents of saved Registers

RETRET -- Returning to Main ProgramReturning to Main Program

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BCD – Binary Coded DecimalBCD – Binary Coded Decimal

868610 10 = (8 x 10) + 2= (8 x 10) + 2

Converting a 2-digit BCD number into its binary Converting a 2-digit BCD number into its binary equivalent requires the following steps:equivalent requires the following steps:

• Separate an 8-bit packed BCD number into two 4-bit Separate an 8-bit packed BCD number into two 4-bit unpacked BCD digits: BCD1 and BCD2.unpacked BCD digits: BCD1 and BCD2.

• Convert each digit into its binary value according to its Convert each digit into its binary value according to its position.position.

• Add both binary numbers to obtain the binary equivalent of Add both binary numbers to obtain the binary equivalent of the BCD number.the BCD number.

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ExampleExample

Convert (86)BCD into its binary equivalent Convert (86)BCD into its binary equivalent

Solution:Solution: 86861010 = 1000 0110 BCD = 1000 0110 BCD

0111 0010 0111 0010 • 00000110 Unpacked BCD100000110 Unpacked BCD1• 00001000 Unpacked BCD200001000 Unpacked BCD2

Multiply BCD2 by 10 (8 x 10)Multiply BCD2 by 10 (8 x 10)

Add BCD1 to the answer in Step 2.Add BCD1 to the answer in Step 2.

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2 Digit BCD to Binary 2 Digit BCD to Binary ConversionConversion

A BCD number between 0 and 99 is stored in a R/W memory A BCD number between 0 and 99 is stored in a R/W memory location called the Input Buffer. Write a main program and a location called the Input Buffer. Write a main program and a conversion subroutine (BCDBIN) to convert the BCD number into conversion subroutine (BCDBIN) to convert the BCD number into its equivalent binary number. Store the result in a memory its equivalent binary number. Store the result in a memory location defined as the Output Buffer.location defined as the Output Buffer.

LXI SP, LXI SP, “STACK”“STACK” -- Initialize stackInitialize stack

LXI H, LXI H, “INBUF”“INBUF” -- Initialize Input LocationInitialize Input Location

LXI B, LXI B, “OUTBUF”“OUTBUF” -- Initialize Output LocationInitialize Output Location

MOV A, M MOV A, M -- Input of BCD No.Input of BCD No.

CALL CALL BCDBINBCDBIN -- Calling SubroutineCalling Subroutine

STAX B STAX B -- Storing Binary No. to Output Buf.Storing Binary No. to Output Buf.

HLT HLT -- End of the ProgramEnd of the Program

Main ProgramMain Program

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& MicroprocessorSubroutineSubroutineBCDBIN; BCD to BinaryBCDBIN; BCD to Binary

; I/P: packed BCD in Acc.; I/P: packed BCD in Acc.

; O/P: Binary in Acc.; O/P: Binary in Acc.

PUSH BPUSH B -- Save Rp. Save Rp.

MOV B, AMOV B, A -- Copies Acc. Contents to Reg. BCopies Acc. Contents to Reg. B

ANI 0FHANI 0FH -- ANDing (A) with 0FH to mask MSBANDing (A) with 0FH to mask MSB

MOV C, AMOV C, A -- Copies Acc. Contents to Reg. CCopies Acc. Contents to Reg. C

MOV A, BMOV A, B -- Copies Reg. B contents to Acc.Copies Reg. B contents to Acc.

ANI F0HANI F0H -- ANDing (A) with F0H to mask LSBANDing (A) with F0H to mask LSB

RRCRRC

RRCRRC Making MSB as LSBMaking MSB as LSB

RRCRRC

RRCRRC

MOV D, AMOV D, A -- Copies Acc. Contents to Reg. DCopies Acc. Contents to Reg. D

XRA AXRA A -- Clearing Acc. & FlagsClearing Acc. & Flags Cont.

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MVI E, 0AHMVI E, 0AH -- Load Reg. E with 0AH = 10Load Reg. E with 0AH = 101010

Sum:Sum: ADD EADD E -- Add (E) to (A)Add (E) to (A)

DCR DDCR D -- Decrement (D) by oneDecrement (D) by one

JNZ JNZ SumSum -- Jump to location Sum in Zero flag is resetJump to location Sum in Zero flag is reset

ADD CADD C -- Add (C) to (A)Add (C) to (A)

POP BPOP B -- Retrieve (BC)Retrieve (BC)

RETRET -- Returning to Main ProgramReturning to Main Program

Cont.

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& MicroprocessorBinary to BCDBinary to BCDA binary number is stored in memory location BINBYT. Convert the A binary number is stored in memory location BINBYT. Convert the number into BCD, and store each BCD as unpacked BCD digits in the number into BCD, and store each BCD as unpacked BCD digits in the Output Buffer. To perform this task, write a main program and two Output Buffer. To perform this task, write a main program and two subroutines: one to supply the powers of ten, and the other to subroutines: one to supply the powers of ten, and the other to perform the conversion. perform the conversion.

Main ProgramMain Program

STARTSTART:LXI SP, STACK:LXI SP, STACK -- Initialize stack pointerInitialize stack pointer

LXI H, BINBYTLXI H, BINBYT -- Point HL index where binary number is Point HL index where binary number is storedstored

MOV A, MMOV A, M -- Transfer byteTransfer byte

CALL CALL PWRTENPWRTEN -- Call subroutine to load powers of 10Call subroutine to load powers of 10

HLTHLT -- End of the ProgramEnd of the Program

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& MicroprocessorSubroutine PWRTENSubroutine PWRTENPWRTENPWRTEN; Loads the powers of 10 in register B and calls the ; Loads the powers of 10 in register B and calls the

binary to BCDbinary to BCD

;I/P: Binary number in the accumulator;I/P: Binary number in the accumulator

;O/P: Powers of ten and store BCD;O/P: Powers of ten and store BCD11 in the first Output- in the first Output-BufferBuffer

;Calls BINBCD routine and modifies register B;Calls BINBCD routine and modifies register B

::LXI H, LXI H, OUTBUFOUTBUF - - Point HL index to Output-Buffer Point HL index to Output-Buffer memorymemory

MVI B, 64HMVI B, 64H - - Load 100 in register BLoad 100 in register B

CALL CALL BINBCDBINBCD - - Call conversionCall conversion

MVI B, 0AHMVI B, 0AH - - Load 10 in register BLoad 10 in register B

CALL CALL BINBCDBINBCD - - Calls BINBCD subroutineCalls BINBCD subroutine

MOV M, AMOV M, A - - Store BCDStore BCD11

RETRET - - Returning to Main ProgramReturning to Main Program

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& MicroprocessorSubroutine BINBCDSubroutine BINBCDBINBCDBINBCD ;Converts a binary number into BCD and stores BCD2 ;Converts a binary number into BCD and stores BCD2

and and

;BCD3 in the Out put Buffer.;BCD3 in the Out put Buffer.

;I/P: Binary number in accumulator and powers of 10 in B;I/P: Binary number in accumulator and powers of 10 in B

;O/P: BCD2 and BCD3 in Output Buffer;O/P: BCD2 and BCD3 in Output Buffer

;Modifies accumulator contents;Modifies accumulator contents

:MVI M, FFH -:MVI M, FFH - Load buffer with (0 -1)Load buffer with (0 -1)

NB:NB: INR MINR M - - Clear buffer and increment for each Clear buffer and increment for each subtractionsubtraction SUB BSUB B - - Subtract power of 10 from Subtract power of 10 from binary numberbinary number

JNC JNC NBNB - - Is number > power of 10? If yes, add 1 Is number > power of 10? If yes, add 1 to bufferto buffer

ADD BADD B - - If no, add power of 10 to get remainderIf no, add power of 10 to get remainder

INX HINX H - - Go to next buffer locationGo to next buffer location

RETRET - - Returning to Subroutine PWRTENReturning to Subroutine PWRTEN

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& MicroprocessorBCD to 7 Segment DisplayBCD to 7 Segment DisplayWrite a main program and two subroutines, called UNPAK and Write a main program and two subroutines, called UNPAK and LEDCOD, to unpack the BCD numbers and select an appropriate LEDCOD, to unpack the BCD numbers and select an appropriate seven-segment code for each digit. The codes should be stored in seven-segment code for each digit. The codes should be stored in the Output-Buffer memory. the Output-Buffer memory.

Main ProgramMain Program

LXI SP, STACKLXI SP, STACK -- Initialize stack pointerInitialize stack pointer

LXI H, XX50HLXI H, XX50H -- Point HL index where BCD digits are storedPoint HL index where BCD digits are stored

MVI D, 03HMVI D, 03H -- Number of digits to be converted is placed in DNumber of digits to be converted is placed in D

CALL CALL UNPAKUNPAK-- Call subroutine to unpack BCD numbersCall subroutine to unpack BCD numbers

HLTHLT -- End of ProgramEnd of Program

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& MicroprocessorSubroutine UNPACKSubroutine UNPACKUNPAK;UNPAK;This subroutine unpacks the BCD number into two single This subroutine unpacks the BCD number into two single

digits.digits.

;I/P: Starting memory address of the packed BCD numbers in HL ;I/P: Starting memory address of the packed BCD numbers in HL ;registers: Number of BCDs to be converted in register D;registers: Number of BCDs to be converted in register D

;O/P: Unpacked BCD into acc. and Output Buffer address in BC;O/P: Unpacked BCD into acc. and Output Buffer address in BC

;Calls subroutine LEDCOD;Calls subroutine LEDCOD

LXI B, BUFFERLXI B, BUFFER -- Point BC index to the buffer memoryPoint BC index to the buffer memory

NBCDNBCD:: MOV A, MMOV A, M -- Get packed BCD numberGet packed BCD number

ANI F0HANI F0H -- Masked BCD1Masked BCD1

RRCRRC Rotate four times to place BCD2 asRotate four times to place BCD2 as

RRCRRC unpacked single digit BCDunpacked single digit BCD

RRCRRC

RRCRRC

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& MicroprocessorSubroutine UNPACKSubroutine UNPACK

CALL LEDCODCALL LEDCOD -- Find seven-segment codeFind seven-segment code

INX BINX B -- Point to next buffer locationPoint to next buffer location

MOV A, MMOV A, M -- Get BCD number againGet BCD number again

ANI 0FHANI 0FH -- Separate BCD1Separate BCD1

CALL LEDCODCALL LEDCOD --

INX BINX B --

INX HINX H -- Point to next BCDPoint to next BCD

DCR DDCR D -- Conversion complete, reduce BCD Conversion complete, reduce BCD countcount

JNZ JNZ NBCDNBCD -- If all BCDs are not yet converted, If all BCDs are not yet converted, go back go back

to convert nextto convert next

RETRET -- Return to Main ProgramReturn to Main Program

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& MicroprocessorSubroutine LEDCODSubroutine LEDCOD

LEDCODLEDCOD;This subroutine converts an unpacked BCD into its ;This subroutine converts an unpacked BCD into its seven-segment seven-segment

; LED code; LED code

;I/P: An unpacked BCD in accumulator ;I/P: An unpacked BCD in accumulator

;Memory address of the buffer in BC register;Memory address of the buffer in BC register

;O/P: Stores seven-segment code in the output buffer;O/P: Stores seven-segment code in the output buffer

: PUSH H : PUSH H -- Save HL contents of the callerSave HL contents of the caller

LXI H, CODELXI H, CODE -- Point index to beginning of 7-segment codePoint index to beginning of 7-segment code

ADD LADD L -- Add BCD digit to starting address of codeAdd BCD digit to starting address of code

MOV L, AMOV L, A -- Point HL to appropriate codePoint HL to appropriate code

MOV A, MMOV A, M -- Get seven-segment codeGet seven-segment code

STAX BSTAX B -- Store code in bufferStore code in buffer

POP HPOP H -- Retrieve (HL) Rp.Retrieve (HL) Rp.

RETRET -- Return to Subroutine UNPACKReturn to Subroutine UNPACK

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& MicroprocessorBinary to ASCIIBinary to ASCIIWrite a program to Transfer the byte to the accumulator, Separate Write a program to Transfer the byte to the accumulator, Separate the two nibbles (as 09 and 0F). Call the subroutine to convert each the two nibbles (as 09 and 0F). Call the subroutine to convert each nibble into ASCII Hex code and Store the codes in memory nibble into ASCII Hex code and Store the codes in memory locations XX60H AND XX61H. Write a subroutine to convert a locations XX60H AND XX61H. Write a subroutine to convert a binary digit (0 to F) into ASCII Hex code.. An 8-bit binary number binary digit (0 to F) into ASCII Hex code.. An 8-bit binary number (e.g., 9FH) is stored in memory location XX50H.(e.g., 9FH) is stored in memory location XX50H.

Main ProgramMain ProgramLXI SP, STACKLXI SP, STACK -- Initialize stack pointerInitialize stack pointer

LXI H, XX50HLXI H, XX50H-- Point index where binary number is storedPoint index where binary number is stored

LXI D, XX60HLXI D, XX60H-- Point index where ASCII code is to be storedPoint index where ASCII code is to be stored

MOV A, MMOV A, M -- Transfer byteTransfer byte

MOV B, AMOV B, A -- Save byteSave byte

RRCRRC Shift high-order nibble to the position of low-Shift high-order nibble to the position of low-

RRC RRC order nibbleorder nibble

RRCRRC

RRCRRC

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& MicroprocessorBinary to ASCIIBinary to ASCIIMain Program – Cont.Main Program – Cont.

CALL ASCIICALL ASCII -- Call conversion routineCall conversion routine

STAX DSTAX D -- Store first ASCII Hex in Store first ASCII Hex in XX60HXX60H

INX DINX D -- point to next memory point to next memory location, get ready to location, get ready to

store next bytestore next byte

MOV A, BMOV A, B -- Get number again for Get number again for second digitsecond digit

CALL ASCIICALL ASCII

STAX DSTAX D

HLTHLT

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& MicroprocessorBinary to ASCIIBinary to ASCIISubroutine – ASCIISubroutine – ASCII

ASCIIASCII ; Converts a binary digit between 0 and F to ; Converts a binary digit between 0 and F to ASCII Hex codeASCII Hex code

;Input: Single binary number 0 to F in the ;Input: Single binary number 0 to F in the accumulatoraccumulator

;Output: ASCII Hex code in the accumulator;Output: ASCII Hex code in the accumulator

:ANI 0FH:ANI 0FH -- Mask high-order nibbleMask high-order nibble

CIP 0AHCIP 0AH -- Is digit less than 1010?Is digit less than 1010?

JC JC CODECODE -- If digit is less than 1010, go to CODE If digit is less than 1010, go to CODE to add to add 30H30H

ADI 07HADI 07H -- Add 7H to obtain code for digits from Add 7H to obtain code for digits from A to FA to F

CODE:CODE: ADI 30HADI 30H -- Add base number 30HAdd base number 30H

RET RET -- Return to Main ProgramReturn to Main Program

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& MicroprocessorASCII to BinaryASCII to BinaryWrite a subroutine to convert an ASCII Hex number into its Write a subroutine to convert an ASCII Hex number into its binary equivalent. A calling program places the ASCII number binary equivalent. A calling program places the ASCII number in the accumulator, and the subroutine should pass the in the accumulator, and the subroutine should pass the conversion back to the accumulator.conversion back to the accumulator.

SubroutineSubroutine

ASCBINASCBIN;This subroutine converts an ASCII Hex number into its ;This subroutine converts an ASCII Hex number into its binarybinary

;Input: ASCII Hex number in the accumulator;Input: ASCII Hex number in the accumulator

;Output: Binary equivalent in the accumulator;Output: Binary equivalent in the accumulator

:SUI 30H:SUI 30H -- Subtract 0 bias from the numberSubtract 0 bias from the number

CPI 0AHCPI 0AH -- Check whether number is between 0 and 9Check whether number is between 0 and 9

RCRC -- If yes, return to main programIf yes, return to main program

SUI 07HSUI 07H -- If not, sub. 7 to find number between A If not, sub. 7 to find number between A & F& F

RETRET -- Return to Main ProgramReturn to Main Program

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& MicroprocessorBCD MultiplicationBCD MultiplicationA multiplicand is stored in memory location XX50H and a A multiplicand is stored in memory location XX50H and a multiplier is stored in location XX51H. Write a main program multiplier is stored in location XX51H. Write a main program to transfer the two numbers from memory locations to the HL to transfer the two numbers from memory locations to the HL registers and store the product in the Output Buffer at XX90H. registers and store the product in the Output Buffer at XX90H. Write a subroutine to Multiply two unsigned numbers placed in Write a subroutine to Multiply two unsigned numbers placed in registers H and L and Return the result into the HL pair.registers H and L and Return the result into the HL pair.

Main ProgramMain Program

LXI SP, STACKLXI SP, STACK

LHLD XX50HLHLD XX50H-- Place contents of XX50 in L register and Place contents of XX50 in L register and

contents of XX51 in H registercontents of XX51 in H register

XCHGXCHG -- Place multiplier in D and multiplicand in Place multiplier in D and multiplicand in EE

CALL MLTPLYCALL MLTPLY -- Multiply the two numbersMultiply the two numbers

SHLD XX90HSHLD XX90H -- Store the product in locations XX90 and Store the product in locations XX90 and 91H91H

HLTHLT -- End of the ProgramEnd of the Program

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& MicroprocessorBCD MultiplicationBCD MultiplicationSubroutine - MLTPLYSubroutine - MLTPLY

MLTPLY:MOV A, DMLTPLY:MOV A, D -- Transfer multiplier to accumulatorTransfer multiplier to accumulator

MVI D, 00HMVI D, 00H -- Clear D to use in DAD instructionClear D to use in DAD instruction

LXI H, 0000HLXI H, 0000H -- Clear HLClear HL

MVI B, 08HMVI B, 08H -- Set up register B to count eight rotationsSet up register B to count eight rotations

NXTBIT:RARNXTBIT:RAR -- Check if multiplier bit is 1Check if multiplier bit is 1

JNC NOADDJNC NOADD -- If not, skip adding multiplicandIf not, skip adding multiplicand

DAD DDAD D -- If multiplier is 1, add multiplicand to HL If multiplier is 1, add multiplicand to HL and and place partial result in HLplace partial result in HL

NOADD:XCHGNOADD:XCHG -- Place multiplicand in HLPlace multiplicand in HL

DAD HDAD H -- And shift leftAnd shift left

XCHGXCHG -- Retrieve shifted multiplicationRetrieve shifted multiplication

DCR BDCR B -- One operation is complete, decrement One operation is complete, decrement countercounter

JNZ NXTBITJNZ NXTBIT -- Go back to next bitGo back to next bit

RETRET -- Return To Main ProgramReturn To Main Program

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Interfacing Peripherals Interfacing Peripherals

Primary Function of MPU is to accept and send data Primary Function of MPU is to accept and send data from I/P & to O/P Devicesfrom I/P & to O/P Devices

These I/O & O/P Devices are called peripherals or I/OsThese I/O & O/P Devices are called peripherals or I/Os

Interfacing is to enable the MPU to communicate with Interfacing is to enable the MPU to communicate with the peripherals.the peripherals.

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Classification of InterfacingClassification of Interfacing CommunicationCommunication

• Synchronous Synchronous – Both transmitter & Receiver aer – Both transmitter & Receiver aer synchronized by same clock pulsesynchronized by same clock pulse

• Asynchronous Asynchronous – Both of Irregular Intervals– Both of Irregular Intervals

Transfer of DataTransfer of Data• Parallel – Parallel – Entire word is transmitted at a timeEntire word is transmitted at a time• Serial – Serial – One bit at a time over single lineOne bit at a time over single line

I/O TypesI/O Types• Peripheral I/O – Peripheral I/O – Identified with 8 bit addressIdentified with 8 bit address• Memory mapped I/O – Memory mapped I/O – Identified with 16 bit addressIdentified with 16 bit address

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InterruptInterrupt A computer input that temporarily suspends the normal A computer input that temporarily suspends the normal

sequence of operations and transfer control to a special sequence of operations and transfer control to a special routine.routine.

Interrupt Process is controlled by Interrupt Enable flip-Interrupt Process is controlled by Interrupt Enable flip-flop, which can be set or reset by using software flop, which can be set or reset by using software Instruction.Instruction.

INTR (pin 10) goes high the Microprocessor is interrupted, INTR (pin 10) goes high the Microprocessor is interrupted, which is maskable & can be disabledwhich is maskable & can be disabled

Microprocessor also has additional vectored interrupt Microprocessor also has additional vectored interrupt signals.signals.

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Vectored InterruptVectored Interrupt

MaskableMaskable• RST 7.5RST 7.5 -- 003CH003CH• RST 6.5RST 6.5 -- 0034H0034H• RST 5.5RST 5.5 -- 002CH002CH

Non-maskableNon-maskable• TRAPTRAP -- 0024H0024H

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& MicroprocessorInterrupt InstructionInterrupt Instruction

OP OP CodeCode

OperOperandand

BytByteses

DescriptionDescription

EIEI NoneNone 11 The Interrupt Enable flip-The Interrupt Enable flip-flop is set and all the flop is set and all the interrupts are enabledinterrupts are enabled

DIDI NoneNone 11 The Interrupt Enable flip-The Interrupt Enable flip-flop is reset and all the flop is reset and all the interrupts except TRAP interrupts except TRAP are disabledare disabled

MneMnemonimoni

cscs

Hex Hex CodCod

ee

Call Call LocatiLocati

onon

RST RST 00

C7C7 00000000HH

RST RST 11

CFCF 00080008HH

RST RST 22

D7D7 00100010HH

RST RST 33

DFDF 00180018HH

RST RST 44

E7E7 00200020HH

RST RST 55

EFEF 00280028HH

RST RST 66

F7F7 00300030HH

RST RST 77

FFFF 00380038HH

RST InstructionRST Instruction

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& MicroprocessorReal Time Example to InterruptReal Time Example to Interrupt Interrupt Process is to compare it to a telephone line with a Interrupt Process is to compare it to a telephone line with a

blinking light instead of ring when you are reading a book.blinking light instead of ring when you are reading a book.

SteStep p 1:1:

The Telephone The Telephone System should be System should be enabled enabled

The interrupt The interrupt process should be process should be enabled by writing enabled by writing the instruction EI the instruction EI

SteStep p 2:2:

Have glance at the Have glance at the light at certain light at certain intervals to check intervals to check whether someone whether someone is calling is calling

When the When the microprocessor is microprocessor is executing a executing a program, it checks program, it checks the INTR line the INTR line during the during the execution of each execution of each instruction. instruction.

SteStep p 3:3:

If you see a If you see a blinking light, you blinking light, you should pick up the should pick up the receiver, say hello, receiver, say hello, and wait for a and wait for a response. Once response. Once you pick up the you pick up the phone, the line is phone, the line is busy, and no more busy, and no more calls can be calls can be received until you received until you replace the replace the receiver. receiver.

If the line INTR is If the line INTR is high and the high and the interrupt is interrupt is enabled, the enabled, the microprocessor microprocessor completes the completes the current current instruction, instruction, disables the disables the Interrupt Enable Interrupt Enable flip-flop and sends flip-flop and sends a signal called a signal called INTA – Interrupt INTA – Interrupt Acknowledge Acknowledge (active low). The (active low). The processor cannot processor cannot accept any accept any interrupt requests interrupt requests until the interrupt until the interrupt flip-flop is enabled flip-flop is enabled again. again.

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SteStep p 4:4:

Assuming that the Assuming that the caller is you caller is you roommate, the roommate, the request may be: It request may be: It is going to rain is going to rain today. Will you today. Will you please shut all the please shut all the windows in my windows in my room? room?

The signal INTA is The signal INTA is used to insert an used to insert an instruction, instruction, preferably, a preferably, a restart (RST) restart (RST) instruction, instruction, through additional through additional hardware. The RST hardware. The RST instruction is a 1-instruction is a 1-byte call byte call instruction that instruction that transfers the transfers the program control to program control to a specific memory a specific memory location on page location on page 00H and restarts 00H and restarts the execution at the execution at that memory that memory location after location after executing Next executing Next StepStep

SteStep p 5:5:

You insert a You insert a bookmark on the bookmark on the page you are page you are reading reading

It saves the It saves the memory address of memory address of the next the next instruction on the instruction on the stack and the stack and the program is program is transferred to the transferred to the CALL location. CALL location.

SteStep p 6:6:

You replace the You replace the receiver on the receiver on the hook hook

Assuming that the Assuming that the task to be task to be performed is performed is written as a written as a subroutine at the subroutine at the specified location, specified location, the processor the processor performs the task. performs the task. This subroutine is This subroutine is known as a service known as a service routine routine

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& Microprocessor

SteStep p 7:7:

You shut your You shut your roommate’s roommate’s windows windows

The service routine The service routine should include the should include the instruction EI to instruction EI to enable the enable the interrupt again. interrupt again. This is similar to This is similar to putting the putting the receiver back on receiver back on the hook the hook

SteStep p 8:8:

You go back your You go back your book, find your book, find your mark, and start mark, and start reading again reading again

At the end of the At the end of the subroutine, the subroutine, the RET instruction RET instruction retrieves the retrieves the memory address memory address where the program where the program was interrupted was interrupted and continues the and continues the execution. execution.

To implement Step 4 in the interrupt process, insert one of RST instructions in the microprocessor by using external hardware and the signal INTA (Interrupt Acknowledge)

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& Microprocessor

Buffer to enable RST 5Buffer to enable RST 5

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& Microprocessor8085 Interrupt & Vector 8085 Interrupt & Vector LocationsLocations

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& Microprocessor

Instruction to Read & Write Instruction to Read & Write InterruptsInterrupts

OP OP CodeCode

OperOperandand

BytByteses

DescriptionDescription

SIMSIM NoneNone 11 Multipurpose Instruction Multipurpose Instruction and used to implement and used to implement the 8085 interrupts and the 8085 interrupts and Serial Data OutputSerial Data Output

RIMRIM NoneNone 11 Multipurpose Instruction Multipurpose Instruction and used to read the and used to read the 8085 interrupts and 8085 interrupts and Serial Data InputSerial Data Input

DD77 DD66 DD55 DD44 DD33 DD22 DD11 DD00

SOSODD

SDSDEE

XXXXXX

R7R7.5.5

MMSESE

MM7.7.55

MM6.6.55

MM5.5.55

SIM Data Bytes

Serial Output data

Serial Data Enable1 = Enable0 = Disable

Don’tCare

Reset RST 7.5If D4 = 1

Mask Set EnableD3 = 1 Mask Interrupts

If bits = 1

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DD77 DD66 DD55 DD44 DD33 DD22 DD11 DD00

SISIDD

I 7I 7 I I 66

I 5I 5 IEIE 7.7.55

6.6.55

5.5.55

RIM Data Bytes

Serial Input Data

Pending Interrupts1 = Pending

Interrupt Enable 1 = Enable

Interrupt Masks1 = Masked

Instruction Set to enable all the interrupts of 8085

EI ;Enable InterruptsMVI A, 08H ;Load bit pattern to enable RST 7.5, 6.5 and 5.5SIM ;Enable RST 7.5, 6.5 and 5.5

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& MicroprocessorAssuming the microprocessor is completing an RST 7.5 Assuming the microprocessor is completing an RST 7.5 interrupt request, check to see if RST 6.5 is pending. If interrupt request, check to see if RST 6.5 is pending. If it is pending, enable RST 6.5 without affecting any it is pending, enable RST 6.5 without affecting any other interrupts; otherwise, return to the main other interrupts; otherwise, return to the main program. program.

RIMRIM ;Read interrupt mask.;Read interrupt mask.MOV B,AMOV B,A ;Save mask information;Save mask informationANI 20HANI 20H ;Check whether RST 6.5 is pending;Check whether RST 6.5 is pendingJNZ NEXTJNZ NEXTEIEIRETRET ;RST 6.5 is not pending, return to main program.;RST 6.5 is not pending, return to main program.

NEXT:NEXT: MOV A, BMOV A, B ;Get bit patter, RST 6.5 is pending.;Get bit patter, RST 6.5 is pending.ANI 0DHANI 0DH ;Enables RST 6.5 by setting D1 = 0.;Enables RST 6.5 by setting D1 = 0.ORI 08HORI 08H ;Enable SIM by setting D3 = 1;Enable SIM by setting D3 = 1SIMSIMJMP SERVJMP SERV ;Jump to service routine for RST 6.5;Jump to service routine for RST 6.5

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& MicroprocessorSerial I/OSerial I/O I/O requirementsI/O requirements

• I/O Mapped & Memory Mapped I/O Mapped & Memory Mapped

TransmissionTransmission• Synchronous Vs. AsynchronousSynchronous Vs. Asynchronous• Simplex & Duplex (Half or Full)Simplex & Duplex (Half or Full)

• Parity Check (Odd or Even) with bit DParity Check (Odd or Even) with bit D7 7 = 1: Even= 1: Even

BAUDBAUD• No. of Signals / SecondNo. of Signals / Second

Modem Modem • FSK (Send bits according to frequency)FSK (Send bits according to frequency)

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& Microprocessor8155/8156 Programmable I/O & 8155/8156 Programmable I/O &

Timer Timer FeaturesFeatures 40 Pins40 Pins

256 Bytes of R/W Memory 256 Bytes of R/W Memory

3 Programmable I/O Ports3 Programmable I/O Ports• Two 8-bit parallel I/O ports (A and B) Two 8-bit parallel I/O ports (A and B) • One 6-bit port (C) One 6-bit port (C)

Programmable 14 bit binary counter / Timer Programmable 14 bit binary counter / Timer

Multiplexed Address & Data BusesMultiplexed Address & Data Buses

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& MicroprocessorPin ConfigurationPin Configuration

PC3

PC4

TIMER IN

RESET

PC5

TIMER OUT

IO/M

CE

RD

WR

ALE

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

Vss

Vcc

PC1

PC2

PC0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

8155 / 8156

1

2

3

4

5

6

7

8

9

10

11

12

14

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

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& MicroprocessorBlock DiagramBlock Diagram

8155

256 X 8Static RAM

A

B

CTimer

8

8

6

Port A

Port B

Port C

PA0-7

PB0-7

PC0-5

AD0-7

IO/M

CE

ALE

RD

WR

RESET

Timer CLK

TIMER OUT

Vcc (+5V)Vss (0V)

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& MicroprocessorExpanded Block DiagramExpanded Block Diagram

AD7

AD0

PortA

PortB

PortC

TimerLSB

TimerMSB

Data Bus

Con

trol

R

egis

ter

54

Internal 3Decoder2

10

Inte

rnal

La

tch

A1

A2

A3

Timer MSB

Timer MSB

Port C

Port B

Port A

Control Register

A7

CE

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& Microprocessor Port Address APort Address A15 15 – A– A88 is duplicated by A is duplicated by A77 – A – A00

AA1515 & A & A1414 are Active Low Enable are Active Low Enable AA1313, A, A1212 & A & A1111 are give as input to 8205 decoder are give as input to 8205 decoder OO44 is give to the chip enable of 8155 is give to the chip enable of 8155

AA

22

AA

11

AA

00

ControlControl

00 00 00 Control RegisterControl Register

00 00 11 Port APort A

00 11 00 Port BPort B

00 11 11 Port CPort C

11 00 00 Timer LSBTimer LSB

11 00 11 Timer MSBTimer MSB

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& Microprocessor

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& Microprocessor

To enable o4 of 8205 ATo enable o4 of 8205 A1313=1, A=1, A1212=0, =0, AA1111=0=0

The Following table give the address The Following table give the address of Ports of 8155of Ports of 8155

AA

1313

AA

1212

AA

1111

AA

22

AA

11

AA

00

HEX HEX CodeCode

ControlControl

11 00 00 00 00 00 20 H20 H Control Control RegisterRegister

11 00 00 00 00 11 21 H21 H Port APort A

11 00 00 00 11 00 22H22H Port BPort B

11 00 00 00 11 11 23H23H Port CPort C

11 00 00 11 00 00 24H24H Timer Timer LSBLSB

11 00 00 11 00 11 25H25H Timer Timer MSBMSB

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& MicroprocessorControl RegisterControl Register

DD77 DD66 DD55 DD44 DD33 DD22 DD11 DD00

00 NOP

01 STOP/NOP

10 STOP after TC

11 START

IEA IEB

1 – Enable0 – Disable

DD

33

DD

22

PPCC55

PPCC44

PCPC

33

PPCC22

PPCC11

PCPC

00

00 00 II II II II II II

11 11 OO OO OO OO OO OO

00 11 OO OO OOSTST

BBAA

BFBF

AA

INTINT

RRAA

11 00STST

BBBB

BFBF

BB

INTINT

RRBB

STST

BBAA

BFBF

AA

INTINT

RRAA

Port A Port B

0 – Input ; 1 - Output

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& MicroprocessorInterfacing 7 segment LED Interfacing 7 segment LED DisplayDisplay

Design 2 7-segment LED displays using Ports A & B of Design 2 7-segment LED displays using Ports A & B of 8155 to display the data bytes.8155 to display the data bytes.

SolutionSolution

HP 5082/7340 are inbuilt decoders- is attached to Port AHP 5082/7340 are inbuilt decoders- is attached to Port A

9370 decoder & 7-segment LEDs is attached with Port B9370 decoder & 7-segment LEDs is attached with Port B

The Data Byte separated into nibbles and displayedThe Data Byte separated into nibbles and displayed

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& Microprocessor Control WordControl Word

ProgramProgram

MVI A, 03HMVI A, 03H ; Initialize ports A and B as output ports.; Initialize ports A and B as output ports.OUT 20HOUT 20HMVI A, BYTE1MVI A, BYTE1OUT 21HOUT 21H ; Display BYTE1 at port A.; Display BYTE1 at port A.MVI A, BYTE2MVI A, BYTE2OUT 22HOUT 22H ; Display BYTE2 at port B.; Display BYTE2 at port B.HLTHLT

DD77 DD66 DD55 DD44 DD33 DD22 DD11 DD00

00 00 00 00 00 00 11 11= 03H

No Effect on Timer

NotApplicable

Port CIs not

Being used

Port BAs

O/P

Port AAs

O/P

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Timer in 8155Timer in 8155

Two 8bit RegistersTwo 8bit Registers

14 bits are used for counters14 bits are used for counters

2 bits for Timer Mode2 bits for Timer Mode

Timer can be stoppedTimer can be stopped• At midst of Terminal CountAt midst of Terminal Count• At end of Terminal CountAt end of Terminal Count

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& Microprocessor

TimerTimer

MM

22

MM

11

TT11

33

TT11

22

TT11

11

TT11

00

TT

99

TT

88

TT

77

TT

66

TT

55

TT

44

TT

33

TT

22

TT

11

TT

00

MM

22

MM

11

DescriptionDescription

00 00 One Square One Square WaveWave

00 11 Continuous Continuous Square WaveSquare Wave

11 00 Single Pulse Single Pulse upon TCupon TC

11 11 Continuous Continuous Pulse upon Pulse upon every TCevery TC

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& MicroprocessorExample for using TimerExample for using Timer

11 00 11 11 11 00 00 00

00 11 00 00 11 00 11 11

11 11 00 00 11 11 11 00

The System Clock is connected to Timer IN of 8155. The clock has 3MHz Frequency. Write a program to produce continuous square wave with a frequency of 1KHz. Includes a start timer command, disable the port interrupts, make Port B&C as O/P ports and make Port A as I/P port.

LSB Timer

MSB Timer

Control Word

• Timer • 300010 = 0BB8H• Timer M2, M1 = 0,1 (Continuous Square Wave)

• Control Word• D0, D1, D2 & D3 = 0,1,1&1 respectively (Port A is I/P & Port B&C are O/P• D6, D7 = 1, 1 (Start the Timer)

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ProgramProgram

MVI A, B8HMVI A, B8H -- Setting LSB of TimerSetting LSB of Timer

OUT 24HOUT 24H -- Loading LSB TimerLoading LSB Timer

MVI A, 4BHMVI A, 4BH -- Setting MSB TimerSetting MSB Timer

OUT 25HOUT 25H -- Loading MSB TimerLoading MSB Timer

MVI A, CEHMVI A, CEH -- Setting Control WordSetting Control Word

OUT 20HOUT 20H -- Loading Control WordLoading Control Word

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& Microprocessor

8355 / 87558355 / 8755

2K memory of EPROM2K memory of EPROM

2 8-bit I/O Ports2 8-bit I/O Ports

Data Direction RegisterData Direction Register

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& MicroprocessorPin ConfigurationPin Configuration

CE1

CE2

CLK

RESET

N.C.

READY

IO/M

IOR

RD

IOW

ALE

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

Vss

Vcc

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

A10

A9

A8

8355 / 8755

1

2

3

4

5

6

7

8

9

10

11

12

14

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

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& MicroprocessorBlock DiagramBlock Diagram

8355/8755

2K X 8EPROM

A

B

8

8

Port A

Port B

PA0-7

PB0-7

AD0-7

READY

CE2

ALE

RD

IOWRESET

Prog/CE1

VDD

VCC

VSS

CLK

IOR

IO/M

A8-10

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& Microprocessor

Page 218: Computer archi&mp

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& Microprocessor

Address BitsAddress Bits

AA11

55//AADD

77

AA11

44//AADD66

AA11

33//AADD

55

AA11

22//AADD

44

AA11

11//AADD

33

AADD

22

AADD

11

AADD

00

SelecteSelected d

RegisterRegister

00 00 00 00 00 XX 00 00 Port APort A

00 00 00 00 00 XX 00 11 Port BPort B

00 00 00 00 00 XX 11 00 DDR ADDR A

00 00 00 00 00 XX 11 11 DDR BDDR B

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Interfacing 8755 I/O PortsInterfacing 8755 I/O Ports

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& Microprocessor

ExampleExample

Write initialization instructions to configure port A Write initialization instructions to configure port A and port B as output ports, and display 32H at port A and port B as output ports, and display 32H at port A

Program:Program:

MVI A, FFHMVI A, FFH ; Control word to set up all bits as ; Control word to set up all bits as output bitsoutput bits

OUT 02HOUT 02H ; Initialize port A as output; Initialize port A as output

OUT 03HOUT 03H ; Initialize port B as output; Initialize port B as output

MVI A, 32HMVI A, 32H

OUT 00HOUT 00H ; Display 32H at port A; Display 32H at port A

HLTHLT

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& Microprocessor8279 Programmable Keyboard / 8279 Programmable Keyboard / Display InterfaceDisplay Interface

Simultaneous Keyboard Display OperationSimultaneous Keyboard Display Operation

8 character keyboard FIFO8 character keyboard FIFO

2-key lockout or N-Key Roll over2-key lockout or N-Key Roll over

Dual 8 or 16 numerical DisplayDual 8 or 16 numerical Display

Single 16 character displaySingle 16 character display

Right or Left Entry 16 Byte display RAMRight or Left Entry 16 Byte display RAM

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& Microprocessor

Major SegmentsMajor Segments

KeyboardKeyboard• Connected to 64 contact key matrixConnected to 64 contact key matrix• Entries are stored in FIFOEntries are stored in FIFO• Interrupt sent for every entryInterrupt sent for every entry

DisplayDisplay• Has 16 characters scanned displayHas 16 characters scanned display• 16 character memory16 character memory

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Computer Architecture

& MicroprocessorPin ConfigurationPin Configuration

RL2

RL3

CLK

IRQ

RL4

RL5

RL6

RL7

RESET

RD

WR

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

Vss

Vcc

RL1

RL2

CTRL/STB

SHIFT

SL3

SL2

SL1

SL0

OUT B0

OUT B1

OUT B2

OUT B3

OUT A0

OUT A1

OUT A2

OUT A3

BD

CS

A0

8279

1

2

3

4

5

6

7

8

9

10

11

12

14

14

15

16

17

18

19

20

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

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& Microprocessor

IRQ RL0-7

DataBus

SHIFTRD

CNTL/STBWR

CS

SL0-3

A0

OUT A0-3

RESET

OUT B0-3

CLK BD

Logical SymbolLogical Symbol

8

8

4

4

4

Vcc

Vss

Scan

Display

Data

Key Data

CPU

Interface

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& MicroprocessorPin NamesPin Names

DBDB00

-7-7

I/I/OO

Data Bus (Bi Data Bus (Bi Directional)Directional)

CLKCLK II Clock InputClock Input

RESRESETET II Reset InputReset Input

CSCS II Chip SelectChip Select

RDRD II Read InputRead Input

WRWR II Write InputWrite Input

A0A0 IIBuffer Buffer AddressAddress

IRQIRQ OOInterrupt Interrupt Request Request OutputOutput

SLSL0-30-3 OO Scan LinesScan Lines

RLRL0-30-3 IIReturn Return LinesLines

SHIFTSHIFT II Shift InputShift Input

CNTL/CNTL/STBSTB II

Control Control Strobe Strobe InputInput

OUT OUT AA0-30-3

OODisplay (A) Display (A) OutputsOutputs

OUT OUT BB0-30-3

OODisplay (B) Display (B) OutputsOutputs

BDBD OOBlank Blank Display Display OutputOutput

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& MicroprocessorLogic Block DiagramLogic Block Diagram

Page 227: Computer archi&mp

227227

Computer Architecture

& Microprocessor

Different SectionsDifferent Sections Keyboard SectionKeyboard Section

Scan SectionScan Section

Display SectionDisplay Section

MPU Interface SectionMPU Interface Section

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& Microprocessor

Programming 8279Programming 8279

left or right entry and key rollover.left or right entry and key rollover.

clock frequency prescaler.clock frequency prescaler.

starting address and incrementing mode of the starting address and incrementing mode of the FIFO RAM.FIFO RAM.

RAM address to read and write data and RAM address to read and write data and incrementing mode.incrementing mode.

blanking format.blanking format.

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& Microprocessor

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& Microprocessor

CircuitCircuit

The 8279 Programmable Keyboard / Display InterfaceThe 8279 Programmable Keyboard / Display Interface

A Matrix keyboard with 22 keysA Matrix keyboard with 22 keys

Six seven-segment LEDs: DS1-DS6Six seven-segment LEDs: DS1-DS6

74LS156 decoder with open collector outputs.74LS156 decoder with open collector outputs.

Transistors as current DriversTransistors as current Drivers

8205 decoder for the decoding logic8205 decoder for the decoding logic

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& Microprocessor

Port AddressPort Address

Keyboard/Display ModeKeyboard/Display Mode

MVI A, 00HMVI A, 00H Control word to set mode: LeftControl word to set mode: Left 0 0 0 D D 0 0 0 D D K K KK K K

entry, 8-character, 2-key lockoutentry, 8-character, 2-key lockout

encoded scan keyboardencoded scan keyboard

STA 1900HSTA 1900H Initialize 8279Initialize 8279

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Computer Architecture

& MicroprocessorPUSH HPUSH H

PUSH PSWPUSH PSWRead FIFO RAM: Control WordRead FIFO RAM: Control Word

LXI H, 1900HLXI H, 1900H Keyboard controlKeyboard control 0 1 0 A1 X A 0 1 0 A1 X A A AA A

register addressregister address

MVI M, 40HMVI M, 40H Control word to readControl word to read

from keyboardfrom keyboard

DCR HDCR H Data Port Address 1800HData Port Address 1800H

MOV A, MMOV A, M Read data Data Format D7 D6 D5 D4 D3 D2 D1 D0Read data Data Format D7 D6 D5 D4 D3 D2 D1 D0

ANI 3FHANI 3FH Mask D7 and D6.Mask D7 and D6. CNTL SHFT ROW COL CNTL SHFT ROW COL

CNTL, Shift keys areCNTL, Shift keys are

not being usednot being used

STA IBUFFSTA IBUFF Store in R/W memoryStore in R/W memory

POP PSWPOP PSW

POP HPOP H

RETRET

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Computer Architecture

& Microprocessor8254 Programmable Interval 8254 Programmable Interval TimerTimer

40 Pin40 Pin 3 independent Counters3 independent Counters 5 Modes of Operations5 Modes of Operations

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Computer Architecture

& Microprocessor

Signals of 8254Signals of 8254

Page 235: Computer archi&mp

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Computer Architecture

& Microprocessor

Modes of OperationsModes of Operations

Mode 0Mode 0 Interrupt on Terminal CountInterrupt on Terminal Count

• Count Begins one clock pulse after the count Count Begins one clock pulse after the count has been written in to counterhas been written in to counter

• GATE 0 = 1, then counter 0 counts downGATE 0 = 1, then counter 0 counts down• CLK 0 pulse then the counter decrements by CLK 0 pulse then the counter decrements by

11• GATE 0 = 0. then counts inhibitedGATE 0 = 0. then counts inhibited

The operation is same for all the 3 The operation is same for all the 3 counterscounters

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& Microprocessor

Read/Write OperationsRead/Write Operations

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& Microprocessor

Control WordControl Word

Page 238: Computer archi&mp

238238

Computer Architecture

& Microprocessor

Memory, Port & Timer AddressMemory, Port & Timer Address

Page 239: Computer archi&mp

239239

Computer Architecture

& Microprocessor

Control Word for 8255A#1Control Word for 8255A#1

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240240

Computer Architecture

& Microprocessor

Control Word for 8255A#2Control Word for 8255A#2

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Computer Architecture

& Microprocessor

Control Word for 8254Control Word for 8254

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& Microprocessor

ProgramProgram

MVIMVI A, CWR1A, CWR1 ;Get 8255A #1command word;Get 8255A #1command word

OUTOUT CR1CR1

MVIMVI A, CWR2A, CWR2 ;Get 8255A #2 command word;Get 8255A #2 command word

OUTOUT CR2CR2

MVIMVI A, BLMSETA, BLMSET ;Get byte to blank the LIMIT SET ;Get byte to blank the LIMIT SET lamp.lamp.

OUTOUT PORTC2PORTC2 ;Send to port C of 8255 #2;Send to port C of 8255 #2

CALL CALL RALARMRALARM ;Reset alarms.;Reset alarms.

CALL CALL STCNTR0STCNTR0 ;Start counter 0.;Start counter 0.

EIEI ;Enable interrupts;Enable interrupts

RETRET ;End of subroutine.;End of subroutine.

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& Microprocessor

Temperature Monitoring System Temperature Monitoring System

General ControlsGeneral Controls

µprocessor based system is designed to control the µprocessor based system is designed to control the temperature of a water bath, by controlling a heater ON temperature of a water bath, by controlling a heater ON or OFFor OFF

Accuracy of Accuracy of 1º C 1º C

Temperatures can be set by switchesTemperatures can be set by switches

7 segment Display is used to display the temperature7 segment Display is used to display the temperature

This involves both hardware & software designThis involves both hardware & software design

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Computer Architecture

& Microprocessor

Hardware DesignHardware Design A transducer is used to convert temperature into an A transducer is used to convert temperature into an

equivalent analog electrical quantityequivalent analog electrical quantity

The analog signal is converted in digital by A/D ConvertersThe analog signal is converted in digital by A/D Converters

A relay is used to switch heater ON & OFFA relay is used to switch heater ON & OFF

Two digit 7-segment display is used to display the Two digit 7-segment display is used to display the temperaturetemperature

All these hardware are interface to MPU through I/O portsAll these hardware are interface to MPU through I/O ports

EPROM is used to store the SoftwareEPROM is used to store the Software

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Computer Architecture

& MicroprocessorBlock Diagram of Hardware Block Diagram of Hardware

DesignDesign

Address, Data & Control Busses

MPU

EPROM8 Bit

I/O Port

Relay Driver &

Relay

8 bitI/O Port

8 BitI/O Port

Temp. Transducer

& Buffer

A/D Converter

7-segment Displays

Switches

SO

DSID

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Computer Architecture

& MicroprocessorDetailed Block DiagramDetailed Block Diagram

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& Microprocessor

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Computer Architecture

& Microprocessor MemoryMemory

• No RAM is necessaryNo RAM is necessary• EPROM 2716 is used to used (2KB of Memory)EPROM 2716 is used to used (2KB of Memory)

I/O PortI/O Port• System requires 26 I/O lines (17 O/P & 9 I/P)System requires 26 I/O lines (17 O/P & 9 I/P)• 8255 (24 Ports) with SID & SOD8255 (24 Ports) with SID & SOD

A/D ConverterA/D Converter• ADC chips are quite costlier when compared to ADC chips are quite costlier when compared to

DAC. As fast conversion is not necessaryDAC. As fast conversion is not necessary• ADC can be implemented by using an external ADC can be implemented by using an external

DAC and a comparator with MPU as ControllerDAC and a comparator with MPU as Controller

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& Microprocessor LED DisplayLED Display

• 2 7-segment display is used 2 7-segment display is used

SwitchesSwitches• One Thumb wheel Switch is used(4 toggle switches)One Thumb wheel Switch is used(4 toggle switches)

Transducer & BufferTransducer & Buffer• A thermistor with 5KA thermistor with 5K is used at 25 is used at 25ºCºC

Relay & relay driverRelay & relay driver• Temperature of Bath is controlled by immersion heater Temperature of Bath is controlled by immersion heater

ON or OFFON or OFF• Immersion heater is ON or OFF by a relayImmersion heater is ON or OFF by a relay• This controlled by SID & SOD of MPUThis controlled by SID & SOD of MPU

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Software Design (Algorithm)Software Design (Algorithm) Initialize I/O port of 8255.Initialize I/O port of 8255.

ADC is performed by successive approximationADC is performed by successive approximation

Getting Temperature for Bath.Getting Temperature for Bath.

Display measured temperature in LED Display Display measured temperature in LED Display

Read the desired temperature from SwitchesRead the desired temperature from Switches

Comparing measured temp. with desired temp. & making Comparing measured temp. with desired temp. & making SOD low or high SOD low or high

Generate a delay of 2 SecondGenerate a delay of 2 Second

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Computer Architecture

& MicroprocessorFlowchartFlowchartStart

Initialize I/O ports

A/D Converter

Get Desired Temp.

Display measured Temp

Read Desired Temp.

Make RelayOFF

.5 Sec Delay

Make RelayON

Is MT = DT

Yes

NO

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Computer Architecture

& MicroprocessorProgramProgram

MVI A, MVI A, 89H89H Initialize Port A & B as Initialize Port A & B as

O/P, C as I/PO/P, C as I/POUT OUT 03H03H

AGAIAGAIN:N:

MVI MVI C,00HC,00H Initial Data ValueInitial Data Value

REP:REP: MOV A, MOV A, CC

Send to DACSend to DACOUT OUT 00H00H

MVI D, MVI D, 08H08H

Wait for DACWait for DACDCR DDCR D

JNZ JNZ LOOPLOOP

RIMRIM Get Comparator O/PGet Comparator O/P

RALRAL

Check for non-EqualityCheck for non-EqualityJNC JNC COUNTCOUNTDD

JMP JMP NEXTNEXT Check for EqualityCheck for Equality

COUNCOUNTD:TD:

INR CINR CSend next Digital Send next Digital ValueValueJMP JMP

REPREP

NEXTNEXT::

MOV L, MOV L, CC Table starts from Table starts from

0200H0200HMVI H, MVI H, 02H02H

MOV A, MOV A, MM

Get temp. from TableGet temp. from Table

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& MicroprocessorProgramProgram

OUT OUT 01H01H Display itDisplay it

IN 02HIN 02H Get switch settingGet switch setting

CMP MCMP M Compare Temp. in Compare Temp. in Mem. & Acc.Mem. & Acc.

JC JC OFFOFF If Temp. is High or If Temp. is High or Equal OFF relayEqual OFF relayJZ JZ OFFOFF

ON:ON: MVI A, MVI A, 40H40H

Else ON relayElse ON relaySIMSIM

JMP JMP DELAYDELAY

OFF:OFF: MVI A, MVI A, C0HC0H Switching OFF relaySwitching OFF relaySIMSIM

DELADELAY:Y:

MVI D, MVI D, 00H00H

Time DelayTime Delay

L2:L2: MVI E, MVI E, 00H00H

L1:L1: DCR EDCR E

JNZ JNZ L1L1

DCR DDCR D

JNZ JNZ L2L2

JMP JMP AGAINAGAIN

Goto AGAIN to repeat Goto AGAIN to repeat the stepsthe steps