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Indian Journal of Pure & Applied Physics Vol. 43, December 2005, pp. 980-988 Comparative study of power MOSFET device structures Rakesh Vaid & Naresh Padha Department of Physics & Electronics, University of Jammu, Jammu, 180006 Received 19 April 2005; revised 13 October 2005; accepted 26 October 2005 In this paper, a comprehensive comparative study of various power MOSFET device structures designed and developed durin~ the past decade has been presented. Various design issues related with power MOSFET have been studied to look into their on-resistance (RON) versus breakdown voltage (Bv) trade off. Some of the existing power MOSFET device topologies have been compared with respect to their ROIVBV. The study reveals that the low-doped n epi region which gives square law relationship between RON and Bv in the conventional power MOSFET is being constantly engineered for optimizing RON-BV trade-off subsequently led to many structural modifications in its basic design giving rise to many new power MOSFET device structures such as SSCFET (Silicon Semiconductor Corp. FET), JBSFET (Junction barrier controlled Schottky FET), superjunction (SJ)ICOOLMOS™ transistor, semi-superjunction devices and FLlMOSFET (power MOSFETs with vertical floating islands) so as to overcome the conventional silicon limit. Keywords: Power MOSFET, v-groove-MOS, Vertical double-diffused MOS, Trench power MOSFET, COOLMOS™, Vertical Floating Islands MOS (FLIMOSFET) IPC Code: HOI L29176 1 Introduction As the power handling capability and frequency response of silicon devices has improved, new applications for these devices have been created. During the past decade, there has been an increasing acceptance of the usage of power MOSFETs. Their high input impedance and excellent safe operating area make them important candidates for many applications. They are being used in audio/radio frequency circuits, high-frequency inverters used in SMPS, lamp ballasts and motor control circuits, etc'". The low power MOSFET structure is not suitable for high-power applications. To appreciate this fact; recal that the drain current of an n-channel MOSFET operating in the saturation region is given by: ... (1) It follows that to increase the current capability of the MOSFET, its width W should be made large and its channel length L should be made as small as possible. Unfortunately, however, reducing the channel length of the standard MOSFET structure, results in drastic reduction in its breakdown voltage. Specifically, the depletion region of the reverse- • Fax No. +91-191-2453079, E-mail: [email protected] biased body-to-drain junction spreads into short channel, resulting in breakdown at relati vely low voltage. Thus, the resulting device would not be capable of handling the high voltages typical of power-transistor applications. For this reason, new structures had to be found for fabricating short- channel (1 to 2 urn) MOSFETs with high breakdown voltages. The basic design principle of power MOSFETs is the same as that of classical MOS transistors. Power MOS transistors can be classified into five families: (1) Structures having co-planar drain, gate and source electrodes with aluminium gate, horizontal and constant doped channels or refractory gate or with field plate over gate; (2) Structures having co-planar electrodes and horizontal channel fabricated by the process of double diffusion (DMOS); (3) Structures having non-planar electrodes and horizontal channel with uniform doping in the channel region; i.e., source or drain on the bottom with a meshed pattern for the gate; (4) Structures having non-coplanar electrodes; source and gate on top and drain on bottom, and horizontal channel fabricated by the process of double diffusion with multi-cell source configuration; (5) Structures fabricated by chemical etching of the silicon; that is isotropic etching or anisotropic etching known as VMOS. Most promising among these families are:

Transcript of Comparative study of power MOSFET device...

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Indian Journal of Pure & Applied PhysicsVol. 43, December 2005, pp. 980-988

Comparative study of power MOSFET device structuresRakesh Vaid & Naresh Padha

Department of Physics & Electronics, University of Jammu, Jammu, 180006

Received 19 April 2005; revised 13 October 2005; accepted 26 October 2005

In this paper, a comprehensive comparative study of various power MOSFET device structures designed and developeddurin~ the past decade has been presented. Various design issues related with power MOSFET have been studied to lookinto their on-resistance (RON) versus breakdown voltage (Bv) trade off. Some of the existing power MOSFET devicetopologies have been compared with respect to their ROIVBV. The study reveals that the low-doped n epi region which givessquare law relationship between RON and Bv in the conventional power MOSFET is being constantly engineered foroptimizing RON-BV trade-off subsequently led to many structural modifications in its basic design giving rise to many newpower MOSFET device structures such as SSCFET (Silicon Semiconductor Corp. FET), JBSFET (Junction barriercontrolled Schottky FET), superjunction (SJ)ICOOLMOS™ transistor, semi-superjunction devices and FLlMOSFET(power MOSFETs with vertical floating islands) so as to overcome the conventional silicon limit.Keywords: Power MOSFET, v-groove-MOS, Vertical double-diffused MOS, Trench power MOSFET, COOLMOS™,

Vertical Floating Islands MOS (FLIMOSFET)

IPC Code: HOIL29176

1 IntroductionAs the power handling capability and frequency

response of silicon devices has improved, newapplications for these devices have been created.During the past decade, there has been an increasingacceptance of the usage of power MOSFETs. Theirhigh input impedance and excellent safe operatingarea make them important candidates for manyapplications. They are being used in audio/radiofrequency circuits, high-frequency inverters used inSMPS, lamp ballasts and motor control circuits, etc'".The low power MOSFET structure is not suitable forhigh-power applications. To appreciate this fact;recal that the drain current of an n-channel MOSFEToperating in the saturation region is given by:

... (1)

It follows that to increase the current capability ofthe MOSFET, its width W should be made large andits channel length L should be made as small aspossible. Unfortunately, however, reducing thechannel length of the standard MOSFET structure,results in drastic reduction in its breakdown voltage.Specifically, the depletion region of the reverse-

• Fax No. +91-191-2453079, E-mail: [email protected]

biased body-to-drain junction spreads into shortchannel, resulting in breakdown at relati vely lowvoltage. Thus, the resulting device would not becapable of handling the high voltages typical ofpower-transistor applications. For this reason, newstructures had to be found for fabricating short-channel (1 to 2 urn) MOSFETs with high breakdownvoltages. The basic design principle of powerMOSFETs is the same as that of classical MOStransistors.

Power MOS transistors can be classified into fivefamilies:

(1) Structures having co-planar drain, gate andsource electrodes with aluminium gate, horizontal andconstant doped channels or refractory gate or withfield plate over gate; (2) Structures having co-planarelectrodes and horizontal channel fabricated by theprocess of double diffusion (DMOS); (3) Structureshaving non-planar electrodes and horizontal channelwith uniform doping in the channel region; i.e., sourceor drain on the bottom with a meshed pattern for thegate; (4) Structures having non-coplanar electrodes;source and gate on top and drain on bottom, andhorizontal channel fabricated by the process of doublediffusion with multi-cell source configuration;(5) Structures fabricated by chemical etching of thesilicon; that is isotropic etching or anisotropic etchingknown as VMOS. Most promising among thesefamilies are:

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VAID & PADHA: COMPARATIVE STUDY OF POWER MOSFET DEVICE STRUCTURES

(a) The VMOS or UMOS transistors fabricated byanisotropic etching of the silicon around the grooves;(b) The VDMOS (TMOS, DMOS, HEXFET,SIPMOS, TRIMOS. . .. according to themanufacturer* concerned) fabricated by the processof double diffusion.

There has been a trade-off in the on-resistance(RON) and breakdown voltage (Bv) while designingpower MOSFETs and recently many power MOSFETconfigurations have been used for optimizing the RON,- Bv relationship such as Trench power'" MOSFET,SSCFET'O•

", JBSFET10,12,13,superjunction (SJ)14,20/

COOLMOS™ devices, semi-superjunction"MOSFETs, Novel high voltage sustaining structure",and FLIMOSFET23'25, etc. In this paper, we present acomparative study of various power MOSFET devicestructures and discuss their device operation andperformance with regard to RotrBv trade-off.

2 Various Power MOSFET Device Structures2.1 VMOS transistor (V groove)

Fig. 1 shows a section of the VMOS or (V groove)transistor. It is produced from silicon epilayer of thetype n' «: with a p-Iayer diffused throughout thesurface. Diffusion zones n' are also carried out in thesame window. The silicon is chemically attacked andgrooves (V's) are opened in the middle of the diffusedn: zones. This V formation is obtained by etching ofthe silicon through windows in an oxide by hydrazine.Sides of V are thermally oxidized and then metallizedto constitute the gate. The source contact is alsometallized, which short-circuit in the n and p"diffusions. The drain is on the lower side 'bf device.The advantage of this type of transistor is itssimplicity and the precise control of its geometricdimensions, in particular, the channel length. Finally,each groove produces two channels, doubling thecurrent capability and reducing the surface area. Thepresence of the n drift zone gives a high voltagecapacity. These transistors have good switchingspeeds and can operate in the VHF range. In VMOS,channel is formed on {Ill} plane, so, its surface

'There are many power MOSFET manufacturers and almosteveryone has his own process optimization and trade name.International Rectifier pioneered the HEXFET, Motorola buildsTMOS, Lxys fabricates HiPerFETs and MegaMOS; Siemens hasthe SIPMOS family of power transistors and Advanced PowerTechnology, the Power MOS IV, to name a few. Whether theprocess is called VMOS, TMOS or DMOS it has a horizontal gatestructure and vertical current flow past the gate.

981

N drift

+ .N substrate

drainFig. 1-Schematic design of a V-groove MOSFET (VMOSFET).

Structure shown represents one cell of the device

mobility is lower than VDMOS. Since the V groove isformed by chemical etching process, which leavesmany sodium ions on the etched surface whosepresence creates a lot of reliability problems, so thatthe VMOS devices are not used presently'".2.2 VDMOS transistor

At present, the most popular structure for a powerMOSFET is the vertical double-diffused (VDMOS)transistor as shown in Fig. 2. It starts with a heavilydoped n-type substrate in order to minimize bulkportion of the channel resistance. An n' epi layer isgrown on it and two successive diffusions are made, ap-zone in which proper bias will generate the channeland an n' into it defining the source. Next the thin,high quality gate oxide is grown followed by thephosphorous-doped polysilicon thus forming the gate.Contact windows are opened on top defining thesource and the gate terminals while the whole bottomof the wafer makes the drain contact. With no gatebias, the n+ source and n+ drain are separated byp-zone and no current flows (transistor is turned-off).With a positive gate bias, the minority carriers in thep-zone (electrons) are attracted to the surfaceunderneath the gate plate. As the bias increases moreelectrons are being confined to this small space, thelocal minority concentration becomes larger than thehole (P) concentration and inversion occurs. Now an nchannel is formed in the p material right under the

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SOlUTe

INDIAN J PURE & APPL PHYS, VOL 43, DECEMBER 2005

+P region

N buffer layer

N+substrate

Fig. 2 - Schematic design of a VDMOSFET (DMOS) transistor.Structure shown represents half cell of the device

SOlUTe

"

Pbase

N-(hift

N substrate

drain

Fig. 3-Schematic design of a Trench gate MOSFET (UMOSFET)transistor. Structure shown represents half cell of the device

gate structure connecting the source to the drain andcurrent can now flow. The gate bias controls the flowof current between source and the drain 1.3.

The power MOSFET is nothing but a structurecontaining a multitude of cells like the one describedin Fig. 2 connected in parallel. And, like anyparalleling. f.. identical resistors, the equivalentresistance is .L/n-th. of the single cell's RDS(ON)' Thelarger the die, the lower is its on-resistance but at thesame time larger parasitic capacitances and therefore,the poor switching performance. For example,Intersil" power MOSFETs of 120-mif chip containsabout 5,000 cells; a 240-mie chip has more than25,000 cells.2.3 Trench power MOSFET

About five years ago, the power MOSFET industryshifted to trench-gate technology'" to reduce the on-resistance. In the trench-gate structure (see Fig. 3),commonly referred to as the UMOSFET, the chaimel.is formed on the vertical sidewalls of a trench etched '1

. into the silicon surface. Because the drain-sourcecurrent is directed along a vertical path, the JFETresistance is eliminated. This allows reduction of theon-resistance not only, b),' removal" of one of theresistance components.lbur'also by allowing a smallercell" I'size, which increases the channel 'density.Unfortunately, the trench-gate process' is, . more

.o <, s.:

expensive when compared to the planar DMOSprocess. The industry has also to deal with reliabilityproblems associated with high electric fields at thetrench corners, which must be solved by rounding thetrench corners and buffering the electric field 'usingthe p' regions. Further, the extension of the gate intothe drift region increases the coupling between thedrain and the gate leading to higher Millercapacitance and gate charge, which can adverselyaffect switching performance. Trench MOSFET islike VMOS, but its groove is made perpendicular tothe surface, so that channel is formed on {1l0}plane". The presence of sharp edges affects the devicebreakdown, so it is used only for low voltage, highcurrent applications. The trench technology has theadvantage of higher cell density but is more difficultto manufacture than the planar device.2.4 SSCFET and JBSFET

The planar power MOSFET structure has been re-engineered'? by Silicon Semiconductor Corp, USA, toachieve performance superior to those of state-of-arttrench devices. By retaining a planar architecture, thefabrication process remains compatible withmainstream CMOS process lines and reliability issuesare ameliorated. In addition, this architecture hasallowed implementation of a silicided gate stack toreduce''the internal gate resistance of the MOSFET.

tstr-c

11t

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VAID & PADHA: COMPARATIVE STUDY OF POWER MOSFETDEVICE STRUCTURES 983

The SSCFETIO (Silicon Semiconductor Corp. FET)structure (see Fig. 4) contains a deep p" region that isself-aligned to the gate region II. Its higher dopingconcentration and deeper extension in both thevertical and lateral directions are used to create apotential barrier in the transition region, which islocated below the gate region. The gate width andtransition region doping profile are optimized toobtain enhanced power MOSFET performance. Thescreening of the gate region at B (Fig. 4) from thedrain potential allows shortening of the channellength, without fear of reach-through-inducedbreakdown, to reduce its resistance contribution. Thechannel contribution decreases to half that observed intypical VDMOSFETs, enabling specific on-resistances for SSCFETs to approach those obtainedin typical trench power MOSFETs.

Another new power MOSFET cell structure hasbeen created called JBSFETIO (Junction barriercontrolled Schottky FET) (see Fig. 5) that integratesthe Schottky diode into the power MOSFET. In thisstructure, the Schottky diode is formed by making abreak in the p-base and the p + shielding regions. Thep + shielding region located below the Schottkycontact produces a junction barrier at C (Fig. 5) that

protects the Schottky contact from the drain potential.This design suppresses the well-known Schottkybarrier-lowering phenomenon that leads to a rapid(typically 10 times) increase in leakage current withincreasing reverse bias". The junction barrier conceptwas first proposed and applied to improving theperformance of Schottky rectifiers'j'". In theJBSFET, the same v' shielding region used forachieving the channel length reduction in theMOSFET, is simultaneously used to shield theSchottky contact with no additional process steps.Due to a high level of integration, the Schottky regionhas sufficient area to handle the full current rating ofthe MOSFET. The JBSFETs offer on-resistances thatare competitive with trench MOSFETs in equivalentpackages while providing the added benefit ofincluding the Schottky diode. This has been found toresult in significantly higher efficiency (two to eightpercentage points) in the de-de converter operating at200 kHz to more than 1 MHz.2.5 Superjunction (SJ)I COOLMOS™ transistors

Recently, the invention of superjunction'V" (SJMOSFET)ICOOLMOS™ have made it possible 'toattain higher speeds and larger breakdown voltagessimultaneously. The structure of the superjunction

SSCf£T stfUdurlSource

••• trate

DramFig. 4 - SSCFET device structure

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984 INDIAN J PURE & APPL PHYS, VOL 43, DECEMBER 2005

Fig. 5 - JSBFET device structure

Source

N' sub

Drain

Fig. 6 - Schematic design of COOLMOS ™ transistor based onsuperjunction concept. Structure shown represents one cell of thedevice

(SJ) COOLMOS™ shown in Fig. 6 is fairly complexand different from the conventional MOS structurebecause of the existence of superjunction drift layer.In these devices!"!", a superjunction composed of pand n pillars, which share vertical boundaries,replaces the drift layer. This modification causes anoticeable change in the electric field profile withinthe device, thereby resulting in large breakdownvoltage. The superjunction devices are based on the

principle of charge compensation, which has beenderived from the lateral RESURF (reduced surfacefield) idea. The doping level of n pillars can be greaterthan that of the conventional power MOSFETs andthe excess charge in the n.pillar can be counterbalanced by the adjacent charges in the p pillar, thuscontributing to a horizontal electrical field withoutaffecting its vertical field distribution. Accordingly,SJ MOSFET concept can realize very low on-resistance by increasing the aspect ratio of nand ppillars because the negative and positive charges ineach pillar can easily compensate each other to allowincrease in their doping concentration 14. However, inreality, the superjunction structure has the followingdifficulties:

(1) The charge must be strictly controlled in thepillars; otherwise the breakdown voltage decreasesrapidly; (2) Deep doping into bulk to make pillars isrequired to minimize the number of iterationprocesses; (3) As the total imbalanced chargeincreases with pillar depth, the realization of highvoltage devices becomes increasingly difficult; (4) Inaddition, it is very difficult to make deep implantationdue to crystalline damage caused by high-energyimplants. Recently, a 600 V superjunction powerMOSFET has been introduced commercially by theInfineon Technologies" SPP20N60S5 having RON

equal to 0.19 Q em",

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VAID & PADHA: COMPARATIVE STUDY OF POWER MOSFET DEVICE STRUCTURES 985

2.6 Semi-superjunction MOSFETThe difficulties associated with the superjunction

(SJ) MOSFET led to the design concept of the semi-superjunctiorr" (SJ) MOSFET in which an optimizedn-type layer is connected to the bottom of the SJstructure as shown in Fig. 7. This n-drift layer is alsoknown as bottom assist layer (BAL). The importantdesign parameters in the semi -SJ structure are theBAL doping concentration and thickness. It has beenshown that the semi-SJ MOSFET with the aspectratio of four has the same on-resistance as the SJ-MOSFET with the aspect ratio of five thuseliminating one turn of the epitaxial growth process.The on-resistance Ron Semi.SJ and breakdown voltage Bv

Semi.SJare given by:

Ron Semi·SJ =RSJ+ RBAL ... (2)

BVSemi.SJ= BVSJ + BVBAL ... (3)

It has been reported" that the on-resistance of thefabricated semi-SJ MOSFET is equal to 54 mQ-cm2at breakdown voltage of 690 V, which is 28% lowerthan the conventional SJ-MOSFET of the samedimensions.

2.7 FLIMOSFET (Power MOSFET with vertical floatingislands)

Another class of devices reported in the literaturefor RowBv optimization are the high voltagesustaining structures22-25 and among these, deviceswith vertical floating islands in the conventionalpower MOSFET known as FLIMOSFET are very

Source source

Electric Field

H

BVSJ

n-BAL(Bot/om. Assist Layer)

N' ~u••

DepthDrain

Fig. 7 - Schematic design of serni-superjunction transistor alongwith its electric field distribution. Structure shown represents onecell of the device.

attractive23-25.These new vertical MOSFET structuresare based on the FLI-diode concept. It has beenshown" that conventional silicon limit can beovercome by using this concept which states that thetriangular electric field distribution in the bulk isdivided into several sections to decrease themagnitude of the peak electric field by insertingelectrically vertical floating p + buried layer in the n'drift region as indicated in Fig. 8. The p' floatinglayer increases the development of depletion layer dueto a mechanism similar to the p-guard rings in planarterminations. With this mechanism, the dopingconcentration of the n- drift region can be enhancedand hence the on-resistance can be reduced by a factorequivalent to the enhancement in dopingconcentration of the drift region. The FLIMOSFETstructure has a distinct advantage over the SJ structureon boron implantation dose control for the p+ floatinglayer. As the reverse bias is increased, the spacecharge region extends from the p-base region towardsthe floating island in the upper drift region. When thisupper drift region is entirely depleted, then the spacecharge starts to extend from the bottom of the floatingisland towards the drain of the FLIMOSFET in thelower drift region. Thus, two electric fielddistributions, each of triangular shape are formed atboth upper and lower drift regions, as shown in Fig.8(c). In contrast, a single electric field distribution isformed in case of conventional power MOSFETstructure, also shown in Fig. 8(c). Therefore, anumber of consecutive vertical floating islands (FLIs)are used to satisfy the desired device performance bykeeping the peak electric field below the criticalelectric field. In this way, the breakdown voltage ofthe device can be improved. From this, if we assumethat critical electric field is constant and the currentpath (which is narrowed by inserting the floatingislands) does not affect the on-resistance, then the Bv

and RoN,sp become (n+ 1) times larger than that of theconventional power MOSFET, where n is the numberof floating islands. In other words, RoN,sp becomesproportional to B», rather than B/ as in case ofconventional power MOSFET structure.

3 On-resistance versus Breakdown Voltage and itsImprovement

The on-resistance of a power MOSFET is the totalresistance between the source' and drain terminal inthe on-state and can be expressed as a seriescombination of several resistance elements26-28 givenby:

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986 INDIAN J PURE & APPL PHYS, VOL 43, DECEMBER 2005

Gate

11-DriftRegion

p+

n. DriftRegion

Gate

VDMOS Conventiona.lDrain

FUMOS with one p+ Island x(c)

(a) (b)

Fig. 8 - Figure explaining FLI-diode concept (a) A conventional VD~OSFET structure (b) FLIMOSFET with the induction of onefloating island (c) Explanation of electric field reduction mechanism

... (4)

where Rsource is the resistance of the n+ sourcediffusion, Rch the channel resistance, RA theaccumulation layer resistance, RJ the contributionfrom the drift region between the p-base regions, Rothe drift region resistance and RSUB is the substrateresistance. Rwcml is equal to the sum of bond wireresistance, the contact resistance between the sourceand drain metallization, the silicon metallization andthe lead frame contribution. These are normallynegligible in high voltage devices but can becomesignificant in low voltage devices. Wafers withsubstrate resistivities of up to 20 mfz-cm are used forhigh voltage devices and less than Smn-cm for lowvoltage devices.

The contribution from the channel can beminimized by taking the channel length small andkeeping its width large. Channel resistance can alsobe reduced by decreasing the gate oxide thicknesswhile maintaining the gate derive voltage. Theaccumulation resistance can be reduced by decreasingthe length of the gate electrode between the cells. Thespecific on-resistance of the power MOSFET willthen be determined mainly by the drift region. Atlower voltages, Ros (on) is dominated by the channelresistance and the contributions from the metal tosemiconductor contact, metallization, bond wires andlead frame. The Miller capacitance in the

... (S)

VDMOSFET can be reduced by decreasing the space• 10between the p-base regIOns .

The breakdown voltage of a power MOSFETtogether with its maximum current handlingcapability determines its power rating. Therefore, thestructure of a power MOSFET should be designed insuch a way to maximize its power handling capacityand breakdown voltage (Bv). The condition for carriergeneration with a uniform electric field E is given by:

wf adx = 1o

where, a = ae-blE is the impact ionization coefficient,defined as the number of carrier pairs generated by asingle carrier traversing unit distance through electricfield E. The parameters, a and b, are constantsspecific to electrons and holes. The integration is doneover the width of the region W. However, since themajor contribution to the integral comes from theregions of highest field, an approximation that thereexists a certain field, called the critical field (Ec) atwhich breakdown starts can be considered constantfor simplifying the analysis. For an abrupt p+njunction, the depletion region extends almost fully tothe n-side. The maximum field, for a given voltage(VA) across this junction is then given by,

_~qNDVEM - A

Es... (6)

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ne

pace

FETiling, thexl inacityirnerIby:

.. (5)

.ient,by a.ctric.tantsdonee the1 thethere~c) atistantp+-nlly toIltage

... (6)

VAID & PADHA: COMPARATIVE STUDY OF POWER MOSFET DEVICE STRUCTURES 987

where, q is the electron charge, and No is the dopingconcentration on the n-side.

Eq. (6) implies that lower the doping concentrationon the n-side, lower is the peak field in the junction.For a given breakdown voltage Bv, to be attained bythe device, critical field Ec, taken to be constant, andthe optimum width of the drift region (W) preventingpunch-through, one gets the optimum doping No as:

NEE 2o=~

2qBv... (7)

Since the resistance of the drift region isproportional to WMo, we get:

WRON =--qf.1,N

D

By choosing the appropriate values for E; and f.1, forn-type silicon, we can obtain the conventional siliconlimit equation as:

... (8)

RON = 8.3xl0-9 X Bv2

.S Q em' ... (9)

This square law is the major hurdle in designingpower MOSFETs for higher breakdown voltages andhas been shown to become linear for SJ29 MOSFETand is given by:

5

RON-Sf = 1.98 X 10-1 x i4 x e; Q ern' ... (10)

where d is the thickness of the p or n pillar in thesuperjunction structure. Similarly, the relationship"for FLIMOSFET has been given by:

RON-FLI = 2.3 X 10-8 x B/5 x (n + 1)-1.5 Q em' ... (11)

where n is the number of floating islands in thedevice.

Fig. 9 shows a comparative plot showing RON-BVvariations based on the analytical equations forconventional silicon limit, SJ-MOSFET,FLIMOSFET and the experimental results for 600 VCOOLMOS™ and 690 V semi-SJ MOSFET.

4 ConclusionsThe paper presents various power MOSFET

structures developed over the past decade. It has beenshown from the data reported during this period thatthe low doped epi region in the conventional powerMOSFET structure has been constantly engineered togive rise to new power MOSFET designs for RON-Bv

O.-resistuu:e ""t'SUS BreakUwaV.ltqe (V)

0.001

0.1

Ne 1.10-3Ia'-'= -4Ill: 1·10

-51·10

-61·10

1000100Breakdown Voltage (V)

-- Siliconlimit(conven) • COOLMOS 600 Volt •• <2>-. S) MOSFET d-5micron • Semi-S) MOSFET8B FUMOSFET n-6

Fig. 9 - On-resistance versus breakdown voltage comparison forvarious power MOSFET devices based on analytical data

optimization. The square law relationship betweenRotvBv in the conventional power MOSFET led tomany structural modifications in its basic designgiving rise to many new power MOSFET devicestructures such as SSCFET, JBSFET,superjunctionlCOOLMOS™ transistor, semi-superjunction and FLIMOSFET.

AcknowledgementOne of the authors (RV) gratefully acknowledges

Prof S K Khosa, Head, Department of Physics &Electronics, University of Jammu, Jammu, for hisconstant encouragement throughout this work and theUniversity Grants Commission (UGC), Govt. ofIndia, India, for the award of Teacher Fellowshipunder the FIP scheme during the io" plan period .

ReferencesI Baliga B J, Modern Power devices, (Wiley-Eastern, New

York) 1987.2 Grant D A & Gowar J, Power MOSFETs: Theory and

applications, (Wiley, New York) 1989.3 Baliga B J, Power Semiconductor Devices, (PWS Publishing

Co, Boston) 1996.4 Intersil Application Note AN7244, October 1999.5 Park I Y, Choi Y I, Chung S K, et al., Microelectron

Journal, 32 (2001) 497.6 Uesugi T, Kodama M, Kawaji S, et al., Proc IEEE ISPSD,

1998, p. 57.7 Chang H R & Holroyd F W, Solid State Electron, 33 (1990)

381.

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988 INDIAN J PURE & APPL PHYS, VOL 43, DECEMBER 2005

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