Commercial-Foundry Flexible Mixed Signal ASIC Design Center ACME SSED Foundry-Portable, Mixed-Signal...

Commercial-Foundry Flexible Mixed Signal ASIC Design Center

ACME

SSED

Foundry-Portable, Mixed-Signal Foundry-Portable, Mixed-Signal

ASIC Design CenterASIC Design Center

Application of Commercially Manufactured Electronics


ACME

SSED

Problem Statement:

• Traditional military sources of high-performance, mixed-signal ASIC technology are going away.

• In the future, defense programs will need to use commercial sources for this technology, or do without.

• Military business is not attractive to commercial ASIC foundries because they must divert scarce, specialized design resources from higher volume/profit, opportunities.

• Commercial ASIC foundries tailor their processes and design rules toward applications that are typically used in less strenuous environments over shorter lifetimes.

• Commercial ASIC foundries do not always characterize processes and provide models for the mil temp range.


ACME

SSED

Program Goal:

Establish the tools, knowledge and foundry agreements needed to provide U.S. defense programs with an

affordable, portable & reliable access path to commercial mixed-signal ASIC foundries.

Subgoal:

Demonstrate this capability with a pathfinder IC design that is implemented in one or more commercial foundries & has been

successfully ported between foundries


ACME

SSED

Boeing ACME-Related Productivity EnhancementsBoeing ACME-Related Productivity EnhancementsBoeing ACME-Related Productivity EnhancementsBoeing ACME-Related Productivity Enhancements

Cadence - Virtuoso Custom Router

Cadence - Virtuoso Custom Router

Automated Analog RoutingAutomated Analog Routing

NeoLinear - NeoCellNeoLinear - NeoCell

Automated Analog Placement & RoutingAutomated Analog

Placement & Routing

Prolific - ProGenesisProlific - ProGenesis

Automated Digital Library Migration

Automated Digital Library Migration

Barcelona DesignBarcelona Design

Optimized Cell DesignsOptimized Cell Designs

Boeing - Cell MinerBoeing - Cell Miner

Cell LibrarianCell Librarian

Boeing Soft CellsBoeing Soft Cells

Automated Sub-Cell Design & Layout

Optimization

Automated Sub-Cell Design & Layout

Optimization

NeoCAD/Ultra-Syn/NeoRFNeoCAD/Ultra-Syn/NeoRF

Automated RF Design Optimization, Routing, and

Layout - Boeing is Commercialization

Demonstrator

Automated RF Design Optimization, Routing, and

Layout - Boeing is Commercialization

Demonstrator Potential

Commercialization Path

Potential Commercialization

Path


ACME

SSED

Impact on Design Flow Impact on Design Flow

Detailed Design

StartDevelop

Requirements

P-Cells

System Design

MATLAB,Mathcad ...

Mentor Flow

AVHDL

Design &Schematics

Composer

Simulation

Spectre

SpectreSVerilog

ATS

Statistical Analysis

RF Simulation

Floor Planning

DeviceModels

SSED CellLibrary Access

CellMiner

DesignOptimization

NeoCircuit

Topologies

DesignOptimization

Barcelona

Cell Library

Placement

Virtuoso XL

Route

VCR

NeoCell

CCARParasitic

Extraction

Diva

BackAnnotation

Composer

DRC

Diva

DesignRules

LVS

Diva LVS

Netlist

Netlist

GDSII

ComplianceMatrix

Checklist

Tapeout

Fabrication

Package

TestUpdate Library

MS Access

Soft Cells

BiasNet ...

TechnologyFiles

Detailed Design

StartDevelop

Requirements

P-Cells

System Design

MATLAB,Mathcad ...

Mentor Flow

AVHDL

Design &Schematics

Composer

Simulation

Spectre

SpectreSVerilog

ATS

Statistical Analysis

RF Simulation

Floor Planning

DeviceModels

SSED CellLibrary Access

CellMiner

DesignOptimization

NeoCircuit

Topologies

DesignOptimization

Barcelona

Cell Library

Placement

Virtuoso XL

Route

VCR

NeoCell

CCARParasitic

Extraction

Diva

BackAnnotation

Composer

DRC

Diva

DesignRules

LVS

Diva LVS

Netlist

Netlist

GDSII

ComplianceMatrix

Checklist

Tapeout

Fabrication

Package

TestUpdate Library

MS Access

Soft Cells

BiasNet ...

TechnologyFiles

ACMEACME

ACMEACME ACMEACME

ACMEACME

ACMEACME

DeliverDeliver

Cadence Flow Shown

Cadence Flow Shown


ACME

SSED

NeoCad ProgramNeoCad Program

Chord-RF:Behavior Level MOR

Task 2.2(CMU)

“Hints” fromCircuit Synthesis

(Neolinear)

NeoRFTM :Parasitic Aware Physical Synthesis

Task 3.1, Task 3.2 (Neolinear)

Verified Layout

VHDL-AMSSpecification(e.g., RF ADC)

Behavioral AMS Modelfor Use in System Design(CMU, MIT, Neolinear)

BehaviorMOR:Task 2.2

(CMU, Neolinear)

Module Generation

Device LevelGeometry

Device / Cell / Block LevelInterconnect Parasitics

Layout

Intelligent Parasitic Backannotation(CMU, Neolinear)

UltraSYN Synthesis System: Task 4

Sp

ice,

AM

S P

aras

i tic

ou

t pu

tM

icro

c osm

CharacterizationLayouts (Boeing)

NeoCircuit-HSTM: Parasitic AwareHierarchical Circuit Synthesis

Task 3.1 (Neolinear)

ATSS (Automatic TopologySelection System): Task 3.3

(CMU, Neolinear)

FastWave:Full-wave 3D Solver

Task 1(Microcosm, MIT)

FastWave-MOR:Circuit Level MOR

Task 2.1(MIT,CMU, Microcosm)

Parasitic Information


ACME

SSED

Digital Cell Library Migration - ProlificDigital Cell Library Migration - Prolific Digital Cell Library Migration - ProlificDigital Cell Library Migration - Prolific

Migrates up to 400 cells in 8 - 12 hr

Migrates up to 400 cells in 8 - 12 hr

ProGenesisProGenesis GDSIIGDSIISPICE NetlistSPICE Netlist

ProlificProlific

Global Place & Route

Global Place & Route

ProGenerate

Device Generators

ProGenerate

Device Generators

ProGen

Detailed Place & Route,

Compaction, Post-Process

ProGen

Detailed Place & Route,

Compaction, Post-Process

ProMigrateProMigrate

GDSIIGDSII GDSIIGDSII

Digital Cell

Library


ACME

SSED

SPICE Netlist

&Placement

SPICE Netlist

&Placement

VCRVCR

Cadence Virtuoso Custom Router (VCR)Cadence Virtuoso Custom Router (VCR)Cadence Virtuoso Custom Router (VCR)Cadence Virtuoso Custom Router (VCR)

GDSIIGDSII

FoundryFoundryTechnologyTechnology

FilesFiles


FilesFiles

• Automatic Cell-Level Routing• Interactive Placement

• Automatic Cell-Level Routing• Interactive Placement

• Can match signal characteristics

• Coax and Differential Routing• Can control crosstalk• Critical Net Pre-routing


• Coax and Differential Routing• Can control crosstalk• Critical Net Pre-routing


ACME

SSED

SPICE NetlistSPICE Netlist NeoCircuitNeoCircuit

NeoLinear ToolsNeoLinear ToolsNeoLinear ToolsNeoLinear Tools

NeoCellNeoCell GDSIIGDSII


FilesFiles


FilesFiles

• Device Sizing Optimization

• In Development

• Device Sizing Optimization

• In Development

• Auto Analog Place & Route

• RFP Issued

• Auto Analog Place & Route

• RFP Issued

Sized NetlistSized Netlist

• Any Topology• Any Topology

DUTDUT

User’s Test Bench

User’s Test Bench

NeoLinear and Cadence have a new agreement allowing Cadence to Distribute and

Support NeoCell


• Coax and Differential Routing

• Can control crosstalk• Preserves Placement

Symmetry


• Coax and Differential Routing

• Can control crosstalk• Preserves Placement

Symmetry


ACME

SSED

Barcelona DesignBarcelona DesignBarcelona DesignBarcelona Design

OptimizerOptimizer

• Optimizer is designed specifically for each topology offered

• Tool runs at Barcelona Design Facility - no maintenance required

• Quick simulation• All parameters available without test

bench design

• Optimizer is designed specifically for each topology offered

• Tool runs at Barcelona Design Facility - no maintenance required

• Quick simulation• All parameters available without test

bench designWeb Pages

• Process Selection

• Topology Selection

• Requirements

• Simulation Results

FoundryTechnology

Files

FoundryTechnology

FilesTopology Library

Topology Library

Web-Based Interface

Web-Based Interface

Sized Netlist

and

GDSII

Sized Netlist

and

GDSII


ACME

SSED

Barcelona Design CostsBarcelona Design Costs Barcelona Design CostsBarcelona Design Costs

Typical manual

design cost:

$8400

Typical manual

design cost:

$8400

• A design run is defined as a “Design Click”

• Op Amp trades may involve multiple Design Clicks

• An annual $20k subscription allows unlimited Design Clicks


ACME

SSED

Boeing Cell Librarian and Boeing Cell Librarian and Design Synthesis ToolsDesign Synthesis Tools

Boeing Cell Librarian and Boeing Cell Librarian and Design Synthesis ToolsDesign Synthesis Tools

CellMiner LibrarianCellMiner LibrarianBiasNet Soft CellBiasNet Soft Cell

• CapNet Soft Cell in progress

• HV XSTR Soft Cell planned

• WSU current mirror soft cell

• Pursuing commercialization

• CapNet Soft Cell in progress

• HV XSTR Soft Cell planned

• WSU current mirror soft cell

• Pursuing commercialization

Organizes library & promotes re-useOrganizes library & promotes re-use

Unit Resistor Sizing & Placement OptimizationUnit Resistor Sizing & Placement Optimization


ACME

SSED

BiasNet & CapNet Soft Cell Test Structures - Validates Sensitivity-

Weighted Optimization

BiasNet & CapNet Soft Cell Test Structures - Validates Sensitivity-

Weighted Optimization

Pathfinder ConceptPathfinder Concept Pathfinder ConceptPathfinder Concept

Barcelona Design & Low-Offset Amp

Characterization Cells

Barcelona Design & Low-Offset Amp

Characterization Cells

Bump Bond Corner Test Structures - Six Corners

Bump Bond Corner Test Structures - Six Corners

Georgia Tech. Reliability Test Structures

Georgia Tech. Reliability Test Structures

ACME A Reliability Test Structures

ACME A Reliability Test Structures

Optional Scribe Line to Enhance Test OptionsOptional Scribe Line to Enhance Test Options

F-22 PSM ChannelF-22 PSM Channel

HV Transistor Array - Demonstrates

Migration Avenue from HV to LV

Processes

HV Transistor Array - Demonstrates

Migration Avenue from HV to LV

Processes

250 mil x 250 mil

250 mil x 250 mil

AMI C5N 0.5 um, 2 AMI C5N 0.5 um, 2 poly, 3 metalpoly, 3 metal

AMI C5N 0.5 um, 2 AMI C5N 0.5 um, 2 poly, 3 metalpoly, 3 metal

Commercial-Foundry Flexible Mixed Signal ASIC Design Center ACME SSED Foundry-Portable, Mixed-Signal...

Documents

Transcript of Commercial-Foundry Flexible Mixed Signal ASIC Design Center ACME SSED Foundry-Portable, Mixed-Signal...