EUROPEAN LSI DESIGN ANDENGINEERING CENTRE (ELDEC)

ENGINEERING SUPPORTFOR SYSTEM-ON-CHIP (SOC)

www.toshiba-components.com/ASIC

Toshiba's European LSI Design and Engineering Centre (ELDEC)was founded as a strong and sustainable contributor to theongoing semiconductor operations of Toshiba Electronics EuropeGmbH (TEE). ELDEC’s mission is to meet the needs of Europeancustomers and proactively address market requirements throughthe development and delivery of innovative, high-quality, siliconproducts with minimum time-to-market.

ELDEC provides TEE’s ASIC & Foundry customers with integrated,custom, system-on-chip (SoC) solutions; develops Toshiba’s ownapplication specific standard products (ASSPs) and associatedembedded software; and provides application support for thecompany’s comprehensive family of microcontrollers and ASSPs.

Operating from TEE’s European headquarters in Düsseldorf,Germany, ELDEC employs over 100 highly skilled local engineers.These engineers are involved in all aspects of LSI developmentincluding hardware and software design, creation of IP buildingblocks and SoC implementation. ELDEC’s engineers also createSoC-based reference systems and specify and produce designand software tools.

ELDEC’s competencies cover high-density, complex ASICs, ASSPsand systems. Target applications include telecommunications,networking, multimedia and automotive.

ELDEC is committed to delivering high-quality solutions andservices to its customers on time and within budget. To continuallyimprove project execution ELDEC employs 6 Sigma methodologiesfor all core activities. By establishing specific competencies,producing and exchanging hard and soft IP and sharing itsknow-how, ELDEC makes a significant contribution to Toshiba'sworldwide design and engineering activities.

Knowledge Management is the key to ELDEC’s success insupporting both customer and in-house developments. ThroughKnowledge Management processes and investment in specificlocal competencies - including sophisticated design reviewstages - ELDEC delivers ‘right first time’ silicon, minimisingtime-to-market and reducing development time and cost.

The ELDEC Design Methodology Development team drivescontinuous design platform innovation for deep sub-microndesigns. The team also defines and supports the latest technologydesign tools and methodologies. ELDEC’s focus on KnowledgeManagement also helps Toshiba and its customers to develop anearly understanding of market opportunities and future technologies.

High quality technical solutions and support encompass pre-salesand design stages, prototyping and final manufacture. Fullintegration with Toshiba’s global research and developmentorganisations provides access to technical expertise at otherToshiba engineering centres including those in Japan, Taiwanand the United States. Initiatives designed to optimise solutionsat a local level include strong European relationships with leadingEDA vendors.

ELDEC – LOCAL EXPERTISEFOR THE EUROPEAN MARKET

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From RTL-to-GDS and on into final packaging and tape-outELDEC’s Implementation and Design Services (IDS) cover everyaspect of chip design, implementation and production.

ELDEC can support integrated ICs with gate counts ranging from50,000 to 15 million based on Toshiba’s leading edge advancedCMOS processes at 130nm, 90nm, 65nm and 40nm processnodes.

Services covered by ELDEC IDS include:Consultancy for all RTL design issuesSynthesisChip layoutIntegration of mixed-signal IPComplex memory integrationLow power designDesign for test (DFT)Test pattern generationAt-speed tests

Special I/O tests including:DDR2/3S-ATAStatic timing analysis (STA)Yield optimisation

Package selection and design including:Cost, performance and thermal considerationsMulti-chip module (MCM) and System-in-package(SiP) solutionsI/O assignmentSubstrate design support including signal integrity designSupport for quality audit (QA) procedures

All aspects of ELDEC support in Europe are coordinated via localproject management teams, backed by links to both local andglobal experts.

Project management services continue through into successfulmass production and ensure reliable schedule planning whileproviding the benefit of a single point of contact for all technicalqueries, advice and guidance.

Project managers provide customers with high levels of visibilityof project status through ‘live’ tracking documentation. Thisincludes status updates, risk management procedures andaction identification and ownership.

Toshiba’s leading edge one pass design flow delivers minimumturn-around-time (TAT) implementation with the lowest possiblerisk through early quality checks, rapid prototyping and single-passfinal implementation.

For maximum customer benefit Toshiba aims to become involvedas early as possible in the planning and prototyping phase.

Toshiba’s ELDEC specialists can provide early design and conceptquality checks in areas such as pin-out, clock architecture andkey design constraints. Several prototyping iterations may occurduring this phase to ensure that the final implementation can beperformed in a single pass.

IMPLEMENTATION ANDDESIGN SERVICES (IDS)

TOSHIBA’S IP LINEUP

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As advanced CMOS processes enable ever more sophisticatedSoC designs, the demand for linking core digital processingfunctionality with the real ‘analogue’ world becomes moreimportant. As a result, mixed-signal and analogue IntellectualProperty (IP) building blocks have become a critical factor inefficient SoC and ASSP development.

ELDEC’s experience and expertise has supported the seamlessintegration of complex analogue and mixed-signal IP cores into alarge number of SoC designs. As well as local expertise, ELDECcan draw on the considerable resources and mixed-signal IPexpertise at other Toshiba research and development centresaround the world.

Through ELDEC Toshiba also supports customers looking todevelop their own mixed-signal solutions. ELDEC can providea Process Design Kit (PDK) for the required technology nodeas well as evaluation, verification and qualification support. Thisensures the IP meets the same strict quality and stability criteriaas the company’s own IP.

Whether the IP is developed by ELDEC or starts life with acustomer or third party design house it is subjected to the samerigorous design verification methodologies. This includes fulltesting of the IP in target applications and validation of theinteroperability and system level quality of interface systemIP using application boards.

Toshiba ELDEC support for customer SoC development inEurope is provided via Toshiba Electronics Europe’s ASIC &Foundry Business Unit. Working with ELDEC this business canevaluate and develop product requests, perform technical andcommercial feasibility studies, define system architectures andprovide access to IP.

Benefits include access to:Advanced 130nm, 90nm, 65nm and 40nm CMOS processesA comprehensive range of mixed-signal and analogue IPDigital IP including processors and coresLocal project managementResources for early identification of IP and other technologiesfor future applications and marketsSkilled engineers with wide-ranging experience in all areas ofASIC design, implementation and system architecture definition.

Unlike third party design houses, Toshiba’s Integrated DeviceManufacturer (IDM) model allows the company to provide total SoCcompetence. Customers can deal with a single organization frominitial IP sourcing to design, through testing and on into finalmanufacture.

As an IDM, Toshiba has intimate involvement with the underlyingprocess technology and rapid access to production feedback. Thisensures that designs can be optimized and customized with finalproduction in mind from the very beginning. What’s more, all of thehard macro IP cores developed by Toshiba’s engineering teams areguaranteed to be fully compatible and optimized for the company’sadvanced SoC processes. This guarantee also applies to third partyarchitecture-based IPs provided through the Toshiba channel.Such IPs are subject to exactly the same rigorous qualificationand verification procedures.

For the customer, the IDM model also eliminates the blurring of theboundaries of responsibility. Toshiba’s responsibility encompasseseverything from IP to final production and yield optimization. Thisgives customers the peace of mind that they are working with acompany that shares their objective of delivering successful volumesilicon in the shortest possible TAT.

To speed up and simplify the implementation of SoCs basedon the company’s advanced CMOS processes; Toshiba offersa variety of development handover models including:

ASIC MODELRTL handover with synthesis, place-and-route, and verificationby Toshiba or gate-level handover with synthesis by customerand layout implementation by Toshiba

SEAMLESS “HYBRID” MODELSMixed-signal IP/block development by customer based onPDK, and chip-level integration by Toshiba (RTL handoveror gate-level handover)

FULL COT (CUSTOMER OWN TOOLING) MODELPhysical data handover (GDSII) by customer.

In each handover model ELDEC engineers are available toprovide full technical support, advice and guidance relatingto the integration-, QA- and testing of the FPD IP.

MIXED-SIGNAL IP

SUPPORT FOR CUSTOMER SOCS

SOC HANDOVER MODELS

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ELDEC creates integrated, high-performance ASSPs forautomotive, telecommunications, multimedia and industrialapplications. Successful application-specific designs includeSoCs for vehicle instrument clusters, ABS subsystems andembedded mobile peripherals for cellular handsets.

ELDEC support for ASSP implementation starts with marketresearch and product planning. System architects and projectmanagers then create system specifications and project plansencompassing all aspects of LSI product development andsupport, including:System design and simulationCircuit designConcept and design for testSilicon implementationPower and EMC optimizationPackage planningVerification and validationDevice characterizationDatasheet creationSoftware supportMass production supportContinuous quality and reliability control

Embedded hardware expertise covers high-speed interfaces upto 10Gbps and industry- and de-facto-standard interfaces suchas MIPI®, HDMI, PCI, USB, and serial ATA.

For mobile telecoms applications ELDEC develops mobileperipheral SoCs for camera, display and audio-video subsystems.These SoCs enrich the functionality of cellular phone platformsand support enhanced, ‘ready-to-go’ embedded connectivity.

In the automotive arenaELDEC develops ASSPs thatsupport CAN, MediaLB™,APIX® and FlexRay™ solutions.Automotive expertise includesdevelopment of graphicsubsystems deployed ininstrument cluster andinfotainment applications.

ELDEC CPU core integration and CPU sub-system developmentincorporates a wide variety of embedded ARM cores, embeddedMIPS cores and Toshiba’s own Media embedded Processor(MeP) technology.

ELDEC’s embedded software experience includes MPEG-2 andMPEG4 firmware, driver software, graphic controller algorithms,graphic accelerators, image recognition firmware and middleware.Embedded RTOS expertise covers Embedded Linux, KhronosAPI and NoTA. ELDEC teams also develop software for homeappliances, motor control and vehicle information systems.

Through ELDEC Toshiba provides turnkey reference designs,FPGA prototyping, evaluation boards, documentation and otherservices to speed the evaluation and implementation of ToshibaASSPs and microcontrollers in customer applications.

ELDEC also provides technical and application support for Toshiba’scomprehensive family of standard microcontrollers and micro-processors, including the latest devices based on ARM® cores.

In support of its ASSPdevelopment programsToshiba contributes to andparticipates in standardsbodies and has a numberof relevant quality engineeringcertifications. These include

TS16949 for automotive project management and development,SIL-1 for safety critical systems such as ABS, and conformanceand interoperability approvals for communication standards suchas DVB, Bluetooth and MIPI.

SUPPORT FOR ASSPS

Global Technical Market Research

Product Concept Definition

Promotion activities / Sales support

Technical Customer Interface

System design and simulation (HW/SW)

Design for test

VLSI design, implementation and test

IP design (digital and mixed signal)

Quality Management(KM, KCR, QS9000, TS16949)

Standardization (contributing and consuming)- MIPI, MPEG, OpenGL, OpenVG, ARM)

PCB design (test & reference)

VLSI and SW validation

Conformancy and interoperability testing

Device characterization

Application support HW & SW

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TOSHIBA ASSP SCOPE OF WORK

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MIPI® word marks and logos are servicemarks owned by MIPI Alliance, Inc.

GERMANYTOSHIBA ELECTRONICS EUROPE GMBH

CENTRAL EUROPEAN SALES

Hansaallee 181, 40549 DüsseldorfTel.: +49 (0211) 5296 0Fax.: +49 (0211) 5296 400

UKTOSHIBA ELECTRONICS EUROPE GMBH,

UK BRANCH

Delta House, The Crescent,Southwood Business Park,Farnborough, Hampshire GU14 ONLTel: +44 (0870) 0602370Fax: +44 (01252) 530250

FRANCETOSHIBA ELECTRONICS EUROPE GMBH,

FRANCE BRANCH

Les Jardins du Golf, 6 rue de Rome,F-93561 Rosny-Sous-Bois, Cédex, ParisTel.: +33 (1) 48 12 48 12Fax.: +33 (1) 48 94 51 15

SPAINTOSHIBA ELECTRONICS EUROPE GMBH,

SPAIN BRANCH

Parque Empresarial, San Fernando, EdificioEuropa, 1ª Planta, E-28831 MadridTel.: +34 (91) 660 6798Fax.: +34 (91) 660 6799

ITALYTOSHIBA ELECTRONICS EUROPE GMBH,

ITALY BRANCH

Centro Direzionale Colleoni, Palazzo PerseoIngresso 3, Via Paracelso 14, I-20041Agrate Brianza, MilanTel.: +39 (039) 68701Fax.: +39 (039) 6870205

SWEDENTOSHIBA ELECTRONICS EUROPE GMBH,

SWEDEN BRANCH

Gustavslundsvägen 18, 5th Floor,S-167 15 BrommaTel.: +46 (08) 704 0900Fax.: +46 (08) 80 8459

TOSHIBA is continually working to improve the quality and reliability of its products.Nevertheless, semiconductor devices in general can malfunction or fail due to their inherentelectrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, whenutilising TOSHIBA products, to comply with the standards of safety in making a safe design forthe entire system, and to avoid situations in which a malfunction or failure of such TOSHIBAproducts could cause loss of human life, bodily injury or damage to property. In developing yourdesigns, please ensure that TOSHIBA products are used within specified operating ranges asset forth in the most recent TOSHIBA products specifications. Also, please keep in mind theprecautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or"TOSHIBA Semiconductor Reliability Handbook" etc..

The Toshiba products listed on this document are intended for usage in general electronicsapplications (computer, personal equipment, office equipment, measuring equipment,industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended norwarranted for usage in equipment that requires extraordinarily high quality and/or reliability or amalfunction or failure of which may cause loss of human life or bodily injury ("UnintendedUsage"). Unintended Usage include atomic energy control instruments, airplane or spaceship

instruments, transportation instruments, traffic signal instruments, combustion controlinstruments, medical instruments, all types of safety devices, etc. Unintended Usage of Toshibaproducts listed in this document shall be made at the customer's own risk. The productsdescribed in this document may include products subject to the foreign exchange and foreigntrade laws.

The information contained in this document is presented only as a guide for the applications ofour products. No responsibility is assumed by TOSHIBA for any infringements of patentsor other rights of the third parties which may result from its use. No license is granted byimplication or otherwise under any patent or patent rights of TOSHIBA or others.

Copyright and published by Toshiba Electronics Europe GmbH; Hansaallee 181- 40549Düsseldorf Handelsregister Düsseldorf HRB 22487; Geschäftsführer: Ryoichi Shikama;Amtgericht Düsseldorf

Products or company names mentioned herein are Trademarks of their respective owners.The information contained herein is subject to change without notice.

www.toshiba-components.com/ASIC

Toshiba handles its own process development, and has its own,fully controlled wafer fabs, packaging and test facilities. SoCs andASSPs created by ELDEC are manufactured at Toshiba’s 300mmwafer-fabrication facilities in Oiita and Nagasaki. The companycontinues to invest in technology and fab capacity to ensurereliable support of customer requirements and the needs of itsown ASSP programme.

Toshiba is able to commercialize leading-edge CMOS processesfor advanced ICs one to two years ahead of the industry, to thedirect benefit of our 300mm manufacturing customers. By leadingthe industry in producing high-performance system-level ICs in90nm since 2003, plus early production of 65nm in 2006—withdevelopment of 40 and 28nm process technologies underway—Toshiba is able to stay ahead of the yield curve and is continuallysolving DFM complexities to enhance performance, streamlinetime-to-revenue and reduce IC cost.

MANUFACTURINGCOMPETENCIES, SUPPLYCHAIN MANAGEMENT ANDLOGISTIC SUPPORT

Oiita Fab Nagasaki Fab