CMOS Technology and Logic Gates - Computation Structures Group
CMOS Logic Gates
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Transcript of CMOS Logic Gates
CMOS Logic gates
CMOS NAND Logic//CMOS logic gatesmodule fet_nand2(out, in_a,in_b);Input in_a,in_b;output out;wire wn// this wire connects the series nmos switchesSupply1 vdd;Supply0 gnd;pmosp1 (vdd,out,in_a);pmosp2(vdd,out,in_b);nmosn1(gnd,wn,in_a);nmosn2(wn,out,in_b)endmodule
CMOS NOR Logic
module fet_nor2(out, in_a,in_b);input in_a,in_b;output out;wire wp// this wire connects the series pmos switchessupply1 vdd;supply0 gnd;pmosp1 (vdd,wp,in_a);pmosp2(wp,out,in_b);nmosn1(gnd,out,in_a);nmosn2(gnd,out,in_b)endmodule
D Latchmodule d_latch (q,q_bar,d);input d;output q,q_bar;reg q,q_bar;always@(d)begin#(t_d)q=d;#(t_d)q_bar=~d;endendmodule
Gated D-latch with enable control
D latch ( structural description)module d_latch(q,q_bar,d,enable);input d,enable;output q,q_bar;reg q,q_bar;always @ (d and enable)begin #(t_d)q=d;#(t_d)q_bar = ~d;endendmodule