By: Engr. Irfan Ahmed Halepoto

BJT Device Models

Modelling & Simulation of Semiconductor Devices

LECTURE#06

BJT Device Models• The primary function of a model is to predict the

behaviour of a device in particular operating region.• Small-signal models

– Hybrid (h) Parameter Model– Hybrid-pi model

• Large-signal models– Ebers–Moll model: Voltage & current control model– Gummel–Poon model : charge-control model

H-Parameter Model• A model used to analyze linear BJT

circuits. • H-parameter is based on input

current and output voltage as independent variables, – rather than input and output

voltages, which is related to the hybrid-pi model.

• This two-port network is particularly suited to BJTs as it lends itself easily to the analysis of circuit behaviour, and may be used to develop further accurate models.

H-parameter model of NPN BJT

Hybrid parameters (or) h – parameters• If the input current i1 and output Voltage V2 are takes as independent

variables, the input voltage V1 and output current i2 can be written as

V1 = h11 i1 + h12 V2

i2 = h21 i1 + h22 V2

• Four hybrid parameters h11, h12, h21 and h22 are defined as follows.

h11 = [V1 / i1] with V2 = 0 (Input Impedance with output part short circuited).

h22 = [i2 / V2] with i1 = 0 (Output admittance with input part open circuited).

h12 = [V1 / V2] with i1 = 0 (reverse voltage transfer ratio with input part open circuited).

h21 = [i2 / i1] with V2 = 0 (Forward current gain with output part short circuited).

Hybrid-pi model• The hybrid-pi model is a popular

circuit model used for analyzing the small signal behavior of BJT and FET.

• The model can be quite accurate for low-frequency circuits.

• Hybrid-pi model can also be adapted for higher frequency circuits with the addition of appropriate inter-electrode capacitances and other parasitic elements.

Simplified, low-frequency hybrid-pi model

Ebers–Moll Model • The classic mathematical model for the bipolar junction transistor

is the Ebers-Moll model formulated by J. J. Ebers and J. L. Moll from Bell Laboratories in the early 1954.

• Ebers-Moll model also known as “Coupled Diode Model”• The Ebers-Moll model provides an alternative view or

representation of the voltage-current equation model. • Model includes configurationally series resistances, depletion

capacitances and the charge carrier effects.

Ebers – Moll model Designing• Ebers–Moll model for pnp

transistor involves two ideal diodes placed back to back with saturation current

• Ieo & Ico and two current dependent controlled sources shunting the ideal diodes. Transistor currents and Voltages direction

Ebers-moll model for a PNP transistor

Ebers – Moll Model Equation • By applying KCL to emitter node we get • IE + αI IC = I or IE = I – αI IC or IE = - αI IC + I

• IE = - αI IC + I0 (e VE / VT – 1)

• IE = -αI IC – IE0 (e VE / VT – 1) ................................. (1)

• This model is valid for both forward & reverse static voltages applied across the transistor junction.

• In the above model, by making the base width much large than the diffusion length of minority carriers in the base, all minority carriers will recombine in the base and none will survive to reach the collector.

Ebers – Moll Model Equation • Let us see the equations of Ic and IE from Ebers – moll model.

Applying KCL to the collector node, we get• αN IE + IC = I

• IC = I – αN IE

• IC = - αN IE + I ; Where, I is diode current.

• IC = - αN IE + I0 (e Vc / VT – 1)

• Note: I0 = - IC0 ; Where , I0 is the magnitude of reverse saturation current .

• IC = - αN IE – ICO (e VC / VT ) ……………………………….. (2)

•

Ebers – Moll model Parameters • General expression for collector current IC of a transistor for any

voltage across collector junction Vc and emitter current IE is

IC = -αN IN – ICO (e VC / VT – 1) • Subscript N to α indicates that we are using transistor in a normal

manner. • When we interchange the role of emitter and collector we operate

transistor in a inverted function. In such case current and junction voltage relationship for transistor is given by

IE = - αI IC – IEO (e vE / VT – 1) • Subscript I to α indicates that we are using transistor in a inverted

manner, αI is the inverted common – base current Gain.

IEO: The emitter junction reverse saturation current.

VE : The voltage drop from p – side to N – side at the emitter junction.

Forward Characteristics of the npn Transistor• The total current crossing the emitter-base junction in

the forward direction is described as (equation-1)

Where IES represents the reverse saturation current of the base-emitter diode.

Collector current can be rewritten in terms of IES as (equation-2)

Forward common-base current gain αF represents the fraction of the emitter current that crosses the base and appears in the collector terminal.

Equation (1)

Equation (2)

Reverse Characteristics of the npn Transistor• For the reverse direction, the current crossing the collector-base

junction is described as (equation-3)

The new parameter ICS represents the reverse saturation current of the base-emitter diode. The emitter current can be rewritten in terms of ICS as (equation-4)

The reverse common-base current gain αR represents the fraction of the collector current that crosses the base from the emitter terminal.

Equation (3)

Equation (4)

Ebers-Moll Model for the npn Transistor• Complete Ebers-Moll equations are obtained by combining

Equations 1-4.

This model contains four parameters, IES, ICS, αF , and αR. From the definitions of IES and ICS, we can obtain the important auxiliary relation

Equation (5)

which shows that there are only three independent parameters in the Ebers-Moll model, just as in the transport formulation. The base current, given by iB = iE − iC, is

Equation (6)

Equation (7)

Equivalent Circuit Representations for the Ebers-Moll Models… npn transistors

Equivalent Circuit Representations for the Ebers-Moll Models… pnp transistors

Ebers–Moll Operating Characteristic

BJT Ebers-Moll Model SPICE model: DC model

• SPICE uses the Ebers-Moll transistor model • You know the following BJT equations:

Ebers-Moll model Versions

Gummel–Poon charge-control model• The Gummel–Poon model is a detailed charge-controlled

model of BJT dynamics, which has been adopted and elaborated by others to explain transistor dynamics in greater detail than the terminal-based models typically do .

• This model also includes the dependence of transistor β-values upon the dc current levels in the transistor, which are assumed current-independent in the Ebers–Moll model.

• A significant effect included in the Gummel–Poon model is the DC current variation of the transistor βF and βR.

– When certain parameters are omitted, the Gummel–Poon model reverts to the simpler Ebers–Moll model.

• The Gummel–Poon model and modern variants of it are widely used via incorporation in the SPICE.

Gummel-Poon Constructional equivalent

Fig.1a: physical situation for a bipolar transistor, neglecting the parasitic pnp transistor.

CMU: Common-base output capacitance CPI: Common-emitter input capacitance

Gummel-Poon Schematic equivalent • Fig.1(b) shows the large signal schematic of the Gummel-Poon model. • It represents the physical transistor, a current-controlled output current

sink, and two diode structures including their capacitors.

Gummel-Poon large signal schematic of the bipolar transistor

AC small signal schematic of the bipolar transistor• From fig.1(b), small signal schematic for high frequency simulations can

be derived. • This means, for a given operating point, the DC currents are calculated

and the model is linearized in this point (fig.1c). Such a schematic is used later for SPICE S-parameter simulations.

• It must be noted that the schematic after fig.1(c) is a pure linear model.

Fig.1(c) AC small signal schematic of the bipolar transistorNOTE: XCJC effect neglected.

Sub-circuit schematic with parasitic PNP• In order to make the presentations of the schematics complete,

fig.1(d) depicts the sub-circuit used for modeling a npn transistor including the parasitic pnp.

Fig.1(d): sub-circuit schematic when including the parasitic pnp

The Gummel-Poon Model Equations• In order to make them better understandable, we

assume no voltage drops at RB, RE and RC,– i.e. vB'E'=vBE and vB'C'=vBC.

• TEMPERATURE VOLTAGE:• BASE CURRENT:• COLLECTOR CURRENT:• BASE RESISTOR:• SPACE CHARGE AND DIFFUSION CAPACITORS:

Gummel-Poon Model EquationsTemperature Voltage

Base Resistor

Space charge & Diffusion capacitors

Gummel-Poon Model EquationsBase Current Collector Current

The npn Gummel-Poon Static Model

C

E

B

B’

ILC

ILEIBF

IBRICC - IEC =

IS(exp(vBE/NFVt

- exp(vBC/NRVt)/QB

RC

RE

RBB

Gummel Poon npn Model EquationsIBF = ISexpf(vBE/NFVt)/BF

ILE = ISEexpf(vBE/NEVt)

IBR = ISexpf(vBC/NRVt)/BR

ILC = ISCexpf(vBC/NCVt)

QB = (1 + vBC/VAF + vBE/VAR )

{½ + [¼ + (BFIBF/IKF + BRIBR/IKR)]1/2 }

BJT CharacterizationReverse Gummel

+

-

iE

RC

iB

RE

RB

vBCxvBC

vBE

+

+

-

-

vBEx= 0 = vBE + iBRB - iERE

vBCx = vBC +iBRB +(iB+iE)RC

iB = IBR + ILC = (IS/BR)expf(vBC/NRVt)

+ ISCexpf(vBC/NCVt)

iE = RIBR/QB =

ISexpf(vBC/NRVt)

(1-vBC/VAF-vBE/VAR )

{IKR terms}-1