SystemEach system will have inputs and output. Example of an input can be battery which is connected to a circuit. The output is some entity which we want to measure in a circuit element. In the example below, the input is the battery supplying voltage. Since, we are interested in current flowing in the resistor, the output is current.

Figure 1.1:Resistance

The process of predicting the output for given inputs in a electronic system is circuit analysis. The inputs can be of various forms e.g, mic converts audio to electrical signal. Alternatively, the output can also be a non-electrical entity e.g., speaker converting the electrical signal to audio. In general the electronic system will have multiple inputs (can be signal inputs or power sources) and multiple outputs. We need to understand the basic elements to do circuit analysis.

Passive elementsMost of the Circuit elements have at least two leads (electrical terminals). They are characterized by voltage across the terminals and current flowing through the device (see Fig.2.1); this is V-I characterization of device.

Figure 2.1:Simple element

Resistance:Across this element, if we applied a voltage source and observe the current, then we will observer that, that is,, where R is the resistance measured in Ohms (Fig.1.1,2.2).

Figure 2.2:Graph of V vs I for a Resistance

Higher the value of R, larger the voltage required to achieve the same current. Voltage proportional to current - is Ohm's law (It was deduced heuristically by experiments for metals, byGeorge Simon Ohm). For lamp, this law is not true, as with increase in current, temperature of bulb increases, causing the increase in resistance. Hence Ohms law is not strictly true for lamp. But for most of the practical purposes and for this course the Ohm's law holds true for the resistive circuit elements. The resistive elements (resistances) can be fixed or variable. Commonly use resistor types are carbon film and wire wound. The example of variable resistor is potentiometer.For a material with lengthand cross-sectional area, the resistance will be, whereis specific resistivity (property of material). Inverse of resistance is conductance., measured in mhos or Seimens.

Figure 2.3:Bulb as a resistive load

In Fig.2.4, property of interest is resistance between A and B. It is dependent on details of wire, connector, filament, material, and shape. It can be abstracted as simple resistance (Fig.2.4).

Figure 2.4:Bulb abstracted as a simple resistance

Inductance:It another important basic circuit element. Current flowing in a wire causes generation of magnetic field intensity ().is independent of material medium surrounding the current carrying wire. Theleads to magnetic flux density. Hereis absolute permeability of vaccum.is relative permeability of material whereis measured. The flux flowing around wire links with the conducting wire. And if the flux linkage changes it lead to generation of EMF (electromotive force) which try to oppose the change in flux. This means it tries to nullify the change in current.The currentcauses production of magnetic flux.is the EMF of a single turn. Here,. Thus, the total EMF, whereis the number of turns.Defining the inductance -,is inductance and measured in Henry. See the output current of sinusoidalapplied across an inductor in Fig.2.5

Figure 2.5:V and I as function of t for an Inductor

Figure 2.6:Physical Implementation of an inductor

In lumped model, inductance is considered only due to element. The inductance due to wires connecting it to other elements is neglected (Fig.2.6) Analysis of circuit: To find voltage or currents in an element of interest. One can also find voltage and current in all the elements of circuit. Lumped simplified model of resistance, inductance and capacitance.Capacitance:,capacitance. The magnitude of charge on either plate is given by.

Figure 2.7:Symbols for resitance, inductance and capacitance

Lumped model: Shape, material, wire, connectors - effect of each is assumed to be due to single entity shown by the symbols in the diagram. In actual resistance, inductance and capacitance are distributed all across the circuits. For most practical purpose, lumped model- satisfactory.Series and Parallel connections

Figure 2.8:A series connection of resistors

Kirchoff's volatage law: In a circuit, if your start from a point A and tranverses the circuit in any fashion and reaches back to point A, the total sum of potential changes should be zero. This has to be true since, same point cannot have two different potentials.Kirchoff's current law: At any point in the network, total amount of current entering and leaving the point has to be equal to rate of accumulation of charge at the point. Since, in the circuits ordinarily the points where one circuit element is connected to other circuit element (these points are called nodes) do not store charge sum of incoming current has to be equal to sum of outgoing currents.Thus, for series model, we get relations:

Thus equivalent resistance of series connection is. For parallel connection, we get the relations:

Thus, equivalent resistance here is:. Similarly, we calculate equivalent inductance and capacitance for series and parallel cases.

Inductances in series:

Inductances in parallel:

Figure 2.9:Series connection of capacitances

Capacitances in series:

Capacitances in parallel

Inductance of a Solenoid (Coil)

Figure 2.10:A Solenoid diagram showing magnetic circuit path lengths

Define=magnetic circuit path lengthA=magnetic circuit crossectional area.Inductance: (Assuming thatis same in the closed path of length.)

Hereis magnetomotive force (equivalent of electromotive force - EMF in magnetic domain), and fluxis equivalent of current in magnetic domain. The Magnetic reluctance=is then equivalent of resistance in magnetic domain.Linearity: when elemental change in cause, always leads to same elemental change in effect i.e.,, then the system is said to be linear.In general, for a system let inputlead to output, and a small perturbation incauses a small perturbationin output. If perturbationalwasy leads to same perturbation ofin the output irrespective of any, then the system is linear.The implication of the above is that if inputcauses output, andcauses, thenwill cause an output of. This is principal of superposition.

Sources

Figure 3.1:A DC source (Ideal Voltage Source) with a circuit element

Ideal voltage source: Whatever amount of current is drawn from it the voltage at the terminals is always same. Whenever the terminals are short circuited (resistance ofbetween the terminals) the infinite amount of current flows to maintain voltage. This is hypothetical condition, why?

Figure 3.2:Ideal Current Source

Ideal current source: Whatever load or network of elements is connected to source, the current pumped by the source into the load always remains same.Whenever the terminals are open circuits (Terminals are not connected to any thing) the voltage across the terminals becomesto maintain the same amount of current through terminals. This is also hypothetical condition, why?. Can I leave a current source as shown in figure3.3?

Figure 3.3:Current Source left open

In this case, voltage across the terminals will be. Non Ideal Voltage Source:See the circuit in figure3.4. A non ideal voltage source is modeled with an internal resistance of source. Thus battery terminal voltage changes with the load current.

Figure 3.4:Non Ideal Voltage Source

Under no load, i.e. for zero current,. When a load currentflows,. For a new battery, generally,is negligible, and it increases as the battery gets discharged.is a function of electrolyte and terminal materials. Non Ideal Current Source:See the circuit in figure3.5.

Figure 3.5:Non-ideal Current Source

A non ideal current source is modeled by an internal conductancein parallel with the source..From the figure, we see that:. Ideal current source has, i.e.,. Non-ideal voltage source and current source analysis:The source is non-ideal, hence v is not constant. If it is linear circuit,andare linearly related.is cause, andis effect. Thus we get:

Figure 3.6:Battery

(3.1)

(3.2)

Figure 3.7:Model

This equation is equivalent to fig.3.7. Thus a battery can be represented by3.8:

Figure 3.8:Battery Model

Similarly, for a nonideal current source (fig.3.9), if it is linear,(3.3)

(3.4)

For ideal current source,always. Thus.

Figure 3.9:Current Source

Figure 3.10:Current Source Model

In the above, the sources are modeled using ideal voltage (current) sources whose voltage (current) remains constant. We can also havesource whose output can be controlled. These can be used to model certain real life devices (e.g., transistor)We will study transistor later during the course.Dependent SourcesOutput of source depends on some other variable. These are of four types depending on the controlling variable and output of the source.Voltage controlled voltage sources: This is a voltage source whose output can be controlled by changing the controlling voltage(Fig.3.11). This is a voltage amplifier if we consider the VCVS to be a box which takes the input as voltage and then at the output generated the amplified voltage. In the figure, 20 will be the gain of voltage amplifier.

Figure 3.11:Voltage controlled voltage source

Voltage controlled current sources: In case the control variable is voltage and the output of the source is current, it is VCCS. The unit of gain factor (20 in the Fig.3.12) will of siemens. This is transconductance amplifier.

Figure 3.12:Voltage controlled current source

Output current can be modified by changing..Current controlled voltage sources:shown in figure3.13.

Figure 3.13:Current controlled voltage source

This is atransimpedence amplifiersince the ratio of output to input has units of resistance (more general term is impendence). The gain factor for this type of source has units of ohm, measured as. Current controlled current sources (Fig.3.14:A current amplifier, the gain is current gain(dimensionless, as in voltage amplifier).

Figure 3.14:Current controlled current source

Lecture 3: DC Circuit AnalysisA network of passive elements and sources is acircuit.Analysis:To determine currents or voltages in various elements (effects) due to various sources (cause).

Figure 4.1:

In circuit4.1all the time. Expected that all current (voltage) in (across) the elements is constant.

Inductor:(4.1)

impliesconstant.HenceInductors act as a short cicuit for DC inputs. This would not be the case if I put a switch across a source.Capacitor:(4.2)

as(expected),.Thus capacitor acts as open circuit for DC analysis.

Figure 4.2:

The resultant circuit will be as shown in Fig.4.2. Analysis:To find currents in all branches, voltage across all branches.We can use Kirchoff's law (voltage and current). For as many independent equations as number of unknown variables. Solve the simultaneous equations, and get the result.Voltage drop from 'a' to 'b'. Therefore,Current in branch ab in the direction from 'a' to 'b'. Here.Hence:

Note:In a circuit withnodes, the number of brancheswill always be, whereare maximum number of independent closed paths possible in the circuit.Hence, we can always formequations using Ohm's law,equations using KCL,equations using KVL. Hence in totalequations can be formed, which are sufficient to solve forvariables (voltage and current in each branch).Can we simplify the situation?Loop currents method: We do away with branch currents and define loop currents. The branch currents can be written in terms of loop currents once all the loop currents passing through the branch and their directions are known. The branch voltages can always be written using Ohm's law and branch current written in terms of loop currents. So now our objective is to find loop currents. For this we choose maximum number of independent loops (Fig.4.3) and apply KVL in them.

Figure 4.3:

Ifandare known, voltages across all elements can be found. Make two independent equations: For loop abef(4.3)

(4.4)

For loop bcde:(4.5)

(4.6)

Use any technique to solve these (such as using matrices). We get:(4.7)

(4.8)

Nodal Voltage Method

Figure 4.4:Nodal Voltage method

.Independent Nodes:One of the nodes in circuit need to be considered as reference node. Hence its node potential is zero. For other nodes, nodal voltage is potential differetial w.r.t. to reference node. The nodes are called independent nodes. In general fornode network,nodes will be independent.At node b:.Similarly, other equations are:(4.9)

(4.10)

These are six equations, in six unknowns. Thus can be solved for a unique solution. One can make a super node and use KCL combining the nodes nodes a and f. We also make extra equations for potential difference between two nodes. With super node, no. of equations is equal to no. of independent nodes whose voltage w.r.t. reference needs to be determined.

Current Sources in Loop Current Analysis

Figure 4.5:Current sources in Loop current analysis

Using KVL for loop 1 in Fig.4.5:(4.15)

The other equations are:(4.16)

(4.17)

The first and the third equation can be combined for taking care of. This can be done by making super loop for writing KVL.GraphFor analyzing circuits efficiently.Loop current methodOne can form a spanning tree from graph such that current sources are in links (Those elements which do not form part of the tree). Each link when added to the tree gives a loop. All voltage sources should be kept in branches of tree. For example, refer to the following two figures (Fig.4.6, Fig.4.7)

Figure 4.6:Loop Current method

Figure 4.7:Loop current method

Node voltages

Figure 4.8:Node Voltage method

In the above figure,. There are five unknown node voltages in the above circuit, namely,,,,and. Correspondingly, we have five equations. Note that we can mergeinto onesupernode

The second equation follows from looking at node, while the third one from doing the same at node.

Lecture 4: More on Dependent Sources

Figure 5.1:A dependent Source

All dependent sources are linear elements if (see figure5.1) K=constant and the output is proportional to controlling variable. Here, in figure5.1,effect, and V= cause. If K is constant,always gives samefor all values of.. In general all the measured variables can be written aslinear combination of all the causes, since nodal voltage or loop current method leads to linear equations. This is true for network with linear elements, and linear dependent sources. For measuring effect of many sources (also called forcing functions), the effect due to one source at a time is computed (assuming all others to be null). For the sources to be nullified means that if they are voltages sources, they are short circuited (making the voltage of source zero), and if they are current sources, they are open circuited (making the current from the source zero).Effects of all individual independent sources are added to get effect due to presence of all the independent sources. This is known asSuperposition Theoremand is valid because of linearity in the circuit (as explained above). While applying superposition theorem, depenendent sources are retained as any other circuit element. They should not be nullified to get their effect separately on the quantity of interest.Example:Consider the circuit shown in figure5.2

Figure 5.2:Example Circuit

Using loop analyis, as shown in fig5.3, we apply KVL. For.

Figure 5.3:Tree for the example circuit

Solving the same circuit using superposition theoremThere are two sources. We will take one at a time and find the contribution inshown in figure which is quantity of interest for us. Taking Voltage source first (as in figure5.4)

Figure 5.4:Taking Voltage source

(5.1)

Taking current source only, (as in figure5.5), making tree (as in figure5.6)

Figure 5.5:Taking Current Source only

Figure 5.6:Making Tree for the circuit considering current source only

When one is finding effect of an independent source, other independent sources are nullified. Let's take an example having dependent source (Fig.7.5).

Figure 5.7:Circuit for analysis with dependent source

Taking voltage source first (Fig.7.6)

Figure 5.8:Taking only voltage source

Using KVL:(5.2)

Taking Current source (Fig.7.7), and making a tree (Fig.7.8), we write KVL and solve

Figure 5.9:Taking Current Source

Figure 5.10:Making a tree

Now we verify the solution from loop current method directly (Fig.7.9). Making tree (Fig.7.10).

Figure 5.11:Direct Verification

Figure 5.12:Making Tree

Thevenin's Theorem: andwill vary linearly in Fig.5.13.

Figure 5.13:Network (having sources also)

This implies that voltage across load in figure5.14should beThis implies: (see5.15), that is,.

Figure 5.14:

Figure 5.15:Getting an equivalent network

Hence, equivalent of network at terminal AB is shown in figure5.16.

Figure 5.16:Equivalent Network

Here,open circuit voltageThe two figures shown in figure5.17are equivalent. When the source inside the network is neglected (if voltage source, short ckted, if current source, open ckted)

Figure 5.17:Thevenin's Theorem: the two figures are equivalent

The same could be done with equivalent circuit.hence, we get5.18.

Figure 5.18:

Norton TheoremIf the network shown in figure5.19is linear,. The network can then be replaced by a Norton equivalent, as shown in steps in figures5.205.215.225.23and5.24.

Figure 5.19:The Linear Network

Figure 5.20:

Figure 5.21:

Figure 5.22:

Figure 5.23:

Figure 5.24:

Using Thevenin's equivalentThe circuit is shown in figure5.25, and the aim is to find. The analysis is shown in fig5.26,5.27,5.28.

Figure 5.25:

Figure 5.26:

Figure 5.27:

Figure 5.28:

Using Norton's equivalentThe same problem is then worked out with Norton's equivalent, as shown in figures5.29,5.30,5.31,5.32. Finally,

Figure 5.29:

Figure 5.30:

Figure 5.31:

Figure 5.32:

Thevenin's Theoremandwill vary linearly in Fig.5.13.

Figure 5.13:Network (having sources also)

This implies that voltage across load in figure5.14should beThis implies: (see5.15), that is,.

Norton TheoremIf the network shown in figure5.19is linear,. The network can then be replaced by a Norton equivalent, as shown in steps in figures5.205.215.225.23and5.24.

Figure 5.19:The Linear Network

Figure 5.20:

Figure 5.21:

Transient response of RL circuit

Figure 6.1:non-realistic model

Figure 6.2:Switch attached to make it realistic

Figure 6.3:Inductance of wire also considered

Figure 6.4:After closing the switch

For DC circuit analysis, the voltage and current source excitation is constant, so C and L are neglected6.1. The circuit is assumed to be as it is since time=to. In practice, no excitation is constant fromto. A more realistic circuit would include a switch, as shown in Fig.6.2. Also, inductance and capacitances of wires and components cannot be neglected as shown in Fig.6.3, and in Fig.6.4(for). Using KVL:

Multiplying both sides by

to get

Therefore,

Integrating both sides, we get

Note that, at,and at,.Now,, where,,and.

As at,,

The plot ofvs.is shown in the Fig.6.5. Note that when,A.

Figure 6.5:

Voltage across the inductor is given by. Therefore,

The plot ofvsis shown in Fig.6.6.

Figure 6.6:

From the above equation, we notice that in timeseconds, the voltage across the inductor would reduce toof its original value and would go on decreasing by a further factor ofeveryseconds thereafter. Therefore, summing it up, we have for an inductor-resistor pair with a constant voltage applied at, and

Figure 6.7:

Now, consider the circuit shown in Fig.6.7.Before, we have the circuit looking as in Fig.. Therefore we have the initial current (at) through the inductor asA.

Figure 6.8:

Figure 6.9:

At, the circuit looks as in Fig.and therefore, we have the following equations for.

At,A. Hence,

The plot forvswould therefore be as in Fig 5.10

Figure 6.10:

Figure 6.11:R

Hence,and, as shown in6.11, discharge will be immediate. We write equations foracross the inductor.

Figure 6.12:Note the sign of

Sign ofis as shown in6.12. As,

Figure 6.13:Large inductance doesn't allow currents to change at fast rates

Switching off causes a discharge in the tube or spark at switch6.13.

Figure 6.14:

At,6.14

In generic form,

Figure 6.15:

Now, have a look at the circuit shown in the figure 5.15. As the resistanceis 0, theequations are indeterminate and are of the form

So, we solve the circuit directly

At,, therefore,

We will use the above circuit to analyse the circuit shown in Figure 5.16. As the resistance ofis in parallel with the voltage source and also the rest of the circuit, the current drawn by it will be constant and will not affect the analysis of the rest of the circuit. So, for, we can consider the circuit to be as in Figure 5.17. Analysing it as in the previous example, we get

Figure 6.16:

Further, for, the circuit can be equivalently considered as in Figure 5.19. Notice that still,Amps. as the inductoris in parallel with the voltage source. The plot forvs.would therefore be linear as in Figure 5.18. Therefore,

Figure 6.17:

After, the circuit can be considered equivalently to be that in Fig 5.20. Now, there is no constant voltage source across the resistance of. This, the current flowing through it also comes into the analysis.

Figure 6.18:

The solution thus is:, where, given the initial cR-C CircuitsAn RC circuit is shown in fig.7.1. Since, in practical circuits, power is always switched on at certain time, a switch is provided here. This switch closes at time.

Figure 7.1:An RC Circuit

We are interested in finding how voltage across capacitorchanges with time? We can also assume that voltage across the capacitor is zero. Using Kirchoff's voltage law across the only loop in circuit we can find the equation relating,and. Using the characteristic equations of capacitors, resistors i.e.,

and using KVL

for

for ,

For ,constant

Thus, ; hereis constant

At, capacitor voltage will be 0. HenceAlternatively,

at

Thus,

Thus,(7.1)

The curves showingandare shown in the figures7.2and7.3.

Figure 7.2:i vs t

Figure 7.3:vs t

These show the exponentially decaying (growth) nature of current (voltage across capacitor). Consider the figure shown in7.1. The switch is closed at.Now,

For RC circuit with source voltage zero, and an initial capacitor voltage of, this expression reduces to. For constant current charging of a capacitor, as shown in7.4, the analysis:

Figure 7.4:Constant current excitation of a capacitor

(7.2)

(7.3)

That is, voltage varies linearly with time on constant current charging.

Figure 7.5:

0

Now consider the circuit shown in figure7.6

Figure 7.6:

The switch is turned off atsec. There is no charge on the capacitor initially. Therefore, afterand before, the circuit is equivalent to figure7.7

Figure 7.7:

Taking thevenin equivalent in the direction of the arrow leads to figure7.8

Figure 7.8:

Therefore ,

For, we have the following equation

After, the switch is once again thrown open and the equivalent circuit is shown in figure7.9

Figure 7.9:

Now,

Therefore,

The graph ofwith time is shown in figure7.10

Figure 7.10:

conditions, we can solve forand.

Sinusoidal Steady State ResponseCause and effect for linear systems are related by linear differential equations. note that for the exponential function,

and

whereis also a constant. Similar equations hold forderivatives also.

Figure 8.1:An Linear System

Consider a function. If on operation by a system, the functionis only multiplied by a constant, the function is said to be theeigen functionof the given system, as shown in8.1. We know that:(8.1)

Figure 8.2:Superposition

Consider a linear system, as in8.2. The functionsandare eigen functions of the linear system. If sum of these two functions is input to the system, the output can be predicted easily, by superposition theorem. Thus knowing the output to eigenfunctions helps us in predicting output of several other functions.Now we look at how output to sinusoidal excitations of linear circuits can be determined. Consideror.

Note that. Thus, the phase and associated constant changes when a sinusoid is passed through a differentiator. Similarly,.

Figure 8.3:RLC circuit

Now consider the RLC circuit shown in8.3.

If i(t) is sinusoidal, say cos(wt), then

where,

the last equality follows using, as shown in8.4.

Figure 8.4:

Analysis can be done simply using sin and cos terms. But can't be further simplified using imaginary quantities

Figure 8.5:

As in the diagram shown in8.5,In figure8.6, the complex values shown are rotating with time. The actual value at any time is the projection on the real axis.

Figure 8.6:Values rotating in the complex plane with time

Note thatandhave constant separation with each other. All entities in general will have same relative separation.

Figure 8.7:Phasors

Consider figure8.7. Let us rotate the frame of reference (or axis) also with speedrad/sec. Then the angles ofandwith respect to the axis become constants. The figure8.7is a phasor diagram, showing current and voltage phasors, and the phase difference between the two.We show the application of phasors in circuit analysis by the circuit shown in figure8.8, a simple inductor circuit excited by a sinusoidal voltage source.

Figure 8.8:Inductor circuit

The associated phasor diagram is shown in figure8.9. It can be seen that the phase difference isradians. Voltage leads the current byradians.

Figure 8.9:Phasor diagram for inductor excitation

Figure 8.10:Resistance

Similarly, consider a resistance excited by a sinusoidal votage source, as shown in figure8.10. Here,, andis in phase with the voltage. The same is shown in the phasor diagram8.11.

Figure 8.11:Phasor for resistor excitation

Figure 8.12:Resistor and inductor in series

Now consider a resistor and an inductor in series with an AC voltage source, as in8.12.

where

The resulting phasor diagram is plotted in figure8.13.

Figure 8.13:Phasor

This gives an inkling to a general result: phasors can be added/subtracted just like vectors. Resulting magnitude and phase would come out to be the same. See the hint below.In phasor terms: Voltage across inductor:, Voltage across resistor. Now adding the two vectors,Comparing with Ohm's law,, the previous equation, the complex termcan be taken to be similar to resistance. This is calledimpedance. Inverse of impedance is calledadmittance, complex analog of conductance. In the above circuit,

Similar to the above analysis, we now work with the capacitor. See figure8.14.

Thus,lags byw.r.t., as shown in phasor diagram8.15.The phasors are typically written in capital letters, whereas their continuous time counterparts in small letters.In phasor diagram,. Thus, impedance is.

Figure 8.14:

Figure 8.15:

Figure 8.16:

Now we analyse circuit shown in in figure8.16,. We wish to calculateand. (phasor in rectangular coordinates x and y)

for first loop:...(*)

for second loop:...(**)

From (**): From (*) :

Solving these two forand, we get:

which after rationalization, gives:

For sinusoidal forcing functions, we can use the same techniques, but with complex variablesA sinusoidpassed through a linear system with transfer function, the output would be.Thus, for a sum of sinusoids of different frequencies, using superposition principle, the output forwould be:

Power Supply

Many electronic applications such as radio sets, toys, walkmans etc. require a d.c. power supply (usually 6V or 3V). One way to achive it is through the use of dry cells in series. But an economically more convenient solution would be the use of the a.c. supply to generate the desired d.c. output. Power supplies are used to achieve precisely this result.Let us first state the problem at hand. We are given a 50 Hz, 230 V r.m.s (i.e.V peak ) a.c. supply and our objective is to design a circuit which would take this as input and give as output a constant d.c. voltage, say 6 V.

In order to be able to use our common circuit elements (which run on small voltages), we first reduce the amplitude of the input to say 6 V through the use of a transformer.

Figure 9.1:The First Step

Figure 9.2:A transformer

The output of an ideal transformer shown above is governed by the following equations:

where, both the input and the output are a.c. We denote the transformer in the ciruit as following.

Figure 9.3:A transformer

The next step is to use this small a.c. voltage to generate the required d.c. The simplest manner in which this task is accomplished is by the use of a diode in a circuit known asHalf wave rectifier. The figure is shown below. The working of the circuit is as follows. The diode can conduct only ion one direction, i.e. only when the voltage applied to the circuit is such that the current flows in the forward direction. Otherwise, the diode simply blocks the current. Now, when the load is simply a resistor, the equation for the output current should be proportional to the output voltage and therefore, the output voltage is zero for half of the cycle and equal to the input voltage for the other half of the cycle.

Figure 9.4:Half wave rectifier

Figure 9.5:Output of the half wave rectifier

Now, suppose that instead of the resistor, we have an inductor as the load. In this case, the output voltage at any time will not be proportional to the current at the time. Recall that for an inductor,. Therefore, the output voltage can go negative in this case as long as the current is not negative. After all, diode prevents only negative currents and not negative voltages. So, as long as the diode conducts (due to non-zero forward current), the input voltage is transferred to the output. So, barring the transients which occur due to the initial values of the voltage and current through the inductor, eventually the diode will conduct at all times with the output voltage being equal to the input and the current being phase shifted from the input by 90 degrees with a d.c. component added to make it positive valued at all times. The figures below two different cases, one in which theisand the other in which it is. The initial current through the inductor is assumed to be zero in both the cases.

Figure 9.6:The inductive loadFigure:Output of the half wave rectifier when the input isFigure:Output of the half wave rectifier when the input is

In case the load is purely capacitive, once the capacitor is charged to its maximum value, not forther charging takes place. Also, as the current cannot be negative the discharge also doesn't take place. The output is therefore a pure d.c.

Figure 9.9:The capacitive load

LM 317: RegulatorThe trouble with zener diode driven power supply is that one needs a zener of the same voltage as the desired voltage output. We can overcome this using a voltage regulator such as LM 317

Figure 9.21:A power supply using voltage regulator

This regulator maintains a constant voltageof 1.25 volts across two of its terminals. So, connecting it in the above configuration and neglecting the, we have when,. ForV, if we fixto be, we getto be. The next thing we need is the value ofrequired. Suppose the load is such thatmA. The current throughandismA. Therefore,mA. For no ripple, the capacitor should be able to supply this current without the voltage dropping below 15 V. Now, taking the worst possible instant of time, we have,

On the other hand, for a 1mF capacitor,volts.

Bipolar Junction TransistorA bipolar junction transistor (BJT) has three operating regions:1. Cut off (for NPN BJT)2. Active region (for NPN)3. Saturated (for NPN)In active region,for silicon BJT, andfor Germanium BJT.In saturated region,. Common realizations of BJT are shown in10.1

Figure 10.1:Realizations of BJT

In active region:Three configurations in the active region are shown in figure10.2. For active region, the specified biasing condition is satisfied.

Figure 10.2:Configurations of BJT

When transistor is used for switching purposes, it works in either cut-off or saturation mode.In active region, the base and collector currents satisfy the condition(DC Current gain. Ratio of absolute values).is a constant for a particular transistor, which varies fromtofor different transistors.Note that this condition does NOT hold for saturation and cut-off operations of the BJT.

Figure 10.3:Sample circuit for design problem

Now we address the problem of circuit design, in which we find appropriate values of resistances and voltages in figure10.3to ensure BJT inactiveregion. The problem assumes importance as many transistor applications are those in which it is in active region.In cut-off,, as. Ifbecomes less than, the transistor is in saturation. We need to ensure that the BJT is not in these states.In active region, as,

The last equation shows that the transistor, in this mode (active), is basically a current amplifier.Let. Then,. Suppose the BJT has..Also, we need to ensure, so that BJT is not in saturation. In the limiting case,, just when the BJT is entering saturation from active region. (In active region,).Thus,. That is,for ensuring BJT in active region.Suppose we increaseto. Then,. Thus, the current gain.Cut off and saturation are used in switching application. For the circuit shown in figure10.4, we find conditions for operating BJT as a switch.

Figure 10.4:BJT as a switch

When,,, and, since BJT is in cut-off.Now findsuch that the BJT is in saturation.

Thus, we get:

Thus, for, the BJT is in active region.

Figure 10.5:Vsfor the design of BJT as a switch

Two different biasing strategies are shown in figure10.6and10.7.

Figure 10.6:Fixed bias circuit

Figure 10.7:Voltage divider bias

Bipolar Junction TransistorA bipolar junction transistor (BJT) has three operating regions:1. Cut off (for NPN BJT)2. Active region (for NPN)3. Saturated (for NPN)In active region,for silicon BJT, andfor Germanium BJT.In saturated region,.Common realizations of BJT are shown in10.1

Figure 10.1:Realizations of BJT

In active region:Three configurations in the active region are shown in figure10.2. For active region, the specified biasing condition is satisfied.

Figure 10.2:Configurations of BJT

When transistor is used for switching purposes, it works in either cut-off or saturation mode.In active region, the base and collector currents satisfy the condition(DC Current gain. Ratio of absolute values).is a constant for a particular transistor, which varies fromtofor different transistors.Note that this condition does NOT hold for saturation and cut-off operations of the BJT.

Figure 10.3:Sample circuit for design problem

Now we address the problem of circuit design, in which we find appropriate values of resistances and voltages in figure10.3to ensure BJT inactiveregion. The problem assumes importance as many transistor applications are those in which it is in active region.In cut-off,, as. Ifbecomes less than, the transistor is in saturation. We need to ensure that the BJT is not in these states.In active region, as,

The last equation shows that the transistor, in this mode (active), is basically a current amplifier.Let. Then,. Suppose the BJT has..Also, we need to ensure, so that BJT is not in saturation. In the limiting case,, just when the BJT is entering saturation from active region. (In active region,).Thus,. That is,for ensuring BJT in active region.Suppose we increaseto. Then,. Thus, the current gain. Cut off and saturation are used in switching application. For the circuit shown in figure10.4, we find conditions for operating BJT as a switch.

Figure 10.4:BJT as a switch

When,,, and, since BJT is in cut-off.Now findsuch that the BJT is in saturation.

Thus, we get:

Thus, for, the BJT is in active region.

Figure 10.5:Vsfor the design of BJT as a switch

Two different biasing strategies are shown in figure10.6and10.7.

Figure 10.6:Fixed bias circuit

Figure 10.7:Voltage divider bias

CE Characteristics

We have two independent variables hereand. For different value of, the input characteristicsas a function ofis as follows.

Similarly, for different values of, thevs.characteristic is shown below. The line passing throughandis known as the load line and its intersection with thecurve determines the quiscent point or operating point Q. Note that in the active region,is almost independent of(i.e. nearly constant) and depends mostly on. The ratiois a constant for the active region and is known as.

In the common emitter circuit shown above,

The above is the equation of theload line. Q is the operating point forA. In the active region,is approximately 0.7 V. For the cutoff region,andV. In the saturation region,V and. We will denote the operating point byand.The fact that in the active region, variations inresult in proportional variations inand henceforms the fundamental principle of amplifier. For the transistor to remain in the active region throughout this variation, variations inshould be maximumA. In the CE configuration above, with the change in temperature,changes and hence, so does Q.is an increasing function of T and therefore as T increases,increases causing further heating of the transistor and thereby further increasing. This is known asthermal runaway. To avoid this, we stabilize the circuit my introducing an emitter resistance.

Now, as T increases,increases and so does. This increasesand therefore reducesas the base voltage increases. This decrease inresults in decrease of, thereby compensating the effect of temperature and stabilization of the operating point.CE Characteristics

We have two independent variables hereand. For different value of, the input characteristicsas a function ofis as follows.

Similarly, for different values of, thevs.characteristic is shown below. The line passing throughandis known as the load line and its intersection with thecurve determines the quiescent point or operating point Q. Note that in the active region,is almost independent of(i.e. nearly constant) and depends mostly on. The ratiois a constant for the active region and is known as.

In the common emitter circuit shown above,

The above is the equation of theload line. Q is the operating point forA. In the active region,is approximately 0.7 V. For the cutoff region,andV. In the saturation region,V and. We will denote the operating point byand.The fact that in the active region, variations inresult in proportional variations inand henceforms the fundamental principle of amplifier. For the transistor to remain in the active region throughout this variation, variations inshould be maximumA. In the CE configuration above, with the change in temperature,changes and hence, so does Q.is an increasing function of T and therefore as T increases,increases causing further heating of the transistor and thereby further increasing. This is known asthermal runaway. To avoid this, we stabilize the circuit my introducing an emitter resistance.

Now, as T increases,increases and so does. This increasesand therefore reducesas the base voltage increases. This decrease inresults in decrease of, thereby compensating the effect of temperature and stabilization of the operating point.

Constant current source

In the above circuit, the currentis a constant independent ofprovided the transistor if in the active region, as in the active region,is determined by.is assumed to be 1K.

Further, we also want the maximum power to be less than a certain value, say, 1 Watt. We have,

Therefore, for the circuit to work, we must have,

We would obviously like to increase the range for which this current source works. In the same circuit, if we now take, we get with similar calculations,

This is a much better situation.

Constant voltage source

We can also have a constant voltage source whose output voltage would be more or less independent of the load. See the above figure. The output voltage would beas long as the transistor is not cutoff. The output voltage is therefore dependent upon. We must ensure that the transistor is in the active region, whence,volts. Therefore,

Therefore, the above circuit works as a constant voltage source for.Digital CircuitsBoolean Operators: Single Input Single Output: OperationA and B take binary (0,1) values. eg. NOT operation12.1.

Figure 12.1:A NOT gate

Multiple Inputs Single Output: Eg 1. OR operation12.2. if either of``or''is The truth table is as follows:ABC

000

011

101

111

Truth table for OR gate

Figure 12.2:An OR gate

Eg 2. AND operation is shown in figure12.3

Figure 12.3:An AND gate

ABC

000

010

100

111

Truth table for AND gateThese were basic gates which are implemented using transistor and other devices.The transistor implementation is shown if figure12.4

Figure 12.4:Implementation using a BJT

IC based gates are shown in figure12.5

Figure 12.5:IC based gates

Other functionsNAND: Not + AND

Figure 12.6:NAND gate

ABC

001

011

101

110

Truth table for NAND gate

NOR gateNot+OR gate

Figure 12.7:NOR gate

ABC

001

010

100

110

Truth table for NOR gate

X-OR gateExclusive-OR gate

Figure 12.8:X-OR gate

ABC

000

011

101

110

Truth table for X-OR gate

X-NOR gateExclusive NOR

Figure 12.9:X-NOR gate

ABC

001

010

100

111

Truth table for X-NOR gate.

Using NAND gatesNOT

Figure 12.10:Realizing a NOT gate using a NAND gate

ORThe following statements are calledDeMorgan's Theoremsand can be easily verified and extended for more than two variables.(12.1)

(12.2)

(12.3)

(12.4)

In general:(12.5)

Thus :(12.6)

Now it is easy to see that, which can be checked from the truth table easily. The resulting realization of OR gate is shown in12.11

Figure 12.11:Realization of OR gate by NAND gates

AND gate

Figure 12.12:Realization of AND gate by NAND gates

X-OR gate(12.7)

Clearly, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates.

Figure 12.13:X-OR gate

X-NOR gate(12.8)

Again, this can be implemented using AND, NOT and OR gates, and hence can be implemented using universal gates, i.e., NAND or NOR gates.

Figure 12.14:X-NOR gate

Boolean ExpressionsA general realization of a Boolean expression is shown in12.15

Figure 12.15:Realization of a Boolean Expression: shown as a black box

Example:In a car, we have the following components:A Day-night sensor: Day-1, Night-0B Lamps on: On-1, Off-0C Ignition on: On-1, Off-0D Warning light forlamps-onIn this case, the truth table for the logic D would beABCD

0000

0011

0101

0110

1000

1010

1101

1111

Therefore,, which can be written asin thesum of product form. We arrive at this by looking at the combinations when the outout is one.We can alternatively, express this in theproduct of sums formby looking at the combinations when the output is low asUsing SOP and POS, it can be implemented as follows:

Next, we will try to reduce the number of gates by combining terms suitably.

We can get the above by clubbing thes in the k-map shown. Now, if we club the zeroes together in the k-map,

Check that we get the same expression by simplifying the product of sums expression (by using (X+Y)(X+Z)=X+YZ)Multiplexer

The truth table for the multiplexer is as follows:

00

01

10

11

Multiplexers (MUX)For logic function realizations, instead of logic gates, Multiplexers can also be used Consider a boolean function f={1,2,6,7}. Here input variables are A,B,C. multiplexer schematic formultiplexer is shown in figure13.1

Figure 13.1:() multiplexer implementation of logic function

Depending on the contorl input combination specfic input is connected to the single output of multiplexer.(13.1)

Whenmultiplexer is used to implement the above function. We connect Boolean logic '1' at the inputs corresponding to control inputs ABC= 1, 2, 4, and 6. For all other input Boolean logic '0' is connected. In case we take amultiplexer we can makeas control input and then determine what should be connected at the inputs of multiplexer as shown below.(13.2)

(13.3)

(13.4)

(13.5)

The realization is shown in figure13.2using aMux.

Figure 13.2:Multiplexer () Implementation

Flip-Flops and LatchesAn SR latch is shown in figure13.3. The latch Truth table is shown in the following table. The two inputs, S and R denote ``set'' and ``reset'' respectively. The latch has memory, and the present output is dependent on the state of the latch. Thus the output atinstant, denoted byis dependent on output atinstant, denoted by.

Figure 13.3:Construction of a latch from NOR gates

Students should verify the veracity of the truth table from the figure13.3.SR

1010

0101

1100

00

Note that instate, bothandare 0, which seems absurd. Thus, conventionally, the stateis said to be ``not allowed''. A similar latch, known aslatch is constructed using NAND gates (as opposed to NOR gates forlatch). The students should again check that the working of the latch coheres with that of the truth table.

Figure 13.4:Construction of a latch from NAND gates

0110

1001

0011

11

To avoid ``race'' between the inputs, to have a control on when the input affects the latch, the circuit13.5is often implemented.

Figure 13.5:Circuit to avoid ``race'' condition

The inputs have an effect on the latch only when, otherwise, the previous state is maintained. The inputmay be a clock, so that whatever transitions inandtake place before the clockchanges todo not affect the outputs, and only when the inputs have become stable is the system affected.

Sequential circuits

In the above circuit, we have the problem of multiple transitions when the clock is active.Master Slave Flip-Flop (S-R)

When,,andare both 1. Therefore, it is an undefined condition. This can be eliminated by proper feedback.

for the above circuit, the truth table is

11

010

101

00

The problem with the circuit shown above is that when clock =1, the feedback will cause oscillatinons and when clock goes zero, the predicting the ouput state is difficult. On the other hand, master slave configuration does not allow oscillation.Edge triggered Flip-Flop

The above diagram shows a positive edge triggered flip-flop. The truth table is as follows

0101

1010

00

11