Bandgap Network

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9.

Bandgap Bias Network

How to generate voltages and currents that are relatively independent of supply voltage and/or

temperature?

9.1 IntroductionWe have specially considered the design of on-chip Bi-CMOS bandgap bias network

optimized with respect to noise behavior. And is implemented using MOSFETs operating in

subthreshold region with BJTs. The bandgap bias network and its response both are shown at the

end of this chapter.

Why Bi-CMOS

We have chosen Bi-CMOS technology for bandgap bias network considering following

points and drawbacks in present design approach-

a) The most useful biasing idioms are actually based on bipolar circuit

b) CMOS offers relatively limited options for realizing bias circuit

c) A parasitic bipolar device exists in every CMOS technology, and may be used in a

bandgap voltage reference. Even though the characteristics of parasitic transistors are far from

ideal, the performance of bias circuits made with such devices is frequently vastly superior to

that of pure CMOS bias circuits.

The Bandgap Voltage reference concept

Since IC technology directly offers no reference voltages that are inherently constant, the

only practical option is two combine two voltages with precisely complementary temperature

behavior. Thus, the general recipe for making temperature-independent references is to add a


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voltage that goes up with temperature to one that goes down with temperature. If the two slopes

are equal in magnitude but opposite in sign, the sum will be independent of temperature. Without

question, the most elegant realization of this idea is the bandgap voltage reference, for it

produces an output voltage that is traceable to fundamental constants, and therefore is relatively

insensitive to process, temperature and supply variations.

9.2 Current and Voltage ReferencesHere we are using current and voltage references made by active devices as a biasing

element. They are required to establish current references in our VCO design. Current and

voltage references have to be precise and well characterized rather than constant. Use of these

references in biasing can results in superior insensitivity of circuit performance to power-supply

variations and to temperature. They are frequently more economical than resistors in terms of die

area required to provide bias current of certain value, particularly when the value of bias current

required is small.

Various important parameters measuring the performance of a reference are-

Line Regulation

a) Load Regulationb) Temperature Coefficientc) Power Dissipationd) Supply Voltage Range

To most of the designers the above parameters are self-explanatory but they will be

introduced as we proceed.

9.3 CTAT(Complementary to Absolute Temperature) Voltage ReferenceCTAT Voltage reference shows negative temperature coefficient. Most commonly used

reference is a diode voltage in a CMOS Process or a diode connected bipolar transistor in a

BiCMOS Process.

Figure 9.1 shows a diode connected BJT. From basic semiconductor devices

T

BE

V

V

pa

in

C eLN

nqADI

2

= (equ. 9.1)


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In equ 9.1, minority carrier current is neglected and base width is replaced by diffusion length in

base. Most of the collector current is electron current.

T

BE

V

V

nd

ip

B e

LN

nqADI

2

= (equ. 9.2)

In equ. 9.2, recombination current is neglected. Base current is hole current.

The total current flowing through a diode connected BJT is same as the diode current which can

be derived as

T

BE

V

V

nd

p

pa

niBCD e

LN

D

LN

DqAnIII

+=+= 2 (equ. 9.3)

In equ. 9.3, temperature dependent terms are-

KT

E

VCi

g

eNNn

=2 (equ. 9.4)

orKT

E

VCi

g

eTNNn

= 3002

(equ. 9.5)

TnnVD = (equ. 9.6)

or ( ) nnn TCTq

kCTD

=

= 1' (equ. 9.7)

Similarly-

( ) nnp TDTq

kDTD

=

= 1' (equ. 9.8)

Substituting equ. 9.8, 9.7 and 9.5 in equ. 9.3 gives-

KT

EqV

n

ndpa

VOCOD

gBE

eTLN

D

LN

CNqANI

+= 4

''

(equ. 9.9)

Performing natural log on both the sides of the equ. 9.9 and simplifying-

or ( ) ( ) BEgD Vq

ET

q

KTn

q

KT

A

Ik =

ln4ln


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Replacing natural log of T with Tylor Series, ignoring all the higher order terms and replacing all

temperature independent terms with constants give-

01ln BED

oBE VTaA

IkaV +

= (equ. 9.10)

For a typical BJT-

KVxa /10001.95

0

= , ,Amxk /101 26= KVa /0017574.01 = , VVBE 2108.10 =

Fig. 9.1: CTAT Voltage Reference and its performance

9.4 PTAT (Proportional to Absolute Temperature) Current ReferenceFigure 9.2 shows a basic circuit topology for PTAT current reference. As the name

suggests, the output current increases proportional to the absolute temperature.


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Fig. 9.2: Typical PTAT Current Source Topology

TP1 and TP2 act as a 1:1 current mirror to force same current through Q1 and Q2. TP3

mirrors the same current to the output. Kirchoffs voltage loop law gives-

RIVV ptatBEBE += 21 (equ. 9.11)

Equ. 9.11 has two solutions-

(a) , which implies0=ptatI 021 == BEBE VV

(b) Using equ. 9.1 and equ. 9.11 gives-

==

1

221 ln

A

AVVVRI TBEBEptat

or

=

1

2lnA

A

R

VI Tptat

or TA

A

qR

KIptat

=

1

2ln (equ. 9.12)

As visible from equ. 9.12, if Q1 and Q2 are matched, the output current is independent of

the process variations and is directly proportional to the absolute temperature. The slope of the


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output characteristics with respect to the change in temperature is approximately linear. It is

directly proportional to

1

2lnA

Aand inversely proportional to R as shown in figure 9.11 and equ.

9.12. The circuit has two basic problems-

a) Use of diode connected BJT shows deteriorated performance in case of low supplyvoltage and low current. This is due to the current drawn into the base of both the

transistors Q1 and Q2. To circumvent this problem a -helper (Q3) can be used as

shown in figure 9.3.

b) The circuit has two stable states as visible from equ. 9.11. These are-(a) and (b)0=ptatITTCT

A

A

qR

KIptat *ln

1

2 =

= . The stable state (a) which occurs mostly when supply

voltage is switched on, is undesirable. Thus a start-up circuit as shown in figure 9.4 is

required to avoid state (a). Figure 9.4 shows a state dependent start-up circuit. Capacitor

C is initially discharged. When the circuit is switched on, C charges to the supply voltage

in a finite time. During this finite charging time TP4 is on and draws current from TP2

thus correctly biasing the current mirror to result in the stable state (b). When the

capacitor C is fully charged, TP4 switches off. There is no bleeder resistor required

across C in practical circuits due to backplane tie down in most of the MIM Capacitors in

most of the processes. Other option for start-up circuit not frequently used is continuously

on TP4 with TP4 made as small as possible.

For reliable operation of the PTAT reference, Q1-Q2 and TP1-TP2 transistor pairs should be

layout in common-centroid fashion for proper matching, cascode-current mirror should be used

for better line regulation (so that the output resistance of the current mirror does not mismatch

the current in the two legs) and trimming of resistor R can be used.


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Approximate Design

Process parameters for a typical high speed CMOS Process

VV

VAxC

VAxC

t

oxp

oxn

662.0

/1090

/10180

26

26

=

=

=

Temperature dependent parameters for BJT in a typical process

KVxa /10001.95

0

=

Amxk /101 26=

KVa /0017574.01 =

VVBE 2108.10 =

Generic constants

CxqKJxK1923

10609.1,/1038.1 ==

Assumptions

VVofVVVAI

AICTCTmAmA

CCovCCC

C

34.0)(%10,4.3,300

,800,120,120,200,10

120

120minmax

2

2

2

1

====

=====

o

o

oo

Design is done at Tnom=25C=298.16K

CAxTT

IITC CC o

oo

/100833.2 6

minmax

120120 =

=

( ) AITTTCI CnomC 08.602120min25 =+= oo

Using equ. 9.12-

=

= 33.123ln

1

2

A

A

qTC

KR


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The resistance may have to be varied slightly to compensate for the other temperature dependent

changes in the circuit.

TP1 and TP2 Sizing-

74.1152

2

25

2,1

==ovoxp

C

VC

I

L

W

o

Choosing the gate length to be four times the minimum gate length in a typical CMOS Process

( AL 5.0min = )-

AL 22,1 =

AW 2302,1=

TP3 is choosen to be same size as that of TP1

AL 23 =

AW 2303 =

Q3 used as -helper is chosen to be of same size as that of Q1. TP4 used in start-up circuit ischoosen to be small. Capacitor C is choosen to be sufficiently large and not requiring lot of chip

area. Figures 9.3 and 9.4 show device sizes used. R is slightly modified. Figure 9.5 shows the

response of the circuit.


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Fig.9.3: Designed PTAT Circuit with Fig.9.4: Circuit with Start-up

-helper showing voltages and currents

Circuit Voltages and Currents

Voltage can be determined from equ. 9.10.1BEV

VVTaA

I

kaV BED

oBE 8.0ln 011 +

=

Other voltages are-

VVV BE 59.12 12 = due to Q1=Q3

( ) VVVVV tovCC 4.21 +=

From previous calculations-

AIICptat

1.60225

==o

mVRIVCR

3.7425

==o

From the above calculations it is visible that TP1 and Q2 are well into the desired regions of

operation suggesting that circuit will operate reliably in the designed temperature range.


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Fig.9.5: Response of the designed PTAT Current Reference

9.5 Temperature independent current reference or Bandgap bias NetworkCTAT voltage reference in section 9.3 and PTAT current reference in section 9.4. can be

combined to give a voltage reference independent of temperature over a wide range of

temperature. Design in section 9.4. for PTAT current reference is used as it is. Design for CTAT

voltage reference in section 9.3. is slighly modified to give a response as shown in figure 9.6.

Fig. 9.6: Modified CTAT Voltage Reference and its response


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This modification is in the form of a resistor ( ) in the emitter. The idea is to use drop across

this resistor to provide same slope to the voltage reference for two extreme currents given by

PTAT Current Reference.

corR

Assumption from section 9.4

2

4

120

120

10

800

300

umA

uAI

uAI

C

C

=

=

=

o

o

Using equ. 9.10 @ T= -120C gives-

VVTaA

IkaV BECoCBE 98876.0ln 01

4

120120_4 +

=

o

o

Similarly @ T= 120C gives-

VVTaA

IkaV BE

C

oCBE67515.0ln 01

4

120

120_4+

=

o

o

Reference voltage across the series combination of the diode and the resistor ( ) has to be

same at the two extreme temperatures. This gives the following approximate relation-

refV

RIVVRIVCCBErefCCBE

oooo

120120_4120120_4+==+

(equ. 9.13)

or =

=

21.627

120120

120_4120_4

CC

CBECBE

II

VVR

oo

oo

Using equ. 9.13 gives-

VRIVVCCBEref

77.1120120_4

=+= oo

refV is expected to be slightly higher due to the positive temperature coefficient of the resistance

as shown in figure 9.6.corR


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To finally get a bandgap voltage reference, PTAT Current Source designed in section 9.4

is used to force current through the CTAT voltage reference designed above as shown in figure

9.7. Figure 9.8. shows the response of the designed bandgap voltage reference.

Fig. 9.7: Bandgap Voltage Reference

Fig. 9.8: Response of the Bandgap Voltage Reference


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Slight curvature is due to the natural log nature of the diode voltage with respect to the diode

current as given in equ. 9.10. Though the linear component of the diode voltage reference has

been cancelled the higher order effects have to be cancelled by using higher order PTAT current

references. In most of the designs such a curvature correction is not required. Temperature

coefficient of a bandgap reference is given by equ. 9.14.

)/(10* 6

minmax

minmax CppmTT

VVTCbandgap

o

= (equ. 2.14)

or CppmTCbandgapo/12=

Apart from the voltage and the current references, a bias circuit uses buffers to give application

specific bias circuits. Voltage mode, current mode and mixed mode techniques are used to adjust

reference voltage and current as required for a specific application.

9.6 SummaryWe have the designed on-chip Bi-CMOS bandgap bias network allowing the stable

biasing. The self-biased cell is quite versatile, permitting the generation of currents proportional

to the ratio of a voltage in one branch to the resistance in the other. The voltage may be provided

by a variety of elements, such as a forward-biased junction. While a VBEby itself has limited

utility as a voltage reference because of its negative TC, its CTAT behavior is valuable in

compensating the PTAT VBE in a bandgap reference circuit to yield an output voltage with

extremely small temperature variation.

Because of the use of both Bipolar and MOSFETs, the bandgap bias network designed is

found more accurate and stable voltages or currents than possible with ordinary CMOS circuits.

9.7 References[1] Voltage References and Biasing, 1993 Thomas H. Lee; rev. November 19, 2001

(Handout #20: EE214 Fall 2001)

[2] Analysis and design of analog integrated circuits, by Gray and Mayer, John WileyPress,1996


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[3] MOSFET Theory and Design, R.N.Warner,Jr and B.L.Grung Oxford UniversityPress,1999

[4] Semiconductors Academia to Industry, Anurag Nigam private notes.

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