Current mode bandgap reference

8/10/2019 Current mode bandgap reference

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A Novel Temperature Stable Current Mode Bandgap

For Wide Range of Supply Voltage Variation

Sovan Ghosh

Department of Electrical Engineering, IIT Madras


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Voltage Reference

Analog circuits incorporate the voltage and current

references extensively . Such references are dc quantity that

exhibit-

A minimum dependence on the supply and processparameters.

It has a well defined dependence on the temperature

(PTAT, constant Gm, orTemperature Independent)We will analyze the operation of a temperature independent

voltage reference.


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BANDGAP REFERENCE

One representative reference satisfying these keyparameters is the bandgap voltage reference.

The bandgap output voltage is realized by adding

a voltage that is complementary-to-absolute-temperature (CTAT) to another voltage which is

proportional-to-absolute-temperature (PTAT) to

yield a first-order temperature-compensatedvoltage.


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First Order Bandgap CircuitNow if we assume that the Op-Amp

is working perfectly in its negativefeedback configuration then current

I2is given by

I2=(VBE1-VBE2)/R3

VBE1=VTln (I1/I0)

VBE2=VTln (I2/NI0)V1=V2

I1R1=I2R2

I2=(VBE1-VBE2)/R3=VTln (R2*N/R1)/R3


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Temperature stability of first order Bandgap

Several solutions to improve the temperature behavior exist. But They require

precision matching of current mirrors or a pre-regulated supply voltage and

Sometime special process also.

Fig: Variation Of Output voltage of a first order Bandgap with temperature.


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Low Voltage Bandgap

Current Mode References Voltage Mode References


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Voltage Mode References(VMR)

This method uses a reverse

bandgap voltage principle.

Instead of adding a VBEvoltage

to a scaled VTvoltage, voltage-

mode references add a VTvoltage to an attenuated VBE

voltage.

Main draw back of this

implementation is that it need

special process (TwinWell/BICMOS) to get high

quality BJT.

It needs separate bias current.

.

Fig: Conventional Low Voltage VMR


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Drawbacks

Transistors Q1 and Q2 are fabricated in low voltage twin well

process. Figure below shows a Low voltage twin-well CMOS

process.


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Prev. Slide Continued.

When the NPN device is fabricated, a parasitic PNP device is

formed from the base and collector of the NPN to the p-typesubstrate. When the NPN device is saturated, the parasitic PNPdevice begins operating in the forward-active region since theemitter-base voltage (VEB) of the PNP is equal to VBCof the NPN.This means we cant neglect the base current anymore and asmall change in VCE1 will change the IB1significantly.

Twin Well or BICMOS processes are costlier.

Another disadvantage is that the circuit requires a separate biascurrent source for proper operation instead of using a feedbacksystem to control the current of the reference core. The use of aseparate current source causes the currents inside the naturallogarithm to rely on temperature-dependent parameters insteadof ratios of resistors as or ratios of transistor sizes . Hence, itcomplicates the calculation of the scale factor. This currentsource also degrades the PSRR.


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Current Mode Reference(CMR)

Though it has high flat bandand 1/f output noise problem

due to pMOS current mirror.

But this types of reference can

operate in low supply voltage

and can be port to different

process. Minimum Supply Voltage is

limited by the common mode

of the amplifier.

Fig: Conventional Low Voltage CMR


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Detail Analysis Of the New Current Mode

Reference

Circuit Diagram

Amplifier/Op-Amp Architecture

Operational Details Performance Result

Comparative Analysis


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Circuit Diagram

Fig: Circuit Diagram of The Proposed Bandgap Reference.


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Amplifier Circuit

Amplifier/Op-Amp Circuit Bias_genarator for the amplifier


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Analysis

Both the nMOS and pMOS input pair of the amplifier is biased at sub

threshold region of operation. The biasing circuit ensured that tail current of

nMOS input pair Intail= Ibias- Iptailirrespective of supply and common mode

voltage. So Iptail+ Intailis also constant. Now the DC gain of the amplifier is

given by Gm*R where Gmis input effective trans conductance of the

amplifiers input pairs and R is the impedance seen by looking into thecircuit from node PBIAS. Now R can be approximately written 1/(*IMp7)

where is a process dependent constant and IMp7 is the source to drain

current of Mp7. As Intail+ Iptailis constant and Inbiasis constant so the biasing

current of the output transistor IMp7is also constant; i.e. R is constant. Now

the Gmis given by gmn+gmpwhere gmnis nMOS input pairs trans

conductance and gmpis pMOS input pairs trans conductance. Nowgmp=(iptail/2)/Vtand gmn= (intail/2)/Vt. Where iptailand intailare biasing current as

shown in fig. 5 and Vtis thermal voltage. So Gm= gmn+gmp= ibias/(2*Vt)

which is independent of supply and common mode voltage.


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Performance Of the Amplifier

0.4 0.6 0.8 1.0 1.2 1.467

68

6970

71

72

73

74

75

76

77

78

79

80

81

82

83

Amplifier'sDCGainin

dB

Input Common Mode Voltage in volt

For 220 nM

For 180 nM

Fig: Variation of Amplifier gain with input Common Mode Voltage


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Performance Of the BG

-60 -40 -20 0 20 40 60 80 100 120 1400.71640

0.71645

0.71650

0.71655

0.71660

0.71665

0.71670

0.71675

0.71680

B

A

B

andgapOutputVoltageinVolt

Temperature(.C)

A- For 180 nm

B- For 220 nm

Fig: Variation of Bandgap Output Voltage with Temperature


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Continued.

0.000 0.005 0.010 0.015 0.020

0.7164

0.7165

0.7166

0.7167

0.7168

0.7169

1.50

1.75

2.00

2.25

2.50

2.75

3.00

3.25

B

C

D

Amplitude(V)

Time (s)

D-Supply Voltage

C-Bandgap output for 180 nm

B-Bandgap Output for 220 nm

Fig: Variation In Bandgap Output Voltage with Supply Voltage Variation


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Continued.

100

101

102

103

104

105

106

107

108

109

-90

-80

-70

-60

-50

-40

-30

-20

-10

PSRR

(dB)

Frequency (Hz)

For 220 nm

For 180 nm

Fig: Variation of PSRR of proposed Bandgap with frequency.


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Comparative Analysis

Parameters [12] [9] [10] [11] This work

Supply

Voltage (V)

2 1.2 2 2.5 1.5 / 3

Supply Current (A) 25 40 23 38 11.2

Ref.

Voltage (V)

1 .487 1.14 .617 .716

Temp.

Coefficient

(ppm/C)

3.68 8.9 5.3 3.9

to

13.7

2.7

Temperature

Range

-40C to

150C

-40C to

110C

0C

to100C

-50C to

150C

-55C

to125C

Line Regulation (%

/V)

- .24 .286 .039 .028

CMOS

Technology (m)

0.35 0.5 0.6 0.35 0.22 / 0.18


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References


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Current mode bandgap reference

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