Asymmetric Interleaved Multiphase Dc Dc … new.pdfPriyanka Reddy.G, et,al., International Journal...
Transcript of Asymmetric Interleaved Multiphase Dc Dc … new.pdfPriyanka Reddy.G, et,al., International Journal...
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7048
Asymmetric Interleaved Multiphase Dc–Dc Converters
with Unbalanced Nonlinear Loads for Ripple
Minimization
G.Priyanka Reddy1, Dr.D.BalaGangi Reddy2, Department of Electrical & Electronics Engineering,
PG Student1, 2Vidya Jyothi Institute of Technology, [email protected]
Abstract: Non-linear loads, especially power
electronic loads, create harmonic currents and
voltages in the power systems. If the mains voltage
is undistorted, but nonlinear loads are connected to
the electrical grid, the current harmonics produced
will cause voltage distortions in the line
impedances, and the voltage at the load terminals
will also be distorted. Proposed control of harmonic
elimination that allows for ripple minimization
under asymmetric conditions can be extended for
unbalanced nonlinear loads the indiscriminate use
of non-linear loads has given rise to investigation
into new compensation equipment based on power
electronics. The aim of this equipment is the
elimination of harmonics in the system thereby
effectively minimize the current ripples under
unbalanced nonlinear loads
Keywords: DC-DC Converter, Ripple
minimization, nonlinear loads, Harmonic
Elimination
Introduction:
Current ripple cancellation is an important feature
of multiphase switching converters, as it enables
each individual converter of the system to operate
at a higher ripple than the overall load-current
ripple through interleaving of the phases. This yield
significantly lower value for the inductor and
capacitors of each converter, and it can lead to
substantial reductions in converter size and cost,
while increasing the efficiency. Symmetric
multiphase dc-dc converters are widely used in
power electronics, as they enable the processing of
high power through splitting the overall load-
current into multiple phases. Distributing the
processed power symmetrically between the phases
and performing ripple minimization through
interleaving is well understood. However, in recent
applications such as maximum power point (MPP)
tracking for solar photovoltaic (PV), converters are
forced to operate under asymmetric conditions, due
to differences in the sources or loads of each
converter. This work presents a control technique,
based on harmonic elimination that allows for
ripple minimization under asymmetric
conditions.In standard symmetric multiphase
converters(see Fig. 1), where the output current is
the sum of allphase currents, it is possible to
accomplish a load-current rippleminimization by
phase-shifting the switching functions of eachphase
by an angle determined by
Fig. 1. Standard multiphase-interleaved converter
topology with common inputand output voltages.
Existing system:
Recently, asymmetric phase-shifting has been used
to account for imbalances in the converter phases
due to component tolerances, and in the context of
EMI noise shaping, where certain higher order
harmonics can be reduced, which therefore reduces
the filter size as dictated by EMI regulations.
However, little improvement can be achieved due
to practical limitations such as measurement errors
and signal delays in the complex control circuitry.
Usually, component tolerances are small, which
means that the deviations from symmetrical
operation are limited. Consequently, the additional
cost introduced by the more sophisticated control
might not be justified.
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7049
Proposed system:
Interleaving of the different converters and
applying a symmetric phase-shift will yield some
benefits in the architecture. However, methods that
go beyond this technique are required to minimize
the output current ripple under asymmetric
operating conditions, which will be explored in this
work. The presented results are universally
applicable for different dc-dc converter topologies,
such as buck-type (buck, buck-boost, flyback) and
boost-type (boost, boost-buck, SEPIC) converters.
In the system, all the outputs of the dc-dc
converters are connected in series - supplying one
common load. However, since the operating point
of each sub-module may differ due to shading,
manufacturing tolerances, cell damage, and aging;
the duty cycles of the individual converters are
oftentimes different. These operating conditions are
different from what is usually referred to as multi-
phase interleaved converters as described above.
The average output current is identical for all three
converters, but the output voltages are different due
to the series connection.
Fig. 2. Multiphase dc–dc buck converter in a solar
PV application.
Recently, asymmetric phase-shifting has been used
to accountfor imbalances in the converter phases
due to component tolerances[12]–[14], and in the
context of EMI noise shaping, wherecertain higher
order harmonics can be reduced, which
thereforereduces the filter size as dictated by EMI
regulations [15]–[17].This method is also employed
in multilevel-cascaded H-bridges with non equal
dc-link voltages to reduce sideband harmonics[18],
[19]. However, as demonstrated in [12], [13], little
improvementcan be achieved due to practical
limitations suchas measurement errors and signal
delays in the complex controlcircuitry. Usually,
component tolerances are small, whichmeans that
the deviations from symmetrical operation are
limited.Consequently, the additional cost
introduced by the moresophisticated control might
not be justified. Contrarily, phaseshiftingfor non-
uniform duty ratios and different input sourcesfor
each phase is a more relevant field of application
for thesetechniques that is not well understood, and
has not been exploredin the literature. Fig. 2 shows
a schematic drawing ofan emerging application
where nonuniform duty ratios occura single
photovoltaic (PV) panel is usually divided into
threesubmodules, which are connected to separate
inputs of the converters.Each power converter,
performs MPP tracking for onesubmodule. The
MPP of a PV cell varies with irradiation
andtemperature. It may also change throughout the
lifetime of acell due to aging. Fig. 3 shows the
variation of the MPP andthe change in the
respective voltage VMPP for different levelsof
irradiation in the case of a single PV cell. As has
beenshown, operating individual panels [11], or
even submodules[20]–[23] at their individual
MPPs, can yield a significant improvementin
energy capture in PV applications. In
addition,possible implementations and the
corresponding control of distributedmaximum
power point tracking (DMPPT) are also presentedin
[24]–[28]. The topology shown in Fig. 2 is used as
anexample in this paper. MPP tracking is
performed locally on asubmodule level through a
dc–dc converter that is connected toa string of solar
cells at its input. The global maximum powerpoint
tracking is done by the inverter and can be
performed ondifferent levels, e.g., for all panels, a
single string, or a singlepanel. In the system of Fig.
3, all the outputs of the dc–dc convertersare
connected in series—supplying one common
load.However, since the operating point of each
submodule may differdue to shading,
manufacturing tolerances, cell damage, andaging;
the duty cycles of the individual converters are
oftentimesdifferent. These operating conditions are
different fromwhat is usually referred to as
multiphase-interleaved convertersas described
previously. The average output current is
identicalfor all three converters, but the output
voltages are different dueto the series connection.
In this application, it is desirable toemploy
interleaving of the module (or submodule)
convertersto reduce the overall current ripple, and
enable the use of small,low-cost inductors in each
converter. This is still possible, becauseof the
common output current. Furthermore, the
DMPPTconverters do not require large electrolytic
capacitors, as they donot need to buffer the line-
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7050
frequency power ripple. This ripple isbuffered by
the inverter, which is connected to the output of the
DC–DC converters. The dc input ripple is typically
buffered byPV interfacing circuits in modern grid-
connected PV inverters 29].Interleaving of the
different converters and applying a
symmetricphase-shift will yield some benefits in
the architectureof Fig. 2. However, methods that go
beyond this technique arerequired to minimize the
output current ripple under asymmetricoperating
conditions, which will be explored in this study.
The presented results are universally applicable for
different dc–dcconverter topologies, such as buck-
type (buck, buck-boost, flyback)and boost-type
(boost, boost-buck, SEPIC) converters.This study
represents an expansion of our earlier
conferencepaper [30], and includes a more detailed
description of the proposedcontrol method, as well
as additional discussions andmore extensive
experimental results.
Fig. 3. DMPPT topology used as an example in this
study.
2. Interleaved Buck Converters To solve the problems of large current ripples
associated with conventional buck converters,
interleaved buck converter are used by connecting
two or more buck converters in parallel.
Interleaving technique not only reduces output
current ripples but also increase the power ratings
[8, 9]. Figure 4 shows the circuit diagram of a two
phase interleaved buck converter. This converter
uses two same inductors in two parallel phases.
There are four states of operation in one switching
period and during state-I and state-III, when current
in one phase increases the current in the other
phase decreases and there is a ripple cancellation
effect which results in small output current ripples.
The current is shared among the two phase which
decrease the conduction losses and improve
efficiency and can be used in high power ratings.
However, this topology does not lowers the voltage
conversion ratio and still suffer from small duty
ratio operation for high step down voltage
conversion. The voltage gain of a simple buck and
interleaved buck converter is same.
Fig.4. Two Phase Interleaved Buck Converter
Interleaved buck converters with extended duty
cycle have been proposed for high step-down
voltage conversion [10-12]. The concept can be
generalized to more than two phase. This topology
can perform a high step down voltage conversion
along with ripples cancellation feature of simple
interleaved buck converter.
Multilevel buck converters Multi-level (2-level, 3-level, and 5-level) buck
converters are proposed for decreasing the current
ripples and voltage stress of the switches [50-52].
Flying capacitors along with additional switches
are used to get the same characteristic of
interleaving buck converter in minimizing
switching ripples and an additional advantage of
reducing the switch stress.
3.Mathematical Description of the Problem
The previous section provided numerous examples
in the literature[1]–[11] that describe standard
interleaved multiphaseconverters in different
applications. Additionally, asymmetricphase-
shifting techniques have recently been proposed to
compensatefor component tolerances [12]–[14],
and a number ofdifferent applications for these
techniques have been proposedin [15]–[17]. This
paper extends the aforementioned studies tothe
general case of different operating points for the
converter ofeach phase inmultiphase circuits.
Thiswill facilitate rippleminimizationin DMPPT
applications such as described in [20]–[28].A
keycontribution of our proposed analysis technique
is that it isbased on a more universally applicable
frequency-domain descriptionof the converter
current waveforms, as opposed to atime-domain
description as outlined in [34], [35]. [36]–[38]
describethe mathematical fundamentals of the
presented analysis.
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7051
Fig.5. Characteristics of Two Phase Interleaved
Buck Converter
Current ripple cancellation for asymmetric
multiphase interleaved dc-dc switching converters
A. Two Phases (N = 2)
For the case of two converter phases (N = 2), a180◦
shiftof the operation between phases yields the
optimal cancelationeffect. However, a complete
cancelation of a certain harmonic ripple component
is not possible under asymmetric operating
conditions. The conditions for improved ripple
cancelation in asymmetricmultiphase circuits are
derived for the case of general N here.
B. Derivations for General N
In multiphase dc–dc converters N current ripple
waveforms can be observed where the shape varies
depending on the converter type and operation
mode (see [31] for an overview). The framework
presented here is universally applicable and can be
used for various converter types and modes of
operation.
Fig.6. Two Converter Phases (N = 2), a180◦ shift of
the operation
As one illustrative example, consider the buck
converter. Fig. 5 shows the inductor current ripple
waveform for buck-type converter topologies
(buck, buck-boost, flyback) in continuous
conduction mode (CCM). This waveform is used as
an example in the derivations here. However, it
should be noted that the general method presented
here is applicable to other waveforms as well. In
the considered PV application, each submodule
may operateat a slightly different voltage and
current, owing to a mismatch in the I–V
relationship between submodules. This mismatch
can occur due to manufacturing variability, partial
shading, aging, and dirt accumulation. The
different input sources cause different magnitudes
of the average output voltages Vout,n in the output
The overall current ripple can be obtained by
summing up all N ripple components, In standard
symmetric multiphase converters where the output
current is the sum of all phase currents, it is
possible to accomplish a load-current ripple
minimization by phase-shifting the switching
functions of each phase by an angle determined by
which are denoted by˜in The magnitude of˜isum(t)
can be minimized by adequately phase-shifting the
ripple components of the individual phases.
Performance Evaluation by Simulation
To evaluate the performance of the proposed ripple
cancelationmethod, simulations in MATLAB were
carried out. Additionalsimulation results using the
circuit simulator LT spice have been presented in
[30] and [32]. The three-phase buck
convertertopology shown in Fig. 3 is used as an
example. The simulationsrelate to the summed
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7052
inductor currents.We explore the improvementof
our proposed method compared to the
conventionalphase-shifting technique (φ01 = 0◦,
φ02 = 120◦, φ03 = 240◦)over a wide range of
operating conditions. For each set of
operatingconditions, the converter operation was
simulated withthe conventional, and subsequently
with the proposed, phaseshiftingmethod applied.
We considered again the application of submodule
MPP tracking.In this case, it is possible to reduce
the variable space tothree dimensions by assuming
that the input voltages are approximatelyidentical
for all converters. This is valid for slightvariations
between submodules, as the MPP voltages do
notchange substantially [11] Moreover, the current
ripple Δin, as given in (17), is only linearly
dependent on theinput voltages Vin,n, while it
shows a quadratic dependence on Dn. This means
that in case of a change in input voltage (e.g.,due to
an irradiation change of the submodules), the
magnitudeof Δin is scaled by a linear factor,
yielding similar results.Consequently, the
magnitudes of Ankare approximately
onlydependent on the duty cycle Dnof each phase,
as the currentripple is now also only dependent on
this variable, if Vin,nisfixed. For the simulations,
the input voltages havebeen chosen to be Vin,
1 = Vin, 2 = Vin,3 = 12 V. The operating duty ratio
Dnof each converter has been varied between0.1
and 0.9 with a step size of 0.1. The calculations
were carriedout with the goal of minimizing the
fundamental ripplecomponent (k = 1). The result is
a 9 × 9 × 9 matrix holdingthe decrease of the
summed inductor current ripple in
percent.However, not all values within the matrix
are independent, ascombinations of converters
running at certain duty ratios arecalculated multiple
times. It shows the results of the aforementioned
simulations, where the averageimprovement was
calculated over D3 = 0.1 to 0.9, whileD1 and D2
have been varied. By averaging over D3, the
aforementioned9 × 9 × 9 matrix is reduced to the
displayed 9 × 9table. Consequently, the entries do
not represent a single operatingcondition for D3 but
rather an average. The resulting matrixis
bisymmetric, due to the previously mentioned
dependence ofthe results. The main diagonals have
been highlighted in red and blue, respectively.
However, this is only requiredif it is intended to use
more than the three phases to improveripple
cancelation. In the PV application discussed here,
there is additional complexity of synchronization
between PV modules(e.g., added wiring) if an
asymmetric phase-shift beyonda single PV module
is desired. In a typical scenario, we envisionthat
ripple cancelation between three submodules
alone(i.e., at the PV module level) provides the best
trade-off betweenimplementation complexity and
overall component size/cost reduction.
Fig. 7. Shows the calculated phase currents for
three converters at the operating conditions
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7053
Fig.8. Shows the calculated phase currents THD at
the operating conditions
Fig.9.the waveform shown in performing the
calculations in the frequency domain
Fig.10. The waveform shown in performing the
calculations in the frequency domain
Fig.11. In terms of the phase-shift angle φ0n in
Fourier series.
Fig.12.Harmonic Frequency Components of the
Ripple
Fig.13.The phase shift is left as the only degree of
freedom to influence the current ripple
Fig.14.The phase shift is left as the only degree of
freedom to influence the current ripple
Fig.15.Multiples of the switching frequency
The input voltages, input currents, output voltages,
output currents, and duty ratios of all converters are
determined by the operating conditions.
Consequently, the phase shift is left as the only
degree of freedom to influence the current ripple.
To describe the waveform shown in performing the
calculations in the frequency domain makes it
possible to directly influence certain harmonic
frequency components of the ripple, which are
occurring at multiples of the switching frequency.
This makes the proposed solution more universally
applicable than a time-domain analysis such as
outlined in [34], [35]. In practice, the goal is
typically to minimize the lowest harmonics of the
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7054
ripple, as they are usually dominant and dictate the
output filter requirements.
Conclusions
A brief survey of high step-down dc-dc converters
is carried out in this study. The limitations of
conventional dc-dc converters used for high step-
down dc-dc voltage conversion are discussed.
Various non-isolated dc-dc step-down converter
topologies solving these limitations are reviewed.
The circuit diagram of each technique/topology is
given and main points are discussed. Interleaving
technique is good for reducing ripples: quadratic,
tapped & switched capacitor can avoid narrow duty
cycle for high step down conversion, coupled
inductors can minimize ripple as well as extend
duty cycle & multilevel is good for reducing switch
stress. A comprehensive review of the published
research work on non-isolated dc-dc step down
converters is given and around twenty two different
techniques used for such type of conversion are
briefly explained. A comparison of these topologies
is carried out in relation to step down conversion
ratio/voltage gain, switch stresses, output current
ripple and number of components used. Two best
topologies are identified and there simulations
results are given. This paper well provides a clear
background to the students and researchers who
want to do further research on step down dc-dc
converters.
• Control strategy that enables improved ripple
cancellationfor multiphase converters with
asymmetric operatingconditions has been
presented.
• Performance has been verified by simulations
andexperimental results.
• Calculation of uneven phase angles based on
thefrequency domain representation of the current
waveformsgoes beyond the previous works in the
field.
REFERENCES
[1] O.Garcia, P. Zumel, A. de Castro, and J.
A. Cobos, “Effect of the tolerancesin
multi-phase dc-dc converters,” in Proc.
IEEE 36th Power Electron. Spec.Conf.,
2005, pp. 1452–1457.
[2] Z. Lukic, S. M. Ahsanuzzaman, A.
Prodic, and Z. Zhao, “Self-
tuningsensorless digital current-mode
controller with accurate current sharingfor
multi-phase dc-dc converters,” in Proc.
24th Annu. IEEE Appl. PowerElectron.
Conf. Expo., 2009, pp. 264–268.
[3] O. Garcia, P. Zumel, A. de Castro, P.
Alou, and J. A. Cobos, “Current
selfbalancemechanism in multiphase buck
converter,” IEEE Trans. PowerElectron.,
vol. 24, no. 6, pp. 1600–1606, Jun. 2009.
[4] Z. Wang and H. Li, “Three-phase
bidirectional dc-dc converter with
enhancedcurrent sharing capability,” in
Proc. IEEE Energy Convers. Congr.Expo.,
2010, pp. 1116–1122.
[5] B.Miwa, D. Otten, and M. Schlecht, “High
efficiency power factor correctionusing
interleaving techniques,” in Proc. Appl.
Power Electron. Conf.Expo.,Feb. 1992,
pp. 557–568.
[6] B. A. Miwa, “Interleaved conversion
techniques for high density
powersupplies,” Ph.D. dissertation, Dept.
Elect. Eng. Comput. Sci.,
MassachusettsInst. Technol., Cambridge,
MA, USA, Jun. 1992.
[7] D. Perreault and J. Kassakian,
“Distributed interleaving of
paralleledpower converters,” IEEE Trans.
Circuits Syst. I: Fundam. Theory
Appl.,vol. 44, no. 8, pp. 728–734, Aug.
1997.
[8] T. Kohama and T. Ninomiya, “Automatic
interleaving control for
paralleledconverter system and its ripple
estimation with simplified circuitmodel,”
in Proc. 7th Int. Conf. Power Electron.,
2007, pp. 238–242.
[9] R. G. Retegui, M. Benedetti, R. Petrocelli,
N. Wassinger, and S. Maestri,“New
modulator for multi-phase interleaved
dc/dc converters,” in Proc.13th Eur. Conf.
Power Electron. Appl., 2009, pp. 1–8.
[10] S. V. Dhople, A. Davoudi, and P. L.
Chapman, “Steady-state characterizationof
multi-phase, interleaved dc-dc converters
for photovoltaicapplications,” in Proc.
IEEE Energy Convers. Congr. Expo.,
2009, pp.330–336.
[11] M. Rashid, Power Electronics Handbook.
Burlington, MA, USA: Butterworth,2011.
[12] [12] M. L. A. Caris, H. Huisman, J. M.
Schellekens, and J. L.
Duarte,“Generalized harmonic elimination
method for interleaved power
amplifiers,”in Proc. IEEE 38th Annu.
Conf. Ind. Electron. Soc., 2012,pp. 4979–
4984.
[13] M. L. A. Caris, H. Huisman, and J. L.
Duarte, “Harmonic eliminationby adaptive
phase-shift optimization in interleaved
converters,” in Proc.IEEE Energy
Convers. Congr. Expo., 2013, pp. 763–
768.
Priyanka Reddy.G, et,al., International Journal of Technology and Engineering Science [IJTES]TM
Volume 4[1], pp: 7048-7055, 2016
ISSN: 2320-8007 7055
[14] S. Waffler, J. Biela, and J. Kolar, “Output
ripple reduction of an automotivemulti-
phase bi-directional dc-dc converter,” in
Proc. IEEE EnergyConvers. Congr.
Expo.,Sep. 2009, pp. 2184–2190.
[15] C. Wang, M. Xu, and F. Lee,
“Asymmetrical interleaving strategy
formulti-channel PFC,” in Proc. IEEE
Appl. Power Electron. Conf. Expo.,2008,
pp. 1409–1415.
[16] T. Beechner and J. Sun, “Asymmetric
interleaving—A new approach tooperating
parallel converters,” in Proc. IEEE Energy
Convers. Congr.Expo.,2009, pp. 99–105.
[17] L. Xing and J. Sun, “Motor drive system
EMI reduction by
asymmetricinterleaving,” in Proc. IEEE
Control Model. Power Electron., 2010,
pp.1–7.
[18] M. Liserre, V. G. Monopoli, A.
Dell’Aquila, A. Pigazo, and V.
Moreno,“Multilevel phase-shifting carrier
PWM technique in case of non-equaldc-
link voltages,” in Proc. 32nd Annu. Conf.
IEEE Ind. Electron., 2006,pp. 1639–1642.
[19] T. L. M., J. N. Chiasson, Z. Du, and K. J.
McKenzie, “Elimination ofharmonics in a
multilevel converter with nonequal DC
sources,” IEEETrans. Ind. Appl., vol. 41,
no. 1, pp. 75–82, Jan. 2005.
[20] R. C. N. Pilawa-Podgurski, “Architectures
and circuits for low-voltage
energyconversion and applications in
renewable energy and power
management,”Ph.D. dissertation, Dept.
Elect. Eng. Comput. Sci.,
MassachusettsInst. Technol., Cambridge,
MA, USA, 2012.
[21] S. Qin and R. C. N. Pilawa-Podgurski,
“Sub-module differential powerprocessing
for photovoltaic applications,” in Proc.
Appl. Power Electron.Conf. Expo., 2013,
pp. 101–108.
[22] S. Qin, A. Morrison, and R. Pilawa-
Podgurski, “Enhancing micro-
inverterenergy capture with sub-module
differential power processing,” in
Proc.IEEE Appl. Power Electron. Conf.
Expo., 2014, pp. 621–628.
[23] S. Qin, S. Cady, A. Dominguez-Garcia,
and R. Pilawa-Podgurski, “Adistributed
approach to maximum power point
tracking for photovoltaicsubmodule
differential power processing,” IEEE
Trans. Power Electron.,vol. 30, no. 4, pp.
2024–2040, Apr. 2015.
[24] R. Pilawa-Podgurski and D. Perreault,
“Sub-module integrated
distributedmaximum power point tracking
for solar photovoltaic applications,”
IEEETrans. Power Electron., vol. 28, no.
6, pp. 2957–2967, Jun. 2013.
[25] M. Uno and A. Kukita, “Single-switch
voltage equalizer using multistackedbuck-
boost converters for partially-shaded
photovoltaic modules,”IEEE Trans. Power
Electron., vol. 30, no. 6, pp. 3091–3105,
Jun. 2014.
Author Biography
Dr.D.Bala Gangi Reddy received his
B.Tech, M.Tech and Ph.D degrees
from the College of Engineering,
Jawaharlal Nehru Technological
University, Hyderabad in 1999, 2005
and 2014 respectively. Currently he is working as
Professor in the Department of Electrical and
Electronics Engineering at Vidya Jyothi Institute
of Technology, Aziz Nagar Gate, C.B. Post,
Hyderabad-75; He published numerous papers on
Power systems and FACTS. His current research
interests include Control of Electrical Drives,
Electrical Distribution System and Power Quality
& FACTS.
G.Priyaka Reddy is pursuing her
MTech in Vidya Jyothi Institute of
Technology, She received her
BTech from JNTUH Hyderabad. Her
current research interests include
Control of Electrical Drives, Electrical
Distribution System and Power Quality