‘SnAgCu Solder Joint Fragility’ Peter Borgesen · 3 M, Agere, Altera, AMD, Amkor, Andrew...
Transcript of ‘SnAgCu Solder Joint Fragility’ Peter Borgesen · 3 M, Agere, Altera, AMD, Amkor, Andrew...
‘SnAgCu Solder Joint Fragility’Peter Borgesen‘SnAgCu Solder Joint Fragility’Peter Borgesen
InterestInterest
84 companies and government agencies have signed up for meeting or(mostly) web casts, many from several sites.
3 M, Agere, Altera, AMD, Amkor, Andrew Corporation, Apple, ASAT, ASE, Astronautics, BAE, Benchmark Electronics, Biotronik, Boeing, CALCE, Celestica, Circuitnet, Cisco, Cookson Electronics, Dage, Dell, Delphi, EIT, Emerson & Cuming, EPIC, EPSI, Ericsson, Fairchild Semiconductor, Flextronics, Foxconn, Freescale, GE, Global Advanced Packaging Technology, Goodrich Engine Controls, Guidant, Harman/Becker, Henkel Loctite, Honeywell, HP, IBM, Indium, Intel, Invensys, Itron, Jabil, Kimball, Kodak, Kontron, Kyocera, LSI Logic, Lucent, MacDermid, Medtronic, Motorola, MSL, NASA, National Semiconductor, National Starch, Navy, NIST, Nokia, Northrop Grumman Space, Pemstar, Plexus, Qualcomm, Raytheon, Redback Networks, Reptron, Rockwell, SanMina-SCI, Seagate, Sensarray, SiliconwarePrecision Industries, Smiths Aerospace, Solectron, ST, Sun, Symbol, Texas Instruments, Thales, Tyco Electronics, UIC, Validity Sensors Inc., Visteon
So What’s Up?So What’s Up?
Transitioning to Pb-free soldering the industry faces a series of uncertainties and concerns.
These are already known to include solder pad finish issues.
Recent reports suggest that these may be more serious (general) than anticipated:
There may not be a ‘safe’ pad finish?
We have been urged to do something about this.
The Concern: Solder Pad StrengthThe Concern: Solder Pad Strength
We need/prefer ‘bulk’ solder to be the ‘weakest link’when joint is loaded:
fail here
not here
not here
However, sometimes it isn’t
The Concern: Solder Pad StrengthThe Concern: Solder Pad Strength
How serious is it if failure occurs within the pad intermetallicstructure?
In thermal cycling and thermal excursions in service we almost invariable reach flow stress, so a weaker pad structure may fail in a single or few cycles:
It has to be stronger
displacement
load
The Concern: Solder Pad StrengthThe Concern: Solder Pad Strength
Under mechanical loading (shear test, vibration, drop, ...) flow stress is higher, so pad more easily becomes the weakest link.
This may not be an immediate problem in service (if load never gets large enough to cause failure).
However, if the pad used to be stronger a change of failure mode may indicate ongoing weakening.
SnPbSnPb SolderingSoldering
We are ‘used to’ ENIG issues: ‘black pad’ and degradation with temperature/time
We have established well-understood, quantitatively predictable degradation mechanism for electrolytic Ni/Au
Recent observations on soldering between Ni and Cu-pads have yet to receive much press.
Immersion Ag-coated Cu-pads have caused some concerns (immature processes?)
Cu-pads (OSP, imm. Sn or HASL coated) have otherwise been viewed as safe as long as solderability was retained (BUT ...!)
SnAgCuSnAgCu SolderingSoldering
Not surprising that ENIG issues are exacerbated: SnAgCu solders less readily and consumes Ni much faster
Degradation on electrolytic Ni/Au is expected to be reduced because of higher reflow temperatures.
However, new (?) intermetallic structures seem to offer occasional problems.
Cu-pads are also not ‘safe’: Occasionally severe Kirkendall voiding and other embrittlement mechanism.
So far, we have no reason to believe that changing coating on top of Ni or Cu (OSP, imm. Ag, imm. Sn, HASL, ...) will resolve issues.
So What’s Up?So What’s Up?
No realistic solder pad finish is certain to be immune to ‘embrittlement’ mechanisms.
Problems remind me of well-known ‘black pad’ and time/temperature enhanced ENIG degradation:
They may be more rare, but we don’t know how to safely prevent, screen for, or predict them.
We have been urged to address and resolve issues
Point of this meeting is to share knowledge, assess level of concern in industry, and if necessary discuss how to proceed.
Who Are We?Who Are We?
Surface Mount Technology Laboratory
offers technical and process supportprocess developmentreliability optimization, testing and analysisfailure analysisprocess auditsprototyping
conducts funded research consortium fundedproprietary
SMT LaboratorySMT Laboratory
Technical and Process SupportTechnical and Process Support
Reliability Test• Thermal cycling (cont. monitor)• Thermal shock• Liquid-to-liquid thermal shock• HAST (biased or unbiased)• Humidity / temperature• Mechanical testing
Topic Expert Failure Analysis• Root cause failure analysis• Detailed evaluation using a full range of
analytical tools• Non-destructive analysis• Verification via process simulation• Conflict mediation
Technical and Process Support Technical and Process Support ContinuedContinued
PrototypingGoals• Use latest equipment to aid contract
manufacturers with difficult prototyping challenges
• Help them duplicate the processes• Assemble complex devices involving new
components, materials, products, and processes
• First article build for proof of concept• Design review of components and
materials• Optimization of process parameters
Results• Several hundred completed on our two
state-of-the-art assembly lines in the last 12 months
• Introduction of new technologies for customers: lead free, flip chip, fine pitch CSP
• Shorten development cycle and time to market
• Robust process
Process AuditsGoals• Provide direct, on-site process audits to
review materials, processes, components, handling, storage, inspection, and rework procedures
• Pre-audit activities will involve design reviews and failure analysis
• Prioritized recommendations will increase yields, reduce rework, and improve reliability
Results• Many process audits have been
performed• In general, defects were reduced by 20-
40%
Research ActivitiesResearch Activities
Process DevelopmentExample: 0201 Placement
• Placement of 1.2 million 0201 components with many different process parameters
• Develop best pad and stencil design• Optimize process and design parameter
for achievable accuracy
Example: Pin-in-Paste• PCB thickness• Clearance of components, vias, and test
points• Pin-to-PCB hole clearance• Pin size, shape, and length below PCB• Component standoff• Solder joint volume requirement PCB
hole fill percentage• Stencil aperture size, shape, and position• Screen printer parameter optimization• Solder paste selection
Applied Research Example: Flip Chip Pacemaker
• Material selection and process parameters
• Assistance with board design and process optimization
• Prototype build of functional pacemakers in the SMT Lab
• Reliability tests • Start of production 05/99
Research ConsortiaResearch Consortia
Research conducted by UIC in Binghamton, NY
Principals invited, but not required, to participate• at home and in Binghamton• different companies had residents in SMT Lab (for
3 days – 4 years) • no extra fee
Results presented• at meetings in March, June, & October in
Binghamton• via web casts scheduled for Europe, Asia, America• in presentations, progress reports, manuals &
software tools– posted on secure web site– distributed on CDs (2003 annual CD has 125
reports & presentations)
Research ConsortiaResearch Consortia
Manufacturing process related research• UFP Consortium 1992
• BGA / DCA Consortium 1995
• CSP / DCA Consortium 1997
• Area Array Consortium 1999
• Area Array Consortium 2000
• Area Array Consortium 2001
• Area Array Consortium 2002
• Area Array Consortium 2003
2004 Area Array Consortium Research2004 Area Array Consortium Research
2nd Level Assembly & Reliability
PCB Technology for Lead Free Assembly
Lead Free & Mixed Solder Assembly & Reliability
Flip Chip Assembly & Reliability
Thermal Interface Assembly & Reliability
Strong Emphasis on Materials Science
AgendaAgenda
Tom Gregorich, Qualcomm: Brittle Failure of SAC on Electrolytic Ni/AuMartin Anselm, UIC: Embrittlement of Ni/SnPb/Cu jointsEric Cotts, BU: ENIG & e-Ni/Au with SnPb. Intermetallics in SAC-joints. Pericles Kondos, UIC: Enhanced 'black pad' sensitivity with SAC soldering?Cheng Chiu, Texas Instruments: Kirkendall voiding in Cu-pads.Don Henderson, IBM: Kirkendall voiding and other embrittlement of Cu-pads.Peter Borgesen, UIC: Kirkendall voiding with SnPb solder.Wayne Jones, UIC: So what's in Cu-pads, and how do we see it?Tom Woodrow, Boeing: High vibration testing of solder joints.Bob Sykes, Dage: Solder Bump Testing.Peter Borgesen, UIC: Summary. What now? Options & Discussion
Questions, etc.Questions, etc.
1) Please MUTE your phone until the end.
2) Clarifying questions may be typed in during presentation.
3) You will be instructed on how to use phone during discussion.
4) Questions and comments afterwards: Send me an email ([email protected]) or call (607-779-7343)
Please help spread the word:Please help spread the word:
Same (re-ordered?) agenda for live web casts next week.
Sign-up if you missed part of today, really didn’t get it, ....?
Two of them are timed for Europe/Asia but still open to all:
Repeat web casts (US East Coast times)Monday, 9/20/04, 1pm. Lunch break around 3pm.Tuesday, 9/21/04, 10am. Break around 12:30.Wednesday, 9/22/04, 8am (afternoon in Europe)Wednesday, 9/22/04, 9pm (Thursday morning in Asia)
Friday, 9/24/04 or Monday, 9/27/04 ?
NOTE!!NOTE!!
1) Please MUTE your phone !!!
2) Please log off if you are leaving the room for more than a few minutes:
We are paying per link per minute.
You can always log in again (as long as we are).