CMOS low noise amplifier design utilizing monolithic transformers
Area Reduction of Millimeter-Wave CMOS Amplifier Using ...
Transcript of Area Reduction of Millimeter-Wave CMOS Amplifier Using ...
Area Reduction of Millimeter-Wave CMOS Amplifier Using Narrow
Transmission Line
Yuki Tsukui,Hiroki Asada, Changyo Han,Kenichi Okada,and Akira Matsuzawa
Tokyo Institute of Technology, Japan
1
Y. Tsukui, Tokyo tech.
Outline
• Background• Transmission line
– Structure– Characterization
• Power amplifier– Schematic– Die micrograph– Simulation
• Conclusion
2Background
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(IEEE802.15.3c )High-speed file/data transfer
3.5Gbps(QPSK)
Application
MIC The radio use web site:
http://www.tele.soumu.go.jp/index.htm
Characterization of 60GHzAttenuation is large.
Wide bandwidth can beused without license.
Suitable for short range and veryhigh-speed wireless communication
7Gbps(16QAM)
360GHz power amplifier
• Lumped-element componentVery widelyScalable model is difficult to be built.
• Transmission line(TL)Scalable
Y. Tsukui, Tokyo tech.
Matching block
4
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Loss of passive devices
GaAs substrate(insulator)
Si substrate(conductive
& lossy)
100µm
No backside metallizationConductor loss + Substrate eddy-current loss50Ω T-line loss: 0.5 – 1.5dB/mm @60GHz
300µm
metal
CMOS T-line
Si CMOS GaAsWire width 10µm 100µmWire thickness 1 – 2µm 10µmDielectric thickness < 5µm 100µm
5The structure of TL
W: The width of signal lineG : The distance between
the side grounds
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The optimization of TL by W and G
GSSW G
µ
0.2µm
MT
SubM1
320 m
7.54µm7.54µm
0.2µm
MT
M1M2
0.2µm1.17µm GND
GND
GND GNDS
6TL at 60GHz
Larger R, L
Y. Tsukui, Tokyo tech.
Larger α, β
Equivalent circuit
R
CG
L
G is not so large in CMOS.
7Wavelength
Wavelength of transmission line:
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Larger β Smaller wavelength
Narrow TLs lead to shorter matching blocks.
8The characterizations of TL
Y. Tsukui, Tokyo tech.G=20µm is fixed and W is varied.
0
0.5
1
1.5
2
2.5
0 10 20 30 40 50 60 70
α [d
B/m
m]
Frequency [GHz]
W= 4[µm]W= 5[µm]W= 6[µm]
00.5
11.5
22.5
33.5
0 10 20 30 40 50 60 70
β [r
ad/m
m]
Frequency [GHz]
W= 4[µm]W= 5[µm]W= 6[µm]
0
3
6
9
12
15
0 10 20 30 40 50 60 70
Q
Frequency [GHz]
W= 4[µm]W= 5[µm]W= 6[µm]
4550556065707580
0 10 20 30 40 50 60 70
Z0 [Ω
]
Frequency [GHz]
W= 4[µm]W= 5[µm]W= 6[µm]
9The characterizations of TL
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Comparison• W= 6µm, G=20µm• W=10µm, G=40µm
10Schematic
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• 65nm CMOS process• Transistor size: 2×20µm
MIM TL
TL
Vgs
Vdd
Vin
Vout
• 1-stage amplifiers are designed by using the TLs of W=6 and 10µm for matching blocks.
11Simulation (Power gain)
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• W= 6µm : 6.1dB• W=10µm : 7.1dB
02468
1012
50 55 60 65 70
Gai
n [d
B]
Frequency [GHz]
W= 6[µm]W=10[µm]
12Loss per wavelength
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00.5
11.5
22.5
33.5
44.5
5
50 52 54 56 58 60 62 64 66 68 70
Loss
per
wav
elen
gth
[dB
]
Frequency [GHz]
W= 6[um]W=10[um]
• W= 6µm : 3.2dB• W=10µm : 2.1dB
13Simulation (Power sweep)
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• P1dB=2.2 dBm• Psat=9.6dBm• PAE@P1dB=6.8%
(a)W = 6µm (b) W = 10µm• P1dB=3.0dBm• Psat=9.3dBm• PAE@P1dB=9.0%
0
4
8
12
16
20
-15
-10
-5
0
5
10
-20 -15 -10 -5 0 5 10
PAE
[%]
Out
put p
ower
[dB
m]
Gai
n [d
B]
Input power [dBm]
OutputGainPAE
0
4
8
12
16
20
-15
-10
-5
0
5
10
-20 -15 -10 -5 0 5 10
PAE
[%]
Out
put p
ower
[dB
m]
Gai
n [d
B]
Input power [dBm]
OutputGainPAE
14The die micrograph
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(a) W = 6µm (b) W = 10µm
• W= 6µm : 230µm×280µm• W=10µm : 280µm×590µm
Using narrow TLs reduced chip area by 60%.
15Conclusion
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• Transmission line with 6µm signal line width is used to investigate area reduction of mmW amplifiers.
• The core size of the amplifier is reduced by 60% while achieving the standard performance.