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    Online Postgraduate Courses for the Electronics Industry

    Printed Circuit Design

    Unit 1: Review of PCB Design

    Contents

    1 Introduction

    2 Standards

    3 Schematic Capture

    3.1 Hierarchical Circuit Design

    3.2 Measurement Units: Imperial or Metric

    4 Basic Multi-Layer PCB construction

    4.1 Dielectric

    4.2 Copper foil

    4.3 Pads

    4.4 Vias and Through-Holes

    4.5 Tracking

    4.6 Clearances

    5 PCB Layout

    5.1 Imported Data

    5.2 Component Placement & Design

    5.3 Routing

    5.4 Clean Up Pass

    5.4 Design Rule Check (DRC)

    5.5 Forward and Back Annotation

    6 Manufacturing Data

    Layer Schematics

    Doumentation

    Typical Documentation Package

    Content, Format and Structure

    7 Design for Manufacture

    7.1 Panelisation

    7.2 Tooling Strips

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    7.3 Fiducial Marks

    7.4 Thermal Relief

    7.5 Electrical Testing

    7.6 Submitting Design for Manufacture

    8 Multi - Layer Design Issues

    8.1 Power Planes8.2 Good Grounding

    8.3 Good Bypassing

    8.4 High Frequency Design Techniques

    8.5 Double Sided Loading

    9 Summary

    1 Introduction

    The aim of this unit is to introduce and review the basic principles of PCB design which have already beencovered in the module Concepts of PCB Design. Some people will have completed this module and shouldlook on this unit as a review and a revision of the topics to be considered. If you have not completed themodule then this material will serve as an introduction to the field.

    For some designers, the PCB design will be a natural and easy extension of the design process. But for manyothers the process of designing and laying out a PCB can be a very daunting task.

    To design a PCB it often takes a great deal of knowledge and talent to position hundreds of components andthousands of tracks onto an intricate design that meets a whole host of physical and electrical requirements.

    Proper PCB design is very often an integral part of a design. In many designs (high speed digital, low levelanalogue and RF to name a few) the PCB layout may make or break the operation and electrical performance ofthe design. It must be remembered that PCB traces have resistance, inductance, and capacitance, in the same

    way as any circuit does.

    The properties of PCB, and how they are constructed, can have a significant effect on the quality of signals andaffect the operation of a circuit. The designer must be aware of these characteristics knowing how, in somecases, to exploit them and, in other cases, how to avoid the problems that these characteristics can give rise to.

    2 Standards

    There are industry standards for almost every aspect of PCB design. These standards are controlled by theformer Institute for Interconnecting and Packaging Electronic Circuits, who are now known simply as the IPC(www.ipc.org). There is an IPC standard for every aspect of PCB design, manufacture, testing. The majordocument that covers PCB design is IPC-2221, Generic Standard on Printed Board Design. This standardsuperseded the old IPC-D-275 standard (also Military Std 275) which has been used for the last half century.

    Local countries also have their own various standards for many aspects of PCB design and manufacture, but byand large the IPC standards are the accepted industry standard around the world.

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    3 Schematic Capture

    Before layout of the PCB can begin, an accurate schematic diagram is needed. If the schematic is not accuratethen the PCB will most likely end up a mess, and take twice as long as it should to produce the final designdata.

    Rubbish-in, rubbish-out is an often used quote, and it can apply equally well to PCB design. A PCB design isa manufactured version of the schematic, so it is natural for the PCB design to be influenced by the originalschematic. If the schematic is neat, logical and clearly laid out, then it really does make the PCB design job a lot

    easier. Good practice has signals flowing from inputs at the left to outputs on the right. With electricallyimportant sections drawn correctly, the way the designer would like them to be laid out on the PCB. Likeputting bypass capacitors next to the component they are meant for. Notes on the schematic that aid in thelayout are very useful.

    E.g., this pin requires a guard track to signal ground, makes it clear to the person laying out the board whatprecautions must be taken. Even if it is you who designed the circuit and drew the schematic, notes not onlyremind yourself when it comes to laying out the board, but they are useful for people reviewing the design.

    The schematic really should be drawn with the final PCB design in mind, where possible.

    Make appropriate use of hierarchical structures to save endless repetition and make the schematic clearer and

    easier to follow.

    3.1 Hierarchical Circuit Design

    Traditional front-end design entry & engineering solutions do not foster collaboration between design teammembers.

    The hierarchical design methodology involves careful division of projects into an extensive tree of smallerdesign entities. Each entity has a specific function and a carefully declared method of interacting with the otherentities. The major reason for using hierarchical description is to hide the vast amount of detail in a design. Byreducing the distracting detail to a single object that is lower in the hierarchy, one can greatly simplify manyoperations.

    Figure 1: (a) Top-level of parallel-access shift register (b) Flip-flop subcomponent (FF).

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    Multiple uses of an entity indicate that the contents are to be repeated at each use. Graphically, an instance canbe seen as an outline (called a footprint or a bounding box) that displays only the boundary of the functionblocks definition, or it can be displayed more fully by showing the contents.

    In general, a hierarchical design methodology provides the following benefits:

    1. It allows the designers to develop a more organised design flow. Collaboration is encouraged to ensurethat critical system decisions are as a result of consensus at an early stage in the process. The lack of ateam-based design can impact time-to-market objectives.

    2. The designers can focus on the functionality of a single design entity. The clear definition if the input andoutput requirements of each entity as result of the operation of the previous stage. Concurrency, thusencourages as each design team will have their own entities which can be designed and tested in isolation. Thisis only possible if a clear and well-defined project structure implemented.

    3. The design overview is an excellent high-level view of the designs overall structure. It is thusstraightforward for controlling project managers to uncover any critical paths ain the design structure and planaccordingly. Any potential troubles caused by these can be built into the project plan and no major delays orproblems will impede the design progress.

    Two fundamental practices in hierarchical design are used; top down and bottom up design techniques.

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    Each of these has its own strengths and weaknesses and allows designers to break a large design into thesmaller more manageable entities as described above. They will both be considered in more detail later.

    Hierarchical Organisation

    The most difficult problem that designers face is that of selecting a hierarchical organisation for their circuit.This organisation defines the way that the designer will think about the circuit, since layout is typicallyexamined one hierarchical level at a time. If the wrong organisation is chosen, it may confuse the designer andobscure simple solutions to the design problem. The circuit may get so convoluted that an awkward hierarchy is

    worse than no hierarchy at all.

    On the other hand, a clean hierarchical organisation makes all phases of design easier. If each level of thehierarchy has obvious functionality and aggregates only those components that pertain to that hierarchical level,then the circuit is easier to understand. For example, with a good hierarchy, simulation can be done effectivelyby completely testing each level of the hierarchy starting at the bottom. Good circuit hierarchy is similar togood subroutine organisation in programming, which can lead to code that is more self-documenting. For bothstructured programming and structured circuit design, a one-to-one mapping of function to structure providesa clean view of the final object.

    Unfortunately, there is no way to describe precisely how to choose a good hierarchical organisation. The properplanning of a circuit is as much an art as the design of the actual components. For this reason, the techniques

    described here are only guidelines; they should be followed not blindly, but rather with an understanding of theparticular design task at hand.

    The first issue to consider is that of top-down versus bottom-up design. In the former, a circuit is designedwith successively more detail; in the latter, a circuit is viewed with successively less detail. The choice ofdirection depends on the nature of the task, and the two techniques are almost always mixed in real design. Thedistinction is further clouded by the fact that the hierarchical organisation may be created with one method(top-down) and then actually implemented in the opposite direction.

    Top Down Design

    In top down methodologies, designers start with a high level understanding of a designs overall flow. The

    general functionality of each design block is developed prior to creating the building blocks themselves. Top down design techniques tend to create more organised designs because the designers must first evaluate thedesigns overall structure. In addition, by focussing on structure and leaving details of a design undefined,designers can delay technical considerations until they are at more manageable levels.

    As an example of top-down design, consider a circuit that computes the absolute difference between twonumbers. This problem starts with the most abstract specification: a description solely in terms of inputs andoutputs. In order to arrive at a hierarchical organisation that shows the complete circuit, a top-down designshould be done. So, starting at the top, the circuit is decomposed into the subcircuits of the absolute valueoperation: subtraction and conditional negation. Subtraction can be further decomposed into negation followedby addition. Negation (in twos-complement number systems) can be decomposed into inversion followed by anincrement. The entire set of blocks can be hierarchically divided into one-bit slices that do adding, inverting,

    and incrementing on a bit-by-bit basis. The lowest level of the design shows the layout for implementing thesefunctions.

    Figure 2: Top-down hierarchical organisation of an absolute-value engine

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    Bottom Up Design

    In bottom up methodologies, designers first create the lower level blocks and then integrate these blocksinto higher level structures. Designers focus their attention on individual sub blocks rather than the designas a whole. Thus, individual blocks can be verified prior to building the entire design. Bottom up designsalso highlight the benefits of re-useable code. Splitting projects into smaller modules helps designers findredundant sections of a project. Designers can then reuse individual blocks of code, which saves time. In

    addition, designers can assemble commonly used functions into their regular design library, allowing blocks ofcode to be reused from project to project.

    This style of design can be used when the details of a circuit are already known and must be properlyimplemented. For example, suppose that a 4K memory chip is to be designed, and further suppose that thedesign for a single bit of that memory is already done. Since the size of this bit of memory is the mostimportant factor in the chip, all other circuitry must be designed to accommodate this cell. Therefore the designcomposition must proceed in a bottom-up manner, starting with the single bit of memory (see Fig. 1.14). In thisexample there are six levels of hierarchy starting at the single bit, aggregating a row of eight bits; stacking fourof those vertically; stacking eight at the next higher level; and so on. The highest level of the hierarchy showsfour arrays, each containing 32 32 bits. Memory-driving circuitry with the correct spacing is then placedaround the bits.

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    quote to manufacture the board. Most manufacturers use metric size drills, so specifying imperial size holesreally is counterproductive and can be prone to errors.

    However, there are many components which have metric pin spacing and dimensions. Many componentdatasheets will also have metric dimensions even though the spacing are designed to an imperial grid.

    The result of this is there must be very careful use of dimensions.

    4 Basic Multi-Layer PCB construction

    A typical multi-layer PCB (which covers most of the PCBs used to implement a complex circuit) consists of asandwich of conducting and insulating layers. It is onto this format that the PCB design must be produced.

    Figure 4: Simple Layer Construction of a PCB

    The sandwich of layers, or stack of layers, alternates between some sort of non-conducting dielectric layer, andcopper foil, which has been patterned to form the circuit connections.

    The result is that there are several decisions which must be made prior to beginning the layout stage of the PCBdesign. It these are not made now then it can cause considerable difficulty further in the design process.

    4.1 Dielectric

    The dielectric can be one of a number of materials (depending on the application) most common is FR4 andthis is formed from an epoxy resin that is reinforced using glass fibres. This dielectric is manufactured in the

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    form of a thicker layer (often called a laminate) or a thinner layer called a prepreg (pre-impregnated) that isnormally manufactured from a resin-impregnated glass cloth.

    Laminates and prepregs are available in a variety of thicknesses and can be bonded together to form thickerlayers still if the application demands it. A typical laminate may be between 0.1 and 0.25mm thick whilst atypical prepreg may be between 0.05mm and 0.2mm.

    4.2 Copper foil

    The copper foil forming the interconnect is available in a number ofweightse.g. 0.5oz, 1oz or 2oz. The weightrefers to the weight of a standard area of the foil and 0.5oz is about 10m thick. 1oz is the most common forgeneral-purpose applications, but the higher weights allow more current to be carried for a particular track

    width. For example, a 0.5oz track that is 20mm long and 0.5mm wide has a resistance of 38mW, whereas thesame track in 2oz copper has a resistance of 9.5mW.

    4.3 Pads

    Pads provide the copper surface that the legs of the components will be soldered to, providing the electricalconnection necessary. The area of these pads has an important part to play in the final manufacturing process

    Pad sizes, shapes and dimensions will depend not only upon the components used, but also the manufacturingprocess used to assemble the board, among other things. The PCB package should come with a set of basiccomponent libraries with some standard sized pad values.

    There is an important parameter known as the pad/hole ratio. This is the ratio of the pad size to the hole size.Each manufacturer will have their own minimum specification for this. As a simple rule of thumb, the padshould be at least 1.8 times the diameter of the hole, or at least 0.5mm larger.

    This is to allow for alignment tolerances on the drill and the artwork on top and bottom layers. This ratio getsmore important the smaller the pad and hole become, and is particularly relevant to vias.

    4.4 Vias and Through-Holes

    The multiple layers of copper foil are interconnected by through-holes and vias. Both of these structures areholes in the laminate with electroplated copper on the surface forming a bridge between two (or more)conducting layers. This distinction between a through-hole and a via lies in their specific purpose.

    A through-hole is sized to allow a pin of a component to pass through from one side of thePCB to the other (allowing it to be soldered to the PCB), a via is merely to connect two pointsin the circuit that are on different layers. For this reason, vias are usually smaller in diameterthan through-holes.

    Through-holes go from one side of the PCB to the other. This is not necessary for a via avia can bridge two layers inside the PCB and may not be visible at the surface of the PCB.Such a via is called a blindvia.

    There must be an area of copper around a through-hole to allow the solder to form a propermeniscus and adhere properly to the PCB. This is not the case for a via and a via may have

    very little copper around it a landlessvia.

    Through-holes are only required where through-hole components are being used. In the case of a PCB usingonly surface mount devices, there are no through-holes (except for the external connectors, possibly). Thesurface mount devices are soldered to small areas (or lands) of copper on the external surface of the PCB and

    vias are used to carry the connections to other layers.

    Holes in vias are usually a fair bit smaller than component pads, with 0.5-0.7mm being typical.

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    4.5 Tracking

    There is no recommended standard for track sizes. What size track used depends on the electrical requirementsof the design, the routing space and clearance available, and personal preference. As a general rule though, thebigger the track width, the better. Bigger tracks have lower DC resistance, lower inductance, can be easier andcheaper for the manufacturer to etch, and are easier to inspect and rework.

    The lower limit of track width will depend upon the track/space resolution that the PCB manufacturer iscapable of. For example, a manufacturer may quote a 10/8 track/space figure. This means that tracks can be no

    less than 10 thou wide, and the spacing between tracks (or pads, or any part of the copper) can be no less than 8thou. Real world typical figures are 10/10 and 8/8 for basic boards.

    The lower the track/space figure, the greater care the manufacturer has to take when aligning and etching theboard and hence, the greater cost of production.

    As a start, use say 25 thou for signal tracks, 50 thou for power and ground tracks, and 10-15 thou for goingbetween IC and component pads. Some designers though like the look of smaller signal tracks like 10 or 15thou, while others like all of their tracks to be big and chunky. Good design practice is to keep tracks as big aspossible, and then to change to a thinner track only when required to meet clearance requirements.

    In practice, track width will be dictated by the current flowing through it, and the maximum temperature rise of

    the track that can be tolerated. Remember that every track will have a certain amount of resistance, so the trackwill dissipate heat just like a resistor. The wider the track the lower the resistance. The thickness of the copperwill also play a part, as will any solder coating finish.

    The calculations to figure out a required track width based on the current and the maximum temperature riseare a little complex. A track width calculator program can be found at www.ultracad.com/calc.htm,

    4.6 Clearances

    Electrical clearances are an important requirement for all boards. Too tight a clearance between tracks and padsmay lead to hairline shorts and other etching problems during the manufacturing process. These can be veryhard to fault find once the board is assembled.

    At least 15 thou is a good clearance limit for basic through hole designs, with 10 thou or 8 thou being used formore dense surface mount layouts.

    For 240V mains on PCBs there are various legal requirements, and it is necessary to consult the relevantstandards. As a rule of thumb, an absolute minimum of 8mm (315 thou) spacing should be allowed between240V tracks and isolated signal tracks. Good design practice dictate much larger clearances than this anyway.

    For non-mains voltages, the IPC standard has a set of tables that define the clearance required for variousvoltages. The clearance will vary depending on whether the tracks are on an internal layer or the externalsurface. They also vary with the operational height of the board above sea level, due to the thinning of theatmosphere at high altitudes.

    5 PCB Layout

    Begin by setting a snap grid and cursor, components and tracks will snap into fixed grid positions. Not justany random size grid, but a fairly coarse one. 100 thou is a standard placement grid for very basic through hole

    work, with 50 thou being a standard for general tracking work, like running tracks between throughhole pads.For even finer work use a 25 thou snap grid or even lower.

    The grid is important because it wil l keep components neat and symmetrical. It makes future editing, dragging,movement and alignment of tracks, components and blocks of components easier as the layout grows in sizeand complexity.[2]

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    5.1 Imported Data

    A netlist is essentially a list of connections (nets) which correspond to your schematic. It also contains the listof components, component designators, component footprints and other information related to the schematic.

    The netlist file can be generated by the schematic package.

    Figure 5: Typical rats Nest Display.

    The job of component placement will be made infinitely easier by having a rats nest display enabled. If thereis one reason for going to the trouble of drawing up an accurate schematic and importing a netlist, this is surelyit. For large designs, a rats nest display is essential.

    A rats nest display is one where the program will draw a straight line (not a track) between the pads ofcomponents which are connected on the schematic. In effect, it shows the connectivity of the circuit beforebeginning to start laying out tracks. At the start of board layout, with all components placed down randomly,this will appear as a huge and complicated random maze of lines. Hence the name rats nest.

    With the rats nest display enabled, it will be almost possible to lay out all components optimally in no time,without having to lay down one single track. The rats nest display will effectively show what your tracks willconnect to. The rats nest lines should disappear when routed. The design will get less complicated looking.

    When all rats nest lines disappear, board is fully routed.

    5.2 Component Placement & Design

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    An old saying is that PCB design is 90% placement and 10% routing. The concept that component placement isby far the most important aspect of laying out a board certainly holds true. Good component placement willmake the layout job easier and give the best electrical performance. Bad component placement can turn arouting job into a nightmare and give poor electrical performance. It may even make the boardunmanufacturable.

    Auto Placement tools are available in many higher end PCB packages. Professional PCB designers do not useAuto Placement tools, its that simple. Dont rely on the Auto Place feature to select the most optimum layout.It will never work (unless its an extremely simple board), regardless of what the program makers claim.

    These tools do have one useful function however, they give an easy way to get components initially spreadacross the board.

    Every designer will have their own method of placing components. So there is no absolute right way to placecomponents. But there are quite a few basic rules which will help ease routing, giving the best electricalperformance, and simplifying large and complex designs.

    At this point consider the basic steps required to go about laying out a complete board:

    Set snap grid, visible grid, and default track/pad sizes.

    Throw down all the components onto the board.

    Divide and place components into functional building blocks where possible.

    Identify layout critical tracks on circuit and route them first.

    Place and route each building block separately, off the board.

    Move completed building blocks into position on main board.

    Route the remaining signal and power connections between blocks.

    Do a general tidy up of the board.

    Do a Design Rule Check.

    Get someone else to check it

    The hallmark of an inexperienced designer is a board that has every component evenly spaced out, and then hasthousands of tracks and vias crisscrossing the board. It might work, but it can be ugly and inefficient, not tomention bigger and more expensive to manufacture.

    The best way to start the layout is to get ALL components onto the screen first. With all the components onscreen, there is a good indication of whether or not the parts will easily fit onto the size (and shape) of boardrequired. If it looks like its going to be a tight fit then it will be necessary to work hard to try and keep thecomponent spacing tight, and the tracking as efficient as possible. If it looks like there is plenty of room thenit is possible to be more liberal in layout.

    Partition off electrically sensitive parts of the design into bigger blocks. One major example is with mixeddigital and analogue circuits. Digital and analogue just do not mix, and will need to be physically and electrically

    separated. Another example is with high frequency and high current circuits, they do not mix with lowfrequency and low current sensitive circuits.

    As a general rule, components should be neatly lined up. Having ICs in the same direction, resistors in neatcolumns, polarised capacitors all around the same way, and connectors on the edge of the board makes theboard look efficient. Dont do this at the expense of having an electrically poor layout, or an overly big board.Electrical parameters should always take precedence over nicely lined up components.

    5.3 Routing

    Routing is the process of laying down tracks to connect components on the board.

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    In order to understand the language of routing some definitions are useful.

    Manhattan Length is the shortest path that a wire can have when it must be connected using only segmentsthat are confined to either the X axis or Y axis. Calculating the Manhattan Length is quite simple. One needonly subtract the X coordinates of the two end points from each other and the Y coordinates of the two endpoints from each other and sum these two dimensions.

    Knowing this, it is easy to see how prior to routing analytical tools can estimate the length of nets, and,therefore, their time delay, prior to routing. With a well run autorouter, it is possible to have post route lengths

    that agree with preroute predictions to small fractions of a nanosecond. This is one of the more valuablefeatures of X-Y routing.

    Detour Routing- Detour routing is any routing of a net or wire that exceeds the Manhattan Length. If timingwere dependent on maintaining the Manhattan length predicted at preroute analysis, this design would fail itstiming specifications. When designs are high speed and timing budgets are worked out at the preroute stage,

    which is common in very high speed, high performance designs, allowing this detour routing may be fatal.

    Net-A collection of wires that connects all of the points or pins in a single circuit.

    Wire-The connection between any two adjacent pins in a net.

    Segment- A portion of a wire when routed. It is possible for a wire to be made up of several segments if a

    number of vias are needed to find open space in the signal layers. However, it is uncommon to see a wire withmore than three segments.

    Straight Wire- a wire that is pure horizontal or pure vertical. These wires usually need to be routed first,because the number of possible solutions without detour routing is limited.

    Rats Nest- A crow flies plot of all of the potential connections between the pins of all of the parts in aprinted circuit board. It illustrates the demand for wire space that a particular component placement puts onthe wiring surfaces of a proposed PCB stackup. This is a valuable plot, because it allows a designer to assess thedistribution of wiring in a design. Based on these plots, placements can be adjusted to even out the wiredemand and routing strategies can be devised to insure all wires fit into the minimum number of layers.

    Routing Via or Turning Via- a via used to change layers or change directions when routing a wire

    Auto Routing

    Auto routing is the process of getting the PCB software to route the tracks. It will even attempt to route theentire board. Most of the medium to top range PCB packages will do this.

    Auto routers come in handy when there are complex boards with not much routing space, on non-critical partsof the layout. Non-critical parts of a board might include low frequency or static control signals to componentslike LED displays, switches and relays to name a few.

    Advanced autorouters do come with tools specify exactly how to electrically important tracks laid out.

    Never use an auto router to do a complete board. Use it on a very specific non-critical area of the board, and

    some excellent results are possible. It is possible to auto route a single connection, and this is sometimes handywhen having trouble finding routing space in the final phase of layout.

    5.4 Clean Up Pass

    Once finished routing, the board isnt done quite yet. There are a few last minute checks and finishing touchesthat should be manually done.

    If there are thin tracks (

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    Check there any required mounting holes on the board. Keep mounting holes well clear of anycomponents or tracks. Allow room for any washers and screws.

    Minimise the number of hole sizes. Extra hole sizes cost money, as the manufacturer willcharge based on not only the number of holes in boards, but the number of different holesizes. It takes time for the very high speed drill to spin down, change drill bits, and then spinup again.

    Check for correct hole sizes on all components. This is a very common problem.

    Check that there is adequate physical distance between all components. Watch out for

    components with exposed metal that can make electrical contact with other components, orexposed tracks and pads.

    If wanted, add teardrops to al l pads and vias. A teardrop is a smoothing out of thejunction between the track and the pad. This gives a more robust and reliable track to padinterface, better than the almost right angle between a standard track and pad.

    5.4 Design Rule Check (DRC)

    Design Rule Checking (DRC) allows automatic checking of the PCB design for connectivity, clearance, andother manufacturing errors. With the large and complex PCBs being designed today, it is impractical tomanually check a PCB design. This is where the DRC comes into its own, it is an absolutely essential step in

    professional PCB design.Examples of what can be checked with a DRC are:

    Circuit connectivity. It checks that every track on the board matches the connectivity of the schematic.1.

    Electrical clearance. Check the clearance between tracks, pads, and components.2.

    Manufacturing tolerances like min/max hole sizes, track widths, via widths, annulus sizes, and short circuits.3.

    A complete DRC is usually performed after finishing the PCB. Some packages however have the ability to doreal time (or online) DRC checking as the board is created. For instance, it wont connect a track to a pad itshouldnt go to, or violate a clearance between track and pad.

    5.5 Forward and Back Annotation

    Forward Annotation is when changes are made to the existing PCB layout via the schematic editor. Theprogram will take the schematic netlist and component designators, and import them into the PCB design, andmake any relevant changes. Some packages will also automatically remove old PCB tracks that are no longerconnected. This can be done at any time during the PCB layout. If the schematic is updated, then forwardannotate changes into the PCB design.

    Back Annotation is when there is a change one of the component designators (eg. C1 to C2) on the PCBand then automatically update this information back into the schematic. More advanced back annotationfeatures allow swapping gates on chips, and performing other electrical changes.

    6 Manufacturing Data

    Layer Schematics

    The process of design generates schematics for each of the layers; of the finished board. The most obvious ofthese are the copper interconnect patterns which are required for each layer of the board. There are, however,other patterns which re also generated at this stage of the process.

    Silkscreen

    The silkscreen layer is also known as the component overlay or component layer. It is the layer on thetop of the board (and bottom if needed) that contains component outlines, designators (C1, R1 etc), and free

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    text. Many modern surface mount boards have such a high component density that there is no use for this layer

    This is added to the board using a silkscreening process. White is a standard colour, but other colours areavailable upon request. It means that it is possible to mix and match colours on the one board, but usually atextra cost.

    When designing your board, make sure to keep all component designators the same text size, and oriented inthe same direction.

    When laying out own component footprints, were possible, make sure that a component overlay is added thatreflects the actual size of the component. This way enables the designer to tell at a glance how close thecomponents can be physically positioned. Ensure that all polarised components are marked, and that pin 1 isidentified.

    As a general rule, dont put component values on the silkscreen, just the component designator.

    Solder Mask

    A solder mask is a thin polymer coating on the board which surrounds pads to help prevent solder frombridging between pins. This is essential for surface mount and fine pitch devices. The solder mask typicallycovers everything except pads and vias. The PCB program will automatically remove solder mask from padsand vias. The gap it leaves between the pad and the solder mask is known as the mask expansion. The mask

    expansion should usually be set to at least a few thou. Be careful not to make it too big, or there might be nosolder mask between very fine pitch devices.

    The solder mask is displayed in the PCB package as a negative image, just like the power plane. Under normalcircumstances dont put anything on the solder mask layer.

    On most standard quality boards, the solder mask is laid directly over the bare copper tracks. This is known asSolder Mask Over Bare Copper, or SMOBC.

    Vias can be covered with solder mask, this is known a tenting. This is useful for close tolerance designs, toprevent solder from flowing into vias.

    Doumentation

    The documentation of a printed board assembly consists of several drawing types that are included orreferenced in the documentation package. Not all drawings are always supplied to the fabricator or to theassembly company; however, the designer must have a good understanding of the minimum informationnecessary to convey the design intent. The IPC-D-325 defines three types of documentation packages. Theseare:

    Class A:Minimal DocumentationMinimal DocumentationMinimal DocumentationMinimal Documentation- This is usually used for internal use and consists primarily of a copy of thelayout and artwork in hard copy or NC format. The information requires a great deal of co-ordination betweenthe design and manufacturing disciplines. Notes on the layout convey much of the needed information. Class Adocumentation requires the use of a manufacturer that can produce a functional product from the information

    supplied.Class B: Moderate DocumentationModerate DocumentationModerate DocumentationModerate Documentation-This includes a complete board description without information as to themanufacturing allowances that are included in the design. The parts list and assembly drawing are also suppliedto the assembler. CAD data on conductor routing describes the interconnectivity of the circuit and is used bythe manufacturer to derive electrical test data. A schematic, logic diagram, or net list may also be supplied.Class B documentation requires working with a manufacturer and assembly company that has a strongCAD/CAM background and an understanding of what the designer expects.

    Class C: Full DocumentationFull DocumentationFull DocumentationFull Documentation - This includes a complete procurement package that may be sent to multiplesuppliers with each producing an identical part. The information is self sufficient and includes, as a minimum,the master drawing, the assembly drawing, bill of material (BOM), schematic or logic diagram, test

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    specifications, artwork in hard copy and electronic form, and an electronic description of the design. Inaddition, a panel layout may also be included, especially if the assembly is to be built in panel format. Thetooling features are defined and located and manufacturing allowances included in the design are identified.

    The master drawingmaster drawingmaster drawingmaster drawing describes the unpopulated printed board and all the features that become a part of theboard. Usually it is for a single board even though the board manufacturer will build the board within a panel.

    The master drawing defines the physical outline of the printed board as well as the conductive patterns andholes. This includes the printed board profile, construction in terms of dielectric spacing and thickness, andcut-outs and notches included in the periphery of the finished board.

    The assembly drawingassembly drawingassembly drawingassembly drawing defines the location of all the components that are associated with the assembly. Areference designator is used to co-ordinate the part identification and location to the electronic diagrams (logicor schematic) and the parts list (or Bill of Materials: BOM). The BOM may be supplied as a computer listingsince the electronic forms are often used to tie in to the material issuing system of the assembler.

    Typical Documentation Package

    A typical printed circuit board documentation package consists of a board detail drawing, a master patterndrawing or copies of the artwork masters, an assembly drawing, a parts list or bill of material, and the schematicdrawing.

    The documentation methodology described here is based on the assumption that the schematic, parts list, andcircuit board layout have been created using computer-aided tools or have been captured in computer-readableformat.

    Although a manually prepared data package would contain the same basic manufacturing, assembly, and testinformation, its use should be limited to building small quantities of noncomplex PCBs, such as engineeringprototypes.

    There are a number of different types of drawing and electronic media (data formats) that support boardfabrication, assembly and test. These are illustrated in Figure 6.

    Drawing CommonDataFormat

    Fabrication Assembly/Test

    Master Excellon NC Drill

    NC route

    Board outline

    N/A

    Gerberplot

    Circuit layers

    Solder mask

    Marking

    N/A

    Assembly N/A Solder paste

    Master ASCII Aperture list N/A

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    Drill data

    Readme.txt file

    Assembly N/A Solder paste

    Pick and Placedata

    Parts list

    Boarddetail

    HPGLplot

    Manualdrill/machining

    Manual route

    Board outline

    N/A

    Assembly N/A Manual partplacement

    Mechanicalassembly

    Schematic IPC-D-386andGENCAM

    Bare board test ICT andfunctional test

    Figure 6: Drawing and Data Formats

    Content, Format and Structure

    Artwork content must provide all the information and documentation needed for cost-effective bare boardfabrication. Figure 7 list the most common content of an artwork package with an indication of currentindustry standards.

    When establishing such documentation, the designer must tailor the data package to the specific needs of thefabricator that will produce the PCB.

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    Artwork/Data Format Comment

    Circuit layer 1 Gerber Component side

    Circuit layer 2

    Circuit layer 3

    Circuit layer 4

    Circuit layer 5

    Circuit layer 6 Solder side

    Drill graphics

    Board fabrication Board detail drawing

    Component-side soldermask

    Solder-side solder mask

    Component side

    marking

    Silkscreen

    Solder side marking Silkscreen

    Drill file Excellon NC drill data

    Aperture list ASCII

    Net list ASCII

    Readme file ASCII Description of packagecontents

    Figure 7: Content of a Typical Artwork/Data Package

    7 Design for Manufacture

    In this section we will consider the data which should be generated to for the production of the PCB and for itsuse later in the electronics manufacture process.

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    7.1 Panelisation

    For automatic assembly with a pick-and-place machine then it pays to get as many boards onto the one panelas possible. A panel is simply a large PCB containing many identical copies of the board. It takes time to place aboard into position on a pick and place machine, so the more boards can be loaded, the more cost effective themanufacturing will be.

    A panel will also contain tooling strips on the top and bottom, to allow for automated handling of the panel.Different manufactuers may have different maximum panel sizes they can produce.

    Each individual board can be routed out and joined with breakout tabs, or simply butted together andscoured out with a V groove. A V groove is a score mark placed on the board that allows snapping of theboard along the groove. A breakout tab is a small strip of board perhaps 5-10 mm long joining board to panel.Small non-plated holes are also drilled along this strip, which allows the board to be snapped or cut out of thepanel after assembly.

    7.2 Tooling Strips

    Tooling strips are strips of blank board down the top and bottom side of the board. They contain tooling holes,fiducial marks, and other manufacturing information if required.

    Standard tooling holes are required for automated handling of the board. 2.4mm and 3.2mm are two standardhole sizes. Four tooling holes per panel is sufficient, one in each corner.

    The tooling trips connect to the board(s) with breakout tabs or V Grooves.

    7.3 Fiducial Marks

    Fiducial marks are visual alignment aids placed on the PCB. They are used by automated pick and placemachines to align the board and find reference points. A video camera on the machine can identify the center offiducial marks and use these points as a reference.

    On a panel there should be 3 fiducial marks, known as global fiducials. Bottom left/right and top left corners.

    They should be at least 5mm away from the board edges. They can be mounted on the tooling strips.

    The fiducial mark should be a circular pad on the copper layer typically of diameter 1.5mm. The fiducialshould not be covered with solder mask, and the mask should be removed for a clearance of at least 3mmaround. The pad can be bare copper or coated like a regular pad.

    Two local fiducial (one in opposite corners) is also required next to each large fine pitch surface mount devicepackage on the board.

    7.4 Thermal Relief

    If solidly connected, a surface mount pad to a large copper area, the copper area will act as a very effective heat

    sink. This will conduct heat away from the pad while soldering. This can encourage dry joints and othersoldering related problems. In these situations a thermal relief connection, which comprises several (usually 4)smaller tracks connecting the pad to the copper plane. Thermal relief options can be set automatically in manypackages.

    Figure 8: Typical Thermal Relief Pad (Black areas are where copper is removed)

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    Standard professionally manufactured boards will typically have solder mask over bare copper (SMOBC) tracks,and a tin finish on the pads and vias which is Hot Air Leveled (HAL). Hot air leveling helps most surfacemount components to sit flat on the board.

    For large and critical surface mount components, a gold flash finish is used on the pads. This gives anextremely flat surface finish for dense fine pitch devices.

    Peelable solder masks are available, and are handy for temporary masking of areas on the board during wavesoldering or conformal coating.

    7.5 Electrical Testing

    A finished PCB canchecked for electrical continuity and shorts at the time of manufacture. This is done with aautomated flying probe or bed of nails test machine. It checks that the continuity of the tracks matches thePCB file. It may cost a extra, but this is mandatory for multi-layer boards. If there is a manufacturing error onone of the inner layers, it can be very difficult to fix.

    7.6 Submitting Design for Manufacture

    The first thing to know is which format to send the PCB file in. Supplying the original PCB package file willensure that what is seen on the screen is what will be got get when te board is delivered. Unless there is a goodreason to do so, dont supply the files in any other format.

    Gerber files are the traditional and industry recognised file format, all major manufacturers will accept them.

    The manufacturer will ask for a lot of information before they quote, ask them what is needed to provide withthe file. Here is a basic checklist:

    A reference code and revision for the board. This makes it easy for both parties to track theprogress of it.

    Desired manufacturing time, known as the turn-around.

    Quantity of boards required

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    Board thickness (1.6mm, 0.8mm, 2.4mm etc). 1.6mm is standard

    Type of board (FR4, Teflon etc). FR4 is standard

    Number of layers

    Surface finish (SMOBC, HAL, Gold Flash etc). SMOBC and HAL are standard.

    Colour of solder mask and component overlay.

    Copper weight (1oz, 2oz etc). 1oz is standard.

    Electrical testing usually recommended for multi-layer boards.

    Track/Space clearance of board

    How the board dimensions are defined. E.g., on the mechanical layer.

    Whether you want boards panelised or supplied individually cut.

    Many manufacturers will have prototype services where they will fit as many boards onto a standard panelas they can, all for one fixed price.

    In most cases there will be a charge for a tooling cost. This is the cost of printing the photo masks for theboard, and also setting up their machines. This is usually a one-off cost, so if the same board is manufacturedagain, there wont be a the tooling charge.

    8 Multi - Layer Design Issues

    A multi layer PCB is much more expensive and difficult to manufacture than a single or double sided board,but it really does give you a lot of extra density to route power and signal tracks. By having the signals runningon the inside of the board, more components can be more tightly on the board to give a more compact design.

    Multi layer boards usual ly come in even number of layers. With 4, 6, and 8 layer being the most common.

    A typical 6 - layer board is illustrated in the diagram below.

    Figure 9: Multi Layer Board Construction

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    With a multi layer board, typically dedicate one complete layer to a ground plane, and another to power. If adigital only board, then dedicate the entire power layer also. If there is room on the top or bottom layer, it sipossible to route any additional power rail tracks on there. Power layers are almost always in the middle of theboard, with the ground closer to the top layer.

    Once power has been taken care of on the inner layers, there will be much more room available for signaltracks.

    If power planes are vital, and you have a lot of connections to route, then move from 4 to 6 layers. Six layerswill gives four full signal routing layers and two layers dedicated to power. Eight layers and above is basicallymore of the same.

    With multi layer design comes the options of using different types of vias to improve routing density. There arethree types of vias:

    Through vias go through the whole board, and can connect any of the top, bottom or inner layers. These can bewasteful of space on layers which arent connected.

    Blind vias go from the outside surface to one of the inner layers only. The hole does not protrude throughthe other side of the board. The via is in effect blind from the other side of the board.

    Buried vias only connect two or more inner layers, with no hole being visible on the outside of the board. Sothe hole is completely buried inside the board.

    Figure 10: Examples of Different Via Types

    Blind and buried vias cost more to manufacture than standard vias. But they are very useful, and almost

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    mandatory for very high density designs like those involving Ball Grid Array (BGA) components.

    Note: The issues raised in the following sections will all be raised in much more detail later in this module.

    8.1 Power Planes

    It is good practice to use power planes to distribute power across the board. Using power planes candrastically reduce the power wiring inductance and impedance to components. This can be vital for high speeddigital design for instance. It is good design practice to use power planes whenever possible. They can even beused on double sided boards, if most of the signal tracks are on the top layer.

    A power plane is basically one solid copper layer of board dedicated to either the Ground or Power rails, orboth. Power planes go in the middle layers of the board, usually on the layers closest to the outer surfaces. On a4 layer board with complex power requirements it is common to dedicate one layer to the ground plane, andanother layer to the various positive and negative power tracks. Ther ground rail is usually thesignal referenceline, so a ground plane is first preference before a power plane is considered.

    On a normal tracking layer, the board is assumed to be blank, then lay down tracks which will become theactualcopper tracks. On a power plane however, the board is assumed to be covered with copper.

    8.2 Good Grounding

    Grounding is fundamental to the operation of many circuits. Good or bad grounding techniques can make orbreak the design. There are several grounding techniques which are always good practices to incorporate intoany design.

    8.3 Good Bypassing

    Active components and points in the circuit which draw significant switching current should always bebypassed. This is to smooth out the power rail going to a particular device. Bypassing is using acapacitor across the power rails as physically and electrically close to the desired component or point in thecircuit as possible

    8.4 High Frequency Design Techniques

    High frequency design is where consideration is given the effects of parasitic inductance, capacitance andimpedance of the PCB layout. If the signal is too fast, and the track is too long, then the track can take on theproperties of a transmission line. Proper transmission line techniquesare not used in these situations then theremay be reflection and other signal integrity problems.

    8.5 Double Sided Placement

    Placing components on both sides of a PCB can have many benefits. There are two main driving factors behinda decision to go with double sided loading. The first is that of board size. If a particular board size is required,and all the components wont fit on one side, then double sided load is an obvious way to go. The secondreason is that it is required to meet certain electrical requirements. Often these days, with dense high speedsurface mount devices packed onto a board, there is either no room for the many bypass capacitors required, orthey cannot be placed close enough to the device to be effective. Ball Grid Array (BGA) devices are one suchcomponent that benefit from having the bypass capacitors on the bottom of the board.

    9 Summary

    The previous material has been a brief overview of the processes and practises of producing a practical printedcircuit board. The design has been considered from the conceptual stage of design entry to the final data

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    generation for submission to the PCB manufacturer to construct the final board.

    If the correct design approach is taken then the result should be an operational PCB which meets all therequirements of the electronic system design.

    The remainder of this module will consider the issues and approaches taken to ensure correct and efficientPCB operation in the condition that are required for todays intense electronic circuit performances.

    [1] The term mil comes from 1 thou being equal to 1 mili inch.

    [2] Good PCB layout practice would involve you starting out with a coarse grid like 50 thou and using aprogressively finer snap grid if your design becomes tight on space. Drop to 25 thou and 10 thou for finerrouting and placement when needed. This will do 99% of boards. Make sure the finer grid you choose is a niceeven division of your standard 100 thou. This means 50, 25, 20, 10, or 5 thou.

    Text & images 2012 The University of Bolton

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