Advance Microprocessor Key

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  • 8/9/2019 Advance Microprocessor Key

    1/12

    A19

    A

    14

    74LS138

    3 to 8 Decoder

    &

    0

    i

    ez

    Memorandum of Instruction Solution of Numerical Problems

    Name of Examination:

    B.E.

    emester: 6

    th

    ranch:

    AEI, El , EEE, ET T

    Subject:

    Advanced Microprocessor Interfacing

    ubject Code:

    328613 (28)

    2.

    b)

    Step

    I:

    Address decoding table:

    Memory

    H ex

    A dd

    ress

    Binary address

    IC

    A

    l 9 A 18

    A

    17 A 16 A 1 5

    A

    14 A 1 3

    A l2 A ll A

    10

    A9

    A8

    A7 A6

    A5

    A4

    A3

    A2 Al

    A0

    2114

    0

    0 0 0 0

    0

    0 0

    0 0 0

    0 0

    0

    0

    S RA M

    1

    007FE

    0

    1

    1 1

    1 1 1

    1 1 1

    2114

    0 0 8 0 0

    0

    0 0

    0 0 0

    0 0 0

    0

    SRAM-3

    00FFE

    0

    1

    1 1 1

    1 1 1

    1 1

    Step II: Design of CS (Chip Select):

    Step Ill: Connection of memory IC 2114 with microprocessor 8086 in minimum mode

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    IL:4 SRAM

    Ere:

    -

    E V E N H A N K

    1K x

    SRA

    o a d -

    O D D B A N E

    NB CX

    3

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    Again it can be modified as

    [ A X + A X * 2 1 ] + [DX + DX 2 2

    ]+ [BP * 2

    1 ] --> CX

    M O V B X , A X

    S A L A X , 1

    A D D B X , A X

    A D D B X , D X

    MOV CL, 02h

    S A L D X , CL

    A D D B X , D X

    S A L B P , 1

    A D D B X , B P

    M O V C X , B X

    HLT

    4.

    a)

    There is no direct instruction to set or reset the trap flag. Trap flag can be set or

    reset by using tack instruction.

    To set the trap flag

    D1 5

    4,

    D8 D7

    D8 D7

    .:

    DO

    1

    D 8 D 7

    8 hiSB S

    M O V A X ,

    0100h

    015

    P US H A X

    D1 5

    P OP F

    8 LSB S

    D O

    D O

    A X

    SS: SP

    FLAG REG.

    To reset the trap flag

    4 8 MSB S

    8 LSB S

    MOV AX, 0000h

    P U S H A X

    P OP F

    0

    A X

    D 8

    15 7

    O

    SS: SP

    D 8

    15

    7

    O

    0

    FL A G R E G.

    D1 5

    D8 D7

    T F

    D O

    4

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    (b)

    31

    16 15

    0

    EAX

    Ali

    A L

    AX

    EBX

    BH BL BX

    ECX

    CH CL

    CX

    E D X

    D H

    D L

    D X

    ESP

    BP

    ESI

    S I

    EN D I

    ESP

    SP

    31

    1 6 1 5

    0

    EIP

    IP

    EFLA G S F L AG S

    15

    S E G M E N T

    REGISTERS

    CS

    S S

    DS

    ES

    F S

    G S

    (c)

    The

    given

    value

    in

    DS is 1007h

    Expressing this value in the binary form, we get

    13:P=01301000000000111

    By comparing this value with the format of segment register in the protected mode, we

    get

    1 5

    13- bit Descriptor number

    TI I

    PL

    16 bit

    Segment register

    Since the last two significant bits are used to define the RPL and are both 1, so

    RPL = 11 (3)

    The next bit i.e. bit 2 is indicates table index, TI = 1 so the segment descriptor is in the

    local descriptor table (LDT)

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    The most significant 13 bits are used to select any one descriptor from the total 8192

    (8K) descriptors

    (0001000000000)

    2

    =

    x 2 2

    + 0 x 2

    1 1

    + 0 x 2 1 + 1 x 2

    9

    + 0 x 2

    8 +

    x 2

    = (512)

    1 0

    Each descriptor is of 8 bytes; therefore the address of the 512 th descriptor is

    Address of the segment descriptor = Base address + (512 x 8)

    512 x 8 = 4096

    =1000h

    Therefore,

    Address of the segment descriptor =

    10000000h + 1000h

    =

    10001000h

    (d)

    Applications

    41

    (User softw are)

    Application

    Services

    (OS extensions)

    System

    Services

    PL= 0

    111.

    1 0

    Restricted access

    Task C

    Task I3

    PL (Privilege level)

    6

    Task A

    Unre tricted

    L oc

    access

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    C O N T R O L W O R D

    S T A TU S W O R D

    5.

    b)

    CONTROL UNIT

    NUMERIC EXECUTION UNIT

    I= ORENS

    I

    US

    EXPONENT

    M O D U L E

    P R O G R A B L M A B L

    SNIFFER

    F U N C T I O N

    BUS

    INTERFACE

    - 16 w -

    68,

    64,

    ARITRMAT1C

    M O D U L E

    TEMPORARY

    REGISTERS

    DATA 14..40

    DATA

    B U F F E R

    N E C I N S T RU C T IO N

    M I C R O C O D E

    CONTROL UNIT

    16

    O P E R A N D S

    Q U E U E

    16

    A D D R E S S IN G &

    B U S T R A CK I N G

    EXCEPTION

    P O I N T E R S

    T

    A

    G

    R

    E

    S

    T

    E

    R

    --REGISTER STACK ---

    M I

    0 BITS

    S T A T U S

    A DDRES S

    c )

    15

    RC

    PC IEM

    PM

    UM

    OM 71 4

    DM

    IM

    C

    NVALID OPERATION MASK.

    DENORMALIZ ED OPEARND MASK

    ZERO DIVIDE MASK

    OVERFLOW MASK

    UNDERFLOW MASK

    PRECISION ERROR MASK

    INTERRUP T MASK ( .1 INTERRUP TS ARE MASK ED)

    PRECISION CONTROL

    ROUNDING CONTROL

    INFINITY CON TROL

    R E S E R V E D

    7

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    (d)

    Area of a circle is A= fl

    * R

    2

    Program:

    MOV AX, 3000h

    M O V D S , A X

    Initialize data segment

    MOV SI, 0200h

    Initialize source index

    MOV DI,

    0300h

    Initialize destination

    index

    MOV CX, 000Ah

    /

    count for 10 values

    REPEA T:

    LD [S I]

    Load

    1

    s t

    value of radius

    to ST [Stack top ST (0)]

    FS T S T (1)

    Store value

    of ST

    to

    ST (1)

    F M U L

    Multiply ST (0) * ST (1)

    = [ST (0)] 2

    4 ST (0)

    FLD PI

    Load

    n to ST

    F M U L

    Multiply ST (0)

    *

    ST

    (1) 4 ST (0)

    FST [DI]

    Save area in memory loc.

    INC SI

    Point to the next source

    Index for next radius

    INC DI

    L O O P R E P E A T

    H L T / I N T 3

    8

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    6. b)

    RESET

    V

    Transfer ICWI to Master and

    all Slave (Port 0)

    Transfer ICW 2 to Master and

    all Slave (Port 1)

    Transfer ICW 3 to Master and

    all Slave (Port I)

    Transfer ICW 4 to Master and

    all Slave (Port 1)

    8259 is Initialize and R eady

    to Receive Interrupts

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    BCD

    O P E R A T I O N

    0

    1

    H E X A D E C I M A L

    C O U N T

    B C D C O U N T

    P P M - M O D E

    M 2 Ml

    MO M O D E

    0

    0 0

    M O D E 0

    0

    0

    I

    M O D E 1

    X 0

    M O D E 2

    X

    1

    M O D E 3

    1

    0 0

    M O D E 4

    1 1

    M O D E 5

    S C - S E L E C T C O U N T E R

    SCI

    S C O

    O P E R A T I O N

    0

    0

    S E L E C T CO U N T E R 0

    0

    S E L E C T C O U N T E R 1

    1

    0 S E L E C T C O U N T E R 2

    1

    I L L E G A L

    ( 8254 REA D BA CK

    C O M M A N D )

    RL

    -

    R E A D / L O A D

    R L 1

    R L O

    O P E R A T I O N

    0

    o

    La t c h Cou n te r f o r " R EA D O N F LY "

    Opeartion

    0

    Read/Load LSB only

    1

    0

    Read/Load MSB ony

    1

    Read/L oad L SB f i r st then M SB

    D T

    /R=0

    I

    D 7

    6

    5 D4 D3

    2 D o

    Sc I S C O R L 1

    R L 0

    M 2 MI MO

    BCD

    (d)

    7. b)

    C L K

    T2

    3

    4

    (8284)

    B H E / S 7 &

    S7* S to S3

    A191S6

    A l

    t s

    A L E

    D15

    D

    i2

    S

    O

    D I R D C / I O R C

    DT /II 7\

    D EN

    R E A D Y

    = I

    (8284)

    S2

    $ U

    inactive

    2

    S p A c t ive

    1 0

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    A18 A19

    M

    0

    To cs

    o

    17

    A16

    A 1 5

    (c)

    Total memory = 32K word = 64K bytes

    IC available = 16K bytes

    Hence number of RAM IC required = 64K x 8/16K x 8 = 4 IC s

    So,

    Even bank = 2 IC s of 16K x 8 RAM

    Odd bank = 2 IC s of 16K x 8 RAM

    Step I: Address decoding table for

    even

    bank:

    Mown

    ex

    Addles

    Binary address

    IC

    A 19

    A 1 8

    A17 A16

    A

    15

    A

    14

    A

    13

    A

    l2 A11 A

    10

    A9 A g

    A7

    A 6

    A 5

    A 4

    A 3

    A2 A

    l AO

    16Kx8

    0 0 0 0 0 0

    0

    0 0

    0 0

    0

    0 0

    RAM -- C.

    0 7 F F E

    0

    1

    1

    1

    1

    1

    1

    1

    1

    16Kx8

    0 8 0 0 0

    0

    0

    0

    0

    0 0

    0

    0

    0

    RAM--@

    OFFFE

    0

    1

    1 1

    1

    1 1

    1 1

    To D e code r

    CF

    JC 2000h

    CF =1 then branches

    to the

    address 2000h

    JMP 3000h

    CF =

    0 then branches to the address 3000h

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