A Mu Rhythm Based Brain Computer Interface for Binary Control

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A Mu Rhythm Based Brain Computer Interface for Binary Control Undergraduate Project Report submitted to Manipal University in partial fulfilment of the requirement for the award of the degree of BACHELOR OF ENGINEERING in Biomedical Engineering Submitted by Rudhram Gajendran – 070902007 Prateek Saraswat – 070902008 Rohan Joshi – 070902070 Under the guidance of Ms Shefali Jayanth Kandi & Ms Rajitha K V Assistant Professor Assistant Professor – Senior Scale Dept. of Electronics and Communications Dept. of Biomedical Engineering Manipal Institute of Technology Manipal Institute of Technology DEPARTMENT OF BIOMEDICAL ENGINEERING MANIPAL INSTITUTE OF TECHNOLOGY (A Constituent College of Manipal University) MANIPAL – 576104, KARNATAKA, INDIA May 2011

description

ABSTRCT:Electroencephalographic (EEG) measurements are commonly used in medical and researchareas. This project uses the EEG (mu rhythm) to develop a Brain Computer Interface (BCI),which provides basic communication ability by regulation of brain activity alone.While the first BCI was developed nearly twenty years back, this technology continues to remainimmature. A significant factor stalling its utilization in medical settings is its prohibitive cost.This project uses a PSoC microcontroller for carrying out the essential processing and therebyeliminates the use of an extra computer, resulting in considerable cost savings.The project resulted in the development of a portable, microcontroller based mu rhythm BCIwhich is the first of its kind. The designed BCI is found to work with reasonable accuracy(average 70%) and speed (up to 7 bits/min).The performance of the BCI developed is encouraging and merits investigation into thedevelopment of other portable BCI systems as well. MathWorks MATLAB, Microsoft VisualStudio 2005 and the PSoC Designer 5.01 have been employed in developing the software for thesystem in addition to the custom made hardware.

Transcript of A Mu Rhythm Based Brain Computer Interface for Binary Control

Page 1: A Mu Rhythm Based Brain Computer Interface for Binary Control

A Mu Rhythm Based Brain Computer

Interface for Binary Control

Undergraduate Project Report submitted to Manipal University in partial

fulfilment of the requirement for the award of the degree of

BACHELOR OF ENGINEERING

in

Biomedical Engineering

Submitted by

Rudhram Gajendran – 070902007

Prateek Saraswat – 070902008

Rohan Joshi – 070902070

Under the guidance of

Ms Shefali Jayanth Kandi & Ms Rajitha K V Assistant Professor Assistant Professor – Senior Scale

Dept. of Electronics and Communications Dept. of Biomedical Engineering

Manipal Institute of Technology Manipal Institute of Technology

DEPARTMENT OF BIOMEDICAL ENGINEERING

MANIPAL INSTITUTE OF TECHNOLOGY

(A Constituent College of Manipal University)

MANIPAL – 576104, KARNATAKA, INDIA

May 2011

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INFORMATION TO USERS

The authors retain the ownership of the copyright in this thesis. Neither the thesis nor substantial abstracts from it may be prited or otherwise reproduced without the permission of the author(s).Corresponding author: Rohan Joshi, [email protected]

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ACKNOWLEDGMENT

We take this opportunity to extend our heartfelt gratitude to our supervisors Ms Shefali Jayanth

Kandi and Ms Rajitha K V for their help and support. Also, we would like to thank our

department head, Dr. Ramesh R Galigekere for allowing us to make extended use of the

laboratory, without which this project could not have been completed in the stipulated time.

Our appreciation extends to Mr Devadas Bhat of Department of Biomedical Engineering, MIT

and Mr Hari Prakash of the Speech and Hearing Department, MCOAHS for their advice at

critical junctures. We are also grateful to Ms Sathyavanthi of MICE for her informative classes

on Visual Basic which has been used in the project.

We would like to thank Asst. Engineer Mr Naveen Shetty and laboratory staff Mr Allwyn

D’Souza, Ms Malathi Nayak, Ms Baby Nayak and Mr P Radhakrishna Kamath, of the

Biomedical Engineering Department for helping us in procuring the necessary equipment when

needed.

Finally, we would like to express our gratitude to Analog Devices for providing us free IC

samples which have been used in the hardware development.

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ABSTRACT

Electroencephalographic (EEG) measurements are commonly used in medical and research

areas. This project uses the EEG (mu rhythm) to develop a Brain Computer Interface (BCI),

which provides basic communication ability by regulation of brain activity alone.

While the first BCI was developed nearly twenty years back, this technology continues to remain

immature. A significant factor stalling its utilization in medical settings is its prohibitive cost.

This project uses a PSoC microcontroller for carrying out the essential processing and thereby

eliminates the use of an extra computer, resulting in considerable cost savings.

The project resulted in the development of a portable, microcontroller based mu rhythm BCI

which is the first of its kind. The designed BCI is found to work with reasonable accuracy

(average 70%) and speed (up to 7 bits/min).

The performance of the BCI developed is encouraging and merits investigation into the

development of other portable BCI systems as well. MathWorks MATLAB, Microsoft Visual

Studio 2005 and the PSoC Designer 5.01 have been employed in developing the software for the

system in addition to the custom made hardware.

Keywords: Electroencephalogram · Brain Computer Interface · Mu rhythm · Prosthetic ·

Portable · Microcontroller

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LIST OF FIGURES

Figure No Figure Title Page No

1.1 Typical block diagram depicting a BCI 4

1.2 International 10-20 System of Electrode Placement 7

1.3 Mu rhythm waveform 8

1.4 P300 wave 9

1.5 6x6 grid containing letters of the alphabet (P300 BCI) 10

1.6 SCP waveform 11

2.1 Block diagram of signal acquisition system 13

2.2 10mm disposable electrodes and leads 14

2.3 International 10-20 System of Electrode Placement 15

2.4 RC band pass filter response 17

2.5 RC band pass filter cascaded with a voltage follower and a LPF 18

2.6 Structure of fourth order band pass filter 18

2.7 Fourth order BPF response 19

2.8 Circuit diagram of Butterworth band pass filter 19

2.9 Circuit diagram of clamper 20

2.10 Circuit diagram of power supply unit 21

2.11 Post clamping stages of BCI development 23

2.12 Block diagram of computer based BCI 23

2.13 MATLAB GUI for operator 24

2.14 GUI used for feedback training of user 25

2.15 Block diagram of PSoC based BCI 26

2.16 Operator screen 27

2.17 User screen 28

3.1 One of the first EEG recordings 29

3.2 The most common mu rhythm waveform 30

3.3 Periodical mu rhythm waveform 30

3.4 Mu rhythm waveform with intermittent spikes 31

3.5 Mu rhythm waveform with periodically varying amplitude 31

3.6 Mu rhythm waveform with superimposed 50Hz power line interference 32

3.7 DFT of mu rhythm waveform with 50Hz peak clearly visible 32

3.8 2048 point DFT of an EEG signal 34

3.9 DFT of subject relaxing 35

3.10 DFT of subject performing motor imagery 35

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LIST OF ABBREVIATIONS

BCI: Brain Computer Interface

EEG: Electroencephalogram

EMG: Electromyogram

ADD: Attention Deficit Disorder

ADHD: Attention Deficit Hyperactivity Disorder

ALS: Amyotrophic Lateral Sclerosis

EOG: Electrooculogram

SNR: Signal to Noise Ratio

MEG: Magnetoencephalogram

fMRI: Functional Magnetic Resonance Imaging

fNIR: Functional Near-Infrared Imaging

PET: Positron Emission Tomography

SPECT: Single Photon Emission Computed Tomography

SCP: Slow Cortical Potentials

ERD: Event Related Desynchronisation

ERS: Event Related Synchronisation

GUI: Graphical User Interface

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CMRR: Common Mode Rejection Ratio

DC: Direct Current

IC: Integrated Circuit

Op-Amp: Operational Amplifier

BPF: Band Pass Filter

LPF: Low Pass Filter

ADC: Analog to Digital Convertor

PSoC: Programmable System on Chip

DFT: Discrete Fourier Transform

sps: samples per second

USB: Universal Serial Bus

FFT: Fast Fourier Transform

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Contents

Page No

Acknowledgement i

Abstract ii

List of Figures iii

List of Abbreviations iv

Chapter 1 INTRODUCTION 1

1.1 Brain Computer Interface 3

1.2 Typical Signals Used in BCIs 6

1.3 Objective 12

1.4 Organization of the Report 12

Chapter 2 SYSTEM DESIGN AND METHODOLOGY 13

2.1 Signal Acquisition System 13

2.2 Power Supply Unit 21

2.3 Noise Considerations 21

2.4 Safety Considerations 22

2.5 BCI Development Using a Computer 23

2.6 BCI Development on PSoC 26

2.7 Neurofeedback 28

Chapter 3 RESULTS AND DISCUSSION 29

3.1 Observations on the Acquired EEG Signals 29

3.2 Preliminary Signal Analysis on the Computer 33

3.3 Results of BCI Implementation on the PSoC 37

Chapter 4 CONCLUSIONS AND FUTURE SCOPE 38

4.1 Conclusions 38

4.2 Future Scope 38

4.3 Final Remarks 39

REFERENCES 40

ANNEXURES 45

CONTACT INFORMATION 65

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CHAPTER 1

INTRODUCTION

This chapter provides an introduction to the Brain Computer Interface, its origin and its history.

It further discusses the signals which have the potential to be used in a BCI and the ones

typically employed in practical BCIs.

The origin of the BCI can be traced back to the electroencephalographic (EEG) signal and

therefore the EEG signal merits a detailed description. The EEG signal is the continually

changing electrical potential recorded from the human scalp that originates from and reflects the

variations corresponding to the electrical activity in the upper cortical layers of the brain [1].

Hans Berger, a German psychiatrist is attributed to have discovered the human EEG and is also

responsible for coining the term ‘electroencephalogram’ for the equipment used to measure the

EEG [2]. Berger however, was doubtful about his own discovery and allowed the results to be

published only five years later (in 1929), only to be met by disbelief by the medical and scientific

communities [3].

Ahead of his time, Berger was convinced that all mental processes were dependent on brain

activity. Interestingly, he believed that the electrical activity of the brain was the physical proof

for telepathy. Only in his later years, was he convinced that the human EEG could not exert any

action at a distance while still obeying the laws of conservation of energy [4].

Berger’s interest and motivation in the EEG was primarily fueled by his desire to establish a

connection between the mind and the psyche. The EEG however, became well known for its

diagnostic applications within ten years of Berger’s first publication (in 1929) [2]. More recently,

EEG has been utilized for therapeutic and rehabilitative purposes as well, e.g. - for treatment of

epileptic seizures and for augmenting communication [5, 6].

While the use of EEG as a therapeutic tool seems a rather abstract possibility and its potential in

augmenting communication perhaps more so, considerable success has been achieved in both

endeavors. The floodgate for research in these fields opened up with Neal Miller’s pioneering

work in the 1960’s and 1970’s on his theories about biofeedback.

Miller’s research on rats showed that operant conditioning of the autonomic nervous system is

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possible and that rats could be taught to exert voluntary control over their autonomic nervous

systems by means of positive and negative feedback (i.e. - operant conditioning) [7].

This suggested that perhaps humans too could directly influence their bodily mechanisms (with

biofeedback replacing operant conditioning), such as blood pressure, and that everybody could

be taught to do so. It is a well known fact that the autonomic nervous system is called so,

precisely because it is ‘automated’ and beyond voluntary control. At that time, Miller’s idea was

so radical and novel that it bordered on scientific heresy and he was the target of severe criticism,

although eventually he was able to prove his point, and gradually, biofeedback got accepted in

scientific circles. As expected, the mere possibility of treating diseases like hypertension, and

diabetes by psychosomatic means caught the attention of many researchers and years of

enthusiastic research followed.

The most significant clinical results in the use of biofeedback were:

i. EMG feedback in chronic neuromuscular pain [8].

ii. Neuromuscular rehabilitation of various neurological conditions, particularly external

sphincter control in enuresis and encopresis [9].

However, there were clinically unimpressive or negligible results in cases of hypertension and

heart rate [10, 11, 12].

It became obvious that the effects of biofeedback towards developing control over the autonomic

nervous system were rather limited and therefore not all disorders and diseases could be treated

by this modality. However, there was one notable exception: neurofeedback of brain activity

[13].

Neurofeedback uses monitoring devices to provide moment-to-moment brain activity

information back to the subject. This self-regulation modality is non-invasive and may offer a

good alternative or supplement to medication [14, 15]. The fact that man can be trained to

control and change his neuronal activity at will was sufficient motivation for researchers to delve

into the therapeutic and rehabilitative aspects of EEG control. Over the past five decades,

considerable evidence has been amassed indicating the success of EEG feedback therapy in

treating epilepsy, ADD, ADHD, autism etc [13 , 16, 17, 14, 15]. Neurofeedback has also shown

encouraging results in improving performance in sports, music and cognition [18, 15].

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Another distinct application of EEG feedback which has experienced explosive growth in the

past decade is in the area of ‘Brain Computer Interface’ technology.

1.1 BRAIN COMPUTER INTERFACE

BCI research aims at providing users with a means of communication which bypasses the normal

neuromuscular pathways of the brain, allowing even the most severely disabled to communicate

by deliberately changing their EEG.

The possibility of simply using thought to communicate with other beings and with machines has

been a fantasy since time immemorial. It has captured the imagination of mankind in the form of

ancient myths and in modern science-fiction. Today, this technology is very much a reality.

Primarily motivated by the desire to equip even the most severely disabled, like those suffering

from ALS with a means of communication, modern day BCIs have also generated interest as a

new means of communication for normal people, e.g. in electronic gaming [19].

A number of assistive techniques have been developed which aim at augmenting the

communication abilities of those suffering from severe motor disabilities. These methods, such

as those based on EMG or EOG recordings, provide the brain with new output channels for

controlling the external environment. The logical culmination to such techniques would be one

that permits the brain to bypass entirely its normal output channels [20, 1]. The BCI is such a

device.

In theory, the brain’s intentions should be discernible in the spontaneous EEG. In practice

however, the vast number of electrically active neurons, the complex geometry of the brain and

head, the trial to trial variability in brain operations and the severe attenuation of the EEG due to

the skull, limits the information discernible without averaging [21].

Instead of attempting to interpret the spontaneous EEG, another direction of research is aimed at

teaching individuals to produce EEG signals that can be easily interpreted and used for

generating a signal [21]. This voluntary control over the EEG signal can be obtained by using

biofeedback techniques, allowing the user’s intent to be conveyed by controlling certain EEG

characteristics. The function of the BCI is to translate the user’s brain activity into logical control

signals which can be configured to perform more complex tasks by designing different computer

applications, e.g. for controlling a cursor on the screen or a prosthetic device. Thus, the BCI can

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be thought of as a transducer between the user and the control interface (device). Figure 1.1

shows the basic design of a BCI. Typically, ‘Signal Processing’, ‘Feature Extraction’ and

‘Translation Algorithm’ are software based.

Fig. 1.1 Typical block diagram depicting a BCI

A typical signal acquisition system amplifies and digitizes the signal. Signal processing aims at

maximizing the SNR so as to make it easier to interpret the commands embedded in the signal. It

may involve artifact rejection, spectral filtering and spatial filtering. Feature extraction aims at

identifying those characteristics of the brain signal which are uniquely caused by a mental

process or state. These features may be temporal, spectral or a combination of both. The function

of the translation algorithm is to convert the independent variable (i.e. signal features) into

dependent variables (i.e. device control commands). An important requirement of the translation

algorithm is that it should adapt itself to the extent of control demonstrated by the user in order to

improve system performance. Automating the adaptation process continues to remain an

important challenge in BCI technology.

The importance of a BCI lies in the fact that it does not make use of peripheral nerves and

muscles, but rather depends solely on EEG signals produced by the neuronal activity within the

brain, and can therefore be used as a communication device by completely paralyzed patients

like those suffering from critical stage ALS, cerebral palsy, spinal cord injuries, brain-stem

stroke and muscular dystrophies; by bypassing the malfunctioning peripheral nervous system

(such individuals may not even have the ability to blink an eye lid).

Another clinically relevant application of BCIs is its potential in the restoration of movement in

paralyzed limbs through the transmission of brain signals to the muscles or external prosthetic

devices [22].

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Formally, a system can be considered a BCI only if it satisfies the following conditions:

i. The system strictly employs the use of EEG signals only, and not EOG or EMG signals

extracted over the scalp [23].

ii. The system not only records and analyzes brain signals, but also provides the results of

the analysis to the user in an online fashion, i.e. feedback is an essential requirement [23].

Unfortunately, a lot of the EOG and EMG based communication devices have been wrongly

called BCIs, especially in older literature.

A variety of methods for monitoring brain activity exist and theoretically they may all form the

basis of a BCI. Different techniques may yield different results since they use different correlates

of neural activity. These include invasive and noninvasive EEG recordings, MEG, fMRI, fNIR,

PET and SPECT [22, 23, 24, and 25].

The following discussion makes it clear that non-EEG based techniques are impractical for use in

a BCI:

i. MEG and EEG signals have the same neurophysiological origin and are the only

techniques which can offer real time results. MEG measures the magnetic activity

produced by neural function and has the advantage of being independent of head

geometry and offers better spatial resolution when compared to the EEG [26]. The

disadvantages of MEG within the context of BCI research are its bulk, expense and the

fact that it cannot be used in real life environments. Another disadvantage is that the

association between MEG and motor imagery (imagining movement of the body in its

entirety or of body parts) is poorly understood. This poses a potential problem since

many BCIs use motor imagery as a control signal.

ii. fMRI measures the changes in blood flow and is a safe technique. It is however

unsuitable for use in a BCI because of its low sampling rate (and therefore slow

feedback), expense, bulk and impracticality in a real life setting.

iii. fNIR allows non invasive monitoring of the brain’s hemodynamic and metabolic

response, and can therefore measure cognitive activity. While fNIR measurements are

possible in real life settings, BCIs based on these signals offer low communications

speeds (up to two minutes for communicating one bit) and are therefore unsuitable [24].

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iv. PET and SPECT result in exposure to ionizing radiation, require the injection of

radioactive substances, have low sampling rates and long preparation times and are

therefore unsuitable for use in a BCI.

Non invasive EEG based methods which have excellent temporal resolution and robustness in

most environments, with the requirement of only simple and inexpensive equipment have been

able to provide the basis for a practical BCI.

As far as non-invasive EEG based BCIs are concerned, the three most successful and widely

studied BCIs are based on the mu rhythm, P300 evoked potential and SCP respectively. While

the above mentioned BCIs are mostly capable of only binary control, this control has been used

in spelling devices, for environmental control, for answering oral questions etc by developing

specific user applications. While greater dimensions of control are possible, they are plagued by

accuracy related issues [27].

BCIs based on non-invasive EEG recordings usually have noisy signal quality, long training

periods, slow communication speeds, problems with long term recordings and the requirement of

continuous technical attention. This makes invasive EEG based BCIs using microelectrodes

implanted subdurally, or in the cortex an attractive option. They offer better SNR, allow

detection of high frequency oscillations, and seem to require lower training periods [28, 29].

However, invasive BCIs require neurosurgery and thus have a greater threshold for use. Not

surprisingly, very limited studies exist in this field and therefore it is not possible to come to a

generalization regarding its potential in real life scenarios. Unless invasive BCIs offer

profoundly superior performance, it is unlikely to replace its non-invasive counterpart. Another

issue regarding invasive BCIs, yet unresolved, is its long term stability and safety.

1.2 TYPICAL SIGNALS USED IN BCIs

The three commonly used signals in non invasive EEG based BCIs are the mu rhythm, the P300

and the SCP. These signals and the features associated with them which allow for their use in

BCIs are discussed in the following paragraphs.

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1.2.1 Mu Rhythm

When, one is not engaged in processing sensory input or motor output, the sensorimotor cortices

of people who are awake often produce 8–12 Hz EEG activity .This idling activity is called mu

rhythm when extracted over the sensorimotor cortex [21]. Electrodes placed in the bipolar

montage over Cz and C3 (or C4) and 3 cm anterior and posterior to C3 (or C4) according to the

10-20 International System of Electrode Placement (Figure 1.2) can be used to extract the mu

rhythm.

Fig. 1.2 International 10-20 System of Electrode Placement (F= Frontal, C= Central,

T=Temporal, P=Parietal, O=Occipital, A=Auricle, 'z' refers to electrode positions on the mid-

line, even and odd numbers refer to electrodes places on the right and left side respectively)

(Reproduced with permission after: Fundamentals of EEG Measurement, Measurement Science

Review, McGraw-Hill)

Factors suggestive of the potential of mu rhythm for EEG-based communication are [30]:

i. Their association with those cortical areas which are most directly connected to the

brain’s normal motor output channels.

ii. Movement or preparation for movement is typically accompanied by a decrease in mu

rhythm, particularly contra-lateral to the movement. This decrease is due to

desynchronized neuronal firing and is called ERD. It's opposite; a rhythm increase is a

result of synchronized neuronal firing and occurs with relaxation.

iii. Mu rhythm is relevant for use as an input to a BCI because ERD and ERS do not require

actual movement and occur with motor imagery (i.e. imagined movement) as well.

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Several laboratories have shown that people can learn to control mu rhythm amplitudes in the

absence of movement or sensation [21, 31]. About 80% of the users tested on mu rhythm based

BCIs had acquired significant control within 2-3 weeks of training and were able to answer

yes/no questions with accuracies of up to 95% in research settings [21]. In initial sessions most

employed motor imagery (e.g. imagination of hand movements, whole body activities,

relaxation, etc.) to control a cursor. As training proceeded, imagery becomes less important, and

users moved the cursor like they performed conventional motor acts [21].

Fig. 1.3 Mu rhythm waveform

(Reproduced with permission after: Brain-computer interfaces for communication and control,

Clinical Neurophysiology, Elsevier)

Figure 1.3 shows a mu rhythm waveform. As can be seen, relaxation results in ERS and

therefore higher voltage levels in the 8-12 Hz range in comparison to motor imagery where ERD

takes place, resulting in a low voltage level. It is important to emphasize that the difference

between the voltage levels for relaxation and motor imagery tends to diverge as training proceeds

and this helps in improving system performance. A user naïve to the system will be unable to

produce any appreciable difference in the mu rhythm power for the states of relaxation and

motor imagery.

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1.2.2 P300

Evoked potentials are brain potentials that are evoked by the occurrence of a sensory stimulus

and these are usually obtained by averaging a number of brief EEG segments, time registered to

a stimulus in a simple task [32]. Evoked potentials can be used to provide control when the BCI

application produces the appropriate stimuli. This paradigm has the benefit of requiring little or

no training at the cost of having to make users wait for appropriate stimuli

Evoked potentials are an inherent response and offer discrete control to almost all users [33].

The P300, a signal used in some BCIs is a positive wave peaking at 300ms after task-relevant

stimuli. It is extracted over the central parietal cortex [33].Users can change the amplitude of the

P300 by paying more attention to a specific event. Figure 1.4 shows a P300 wave. BCIs based on

the P300 are cue-based since the user needs to pay attention to stimuli and are therefore

considered synchronous.

Fig. 1.4 P300 wave

(Reproduced with permission after: Brain-computer interfaces for communication and control,

Clinical Neurophysiology, Elsevier)

On the other hand, a BCI based on the mu rhythm requires the user to shift between two different

mental states and is totally independent of external stimuli. It is therefore considered

asynchronous.

One of the commonly used applications based on the P300 is that of character recognition. Users

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are asked to select the letters in a word by counting the number of times the row or column

containing the letter flashes. Figure 1.5 shows a 6x6 grid containing the letters of the alphabet as

shown on the computer monitor. Response amplitude is reliably larger for the row or column

containing the desired letter (here 'I'). In order to distinguish the P300 from background noise,

several samples may need to be averaged. By doing so the noise tends to cancel and the P300

wave as shown in Figure 1.4 emerges. Therefore, the P300 is used in BCI systems to read the

information encoded in the EEG.

Fig. 1.5 6x 6 grid containing the letters of the alphabet (P300 BCI)

1.2.3 Slow Cortical Potentials

Voltage changes occurring in the 0.1 Hz to 2 Hz band are termed as SCP [30]. The origin of

SCP is thought to lie in the dendrites of pyramidal neurons in the superficial layers of the

cerebral cortex [34]. Interestingly, SCPs originating from posterior parietal and occipital sources

are resistant to operant conditioning, while central and frontal SCPs of both hemispheres can be

brought under voluntary differential control [22].The importance of the anterior brain system for

acquiring control over SCPs are highlighted in the studies where people with prefrontal

dysfunction like those suffering from ADD and schizophrenia have extreme difficulties in

acquiring SCP control [22].

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Like the mu rhythm, control over the SCP is not inherent, and requires training. Since control

over the SCP is independent of sensory stimuli, it forms the basis of an asynchronous BCI.

Studies have shown that people can be trained to modulate their SCPs reliably [30]. Negative

SCPs are typically associated with movement and other functions involving cortical activation,

while positive SCPs are usually associated with reduced cortical activation [35]. Figure 1.6

shows a typical SCP waveform.

SCP based BCIs have been tested extensively in people with late stage ALS and have proved

able in supplying basic communication capability. However, in a study attempting to compare

the mu rhythm, the P300 and the SCP based BCIs using seven ALS patients who had not yet

entered Locked in State, the performance of the SCP based BCI was the poorest. While all seven

patients were able to control mu rhythm based BCIs with more than 70% accuracy after twenty

sessions and four out of the seven could spell with P300 based BCIs, none of the patients

achieved acceptable performance rate for the SCP based BCI after twenty sessions. Acceptable

performance could be achieved only after much longer training duration [22].

Fig. 1.6 SCP waveform

(Reproduced with permission after: Brain-computer interfaces for communication and control,

Clinical Neurophysiology, Elsevier)

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1.4 OBJECTIVE

The following are the objectives of the project:-

i. To design and develop an EEG signal acquisition system with the aim of extracting the 8-

12 Hz frequency band.

ii. To develop a GUI in MATLAB so that data can be viewed in real time and the power in

the mu rhythm frequency band can be displayed objectively.

iii. Developing a portable BCI and performing preliminary testing by training normal

subjects to use the mu rhythm.

1.5 ORGANIZATION OF THE REPORT

The remainder of the report is organized as follows; Chapter 2 covers the design of the signal

acquisition system and the description of the required hardware and software. Chapter 3

discusses the results obtained and milestones achieved. Chapter 4 includes conclusions and the

future scope of the project. This is followed by the references and the annexure.

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CHAPTER 2

SYSTEM DESIGN AND METHODOLOGY

This chapter discusses the design considerations for the development of a BCI. It includes

discussions on the signal acquisition system and the associated software.

2.1 SIGNAL ACQUISITION SYSTEM

This stage is developed with the following goals in mind:

i. Extract the microvolt level mu rhythm from the sensorimotor cortex with minimal

distortion.

ii. Filter the EEG signal in a manner such that the least possible sampling rate can be

utilized without introducing aliasing distortion.

iii. Attenuate the signals outside the 8-12 Hz range as much as possible. The amplitude of

these frequency components is significantly larger than the mu rhythm amplitude and

may drive the amplifiers into saturation, therefore attenuating them is essential. The

presence of these frequencies, however, does not reduce the performance of the BCI,

although eliminating them proves useful in allowing visual inspection of the mu

rhythm on the oscilloscope without distortion from unnecessary frequency

components.

Figure 2.1 shows the block diagram of the stages involved in the signal acquisition system.

Fig. 2.1 Block diagram of signal acquisition system

2.1.1 Electrodes and gels

Electrodes suitable for EEG recordings can be made from a variety of materials, such as

stainless steel, gold plated silver, pure silver, pure gold and Ag/AgCl [36]. This project

utilizes disposable Ag/AgCl disc electrodes of size 10mm, purchased from ‘The Electrode

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Store’, USA. The factors motivating the use of these electrodes are:

i. Low offset voltage

ii. Excellent offset voltage stability

iii. Low polarization

iv. Low resistance and noise

v. Affordability

vi. Short delivery time

48 inch leads were utilized along with the detachable electrodes for conduction of signals

from the scalp to the system. Figure 2.2 shows the electrodes and leads that were used for the

project.

Fig. 2.2 10mm disposable electrodes and leads

Electrodes are placed on the scalp in accordance with the International 10-20 Electrode

Placement System (Figure 2.3). Electrodes placed in the bipolar montage over the following

locations have been found to yield the mu rhythm [23, 37]:

i. Electrodes at C3 and Cz; generally used for right handed subjects.

ii. Electrodes at C4 and Cz; generally used for left handed subjects.

iii. Electrodes placed 3cm anterior and posterior to C3; generally used for right handed

subjects.

iv. Electrodes placed 3cm anterior and posterior to C4; generally used for left handed

subjects.

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All four locations yield the mu rhythm, as expected. However, since the project members

who also act as subjects for testing purposes are right handed, further testing has been carried

out using the first and third configurations only; with higher preference to the first owing to

ease of electrode placement.

Fig. 2.3 International 10-20 System of Electrode Placement.

(Reproduced with permission after: Fundamentals of EEG Measurement, Measurement

Science Review, McGraw-Hill)

Before electrode placement, skin preparation is recommended which involves cleaning the

scalp with a methanol swab. The space between the electrode and the skin is filled with a

conductive gel/paste as this ensures lowering of impedance at the electrode-skin interface.

Two types of gels/pastes have been used in the project:

i. A non-irritating and non-greasy water soluble conductive gel manufactured by

‘Meditech International'. This gel however, has the drawback of being non-adhesive

and evaporating with time.

ii. 'Ten20' conductive paste, an adhesive paste which offers better conductivity, but is

found to be unsuitable for use with the disposable electrodes used in the project due

to difficulty in adjusting electrode placements. Removal of residual paste from scalp

after experimentation is also problematic, since the scalp has to be cleaned with

methanol.

2.1.2 Instrumentation amplifier

The instrumentation amplifier is the most crucial component of the signal acquisition system

and is responsible for setting the CMRR for the entire system. The first stage of the

instrumentation amplifier measures the differential signal between the two electrodes of the

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bipolar montage. In effect, this results in removal of the signals common to both leads,

thereby removing the DC signal from the EEG and allowing the use of a floating ground such

as that which exists in a human. Furthermore, the power line interference common to both

leads also gets eliminated. In the ideal case, only the mu rhythm emerges.

Since the instrumentation amplifier plays such a crucial role in the retrieval of EEG signals,

considerable time has been spent in researching potential options. Ultimately, the AD624- a

high precision, low noise instrumentation amplifier with a pin programmable gain in the

range of 1 to 10,000 is utilized in the project. With very high input impedance, excellent

noise performance and a CMRR of 130dB, the AD624 makes for an excellent front end

instrumentation amplifier [38].

Although, a relatively expensive component in relation to overall costs, it is not possible to

recreate the functional characteristics of the AD624 in a cheaper fashion using ICs and

discrete components.

The gain of the first AD624 is set at 1000 to extract the mu rhythm. The output of the

amplifier is the mu rhythm, in the range of tens of millivolts, and is fed into the filtering

circuit.

2.1.3 Analog band pass filter

The filtering circuit has to serve the dual purpose of limiting the frequencies to the

physiological range of interest and also to act as an anti-aliasing filter. The physiological

artefacts of concern, the EOG and EMG, which are maximal below 4 Hz and above 30Hz

respectively, need to be severely attenuated along with the power line interference centered at

50Hz (and its higher harmonics) [39].

The LF353 Op-amp characterized by its high slew rate and excellent CMRR (100 dB) is

employed for testing various filter designs [40]. These filters are designed, mindful of the

following requirements:

i. The frequency response in the frequency range of interest (8-12 Hz) must be as flat

as possible, i.e., percentage variation of gain in this band must be minimal.

ii. Signals below 4 Hz and above 30 Hz must be heavily attenuated so as to minimize

noise and reduce the sampling rate requirement.

A total of nine filters were designed and tested until a satisfactory design was found. A

summary of the important designs is given below.

i. RC band pass filter:-

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A 5-15 Hz BPF is designed and its frequency response is plotted in Figure 2.4. The

percentage variation in the gain for the 8-12 Hz range is only 5.5%, but the frequency

characteristic below 4 Hz is unsatisfactory with a maximum attenuation of only 50% with

respect to the 8-12 Hz band. In addition, the roll off at higher frequencies is poor.

Fig. 2.4 RC band pass filter response

ii. RC BPF cascaded with a LPF:-

In order to improve the roll off at higher frequencies, a LPF is cascaded with the RC BPF.

Instead of improvement in the frequency response, distortion occurs because of severe

loading, the cause of which is impedance mismatch. In order to correct this problem, a

voltage follower stage is added in between the two filters. The roll off improves and is

satisfactory but at the expense of increasing the maximum variation within the 8-12 Hz band

which increases to 14.28%. The frequency response of the RC BPF cascaded with the LPF

after adding the voltage follower stage is shown in Figure 2.5.

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Fig. 2.5 RC band pass filter cascaded with a voltage follower and a LPF

iii. Butterworth BPF:-

A fourth order BPF is designed with a pass band from 5-25 Hz by cascading second order

Butterworth BPFs. The frequency response (Figure 2.7) is found to be satisfactory with a

maximum variation within the 8-12 Hz band of about 4% only. The filter is designed to offer

a gain of 2.5 in the 8-12 Hz band. Figure 2.8 shows the circuit diagram of a second order

Butterworth BPF, two of which are cascaded (Figure 2.6) to create a fourth order filter, which

is used in the project.

Fig. 2.6 Structure of fourth order band pass filter

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Fig. 2.7 Fourth order BPF response

Fig. 2.8 Circuit diagram of Butterworth band pass filter

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2.1.4 Amplifier stage

A second stage of amplification is added so that the difference between the 8-12 Hz

frequency range and other frequencies becomes more pronounced. This serves the following

purposes:

i. The ADC used for digitization, requires the signal to be in the range of 500mV to 5V.

ii. Larger signal amplitude gives a better resolution while digitizing the signal.

The project utilizes an AD624 instrumentation amplifier for this amplification stage, although,

an amplifier design using Op-amps would work equally well. The gain for this stage is set at

100, resulting in an overall gain of 250,000 for the 8-12 Hz band.

2.1.5 Clamping stage

The signal needs to be clamped because the ADC requires the signal to be entirely above zero.

A clamping circuit is designed where the clamping voltage can be changed by adjusting a

potentiometer according to the nature of the signal. Figure 2.9 shows the circuit diagram of

the clamper employed. Post clamping, the signal can be readily digitized as required for

further processing.

Fig. 2.9 Circuit diagram of clamper

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2.2 POWER SUPPLY UNIT

A dual power supply providing an output voltage of +9V and -9V is designed in order to

power the signal acquisition hardware. Figure 2.10 shows the circuit diagram of the power

supply unit.

Fig. 2.10 Circuit diagram of power supply unit

2.3 NOISE CONSIDERATIONS

EEG signals are generally embedded in noise and a SNR of 1:1000 is common, since EOG

and EMG signals are also extractable over the scalp and may dominate in comparison to the

microvolt level EEG signal [32]. Various potential sources of noise with regard to this project

merit further discussion and are highlighted below:

i. After extracting a stable mu rhythm signal, the subject was made to blink, swallow

and clench the jaw muscles on the counts of an operator while the EEG waveform

was observed on an oscilloscope. This was done multiple times over a period of days

until it was ascertained that EOG and EMG artefacts do not seem to be captured.

ii. Traditional bio-signal acquisition techniques emphasize that the absolute impedance

of the electrode-skin interface should be less than 5kΩ and must be matched within

1kΩ of each other [32]. With modern day differential amplifiers, input impedances in

the range of hundreds of megaohm are common and therefore the requirement of

absolute impedance at electrode-skin interface of 5kΩ is not essential. In older

amplifiers, high electrode-skin impedance would result in the division of EEG

potentials across the electrode-skin impedance and the input impedance of the

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instrumentation amplifier in accordance with the voltage divider rule. This would

reduce the SNR significantly.

iii. However, the requirement of electrode impedances being closely matched is essential.

The reasoning behind this requirement is straightforward. The human body is a

conductor and power line interference gets induced in it. It can be assumed to be equal

in both electrodes since they are reasonably close spaced. However, a difference in

impedance between the electrode-skin contacts would result in a differential voltage

being produced across the two inputs of the instrumentation amplifier. This is a major

problem since even a small voltage difference would be magnified many times at the

output of the first amplifier. Therefore, electrode impedances must be closely matched.

In this regard it is beneficial if the absolute electrode-skin impedance is low as well;

since this reduces the maximum potential mismatch.

iv. As mentioned above, the power line interference is induced in the human body and

may flow through the measuring electrodes leading to an interfering differential signal.

If a low impedance pathway can be provided to this power line interference, the noise

inducible due to electrode mismatch can be reduced considerably. This is the purpose

of attaching a 'ground electrode' which is connected to the system common. The

ground electrode is attached at a location which is electrically silent (at least relatively

silent). In the project, the ground electrode is placed at the forehead. Although its

absence may not necessarily destroy the signal, its presence almost certainly 'cleans

up' the signal.

2.4 SAFETY CONSIDERATIONS

The ground electrode from the subject is connected to the amplifier common, which also acts

as the common for the entire system. This 'system common' is not connected to the ground of

the power supply mains, thereby providing electrical isolation of the subject and reducing the

risk of electrical shock [41]. This provision of safety is sufficient for research settings but

may not meet the more stringent clinical safety norms.

2.5 BCI DEVELOPMENT ON A COMPUTER

Figure 2.11 shows the post clamping stages required to realize a BCI. To the best of our

knowledge no previous attempt has been made at designing a BCI where the processes of

feature extraction and translation algorithm are implemented outside of a computer. This

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project aims at doing this using a PSoC microcontroller. Refer Annexure 1 for details on the

PSoC microcontroller and the motivation behind its choice.

Fig. 2.11 Post clamping stages of BCI development

Before attempting to implement this novel idea, a typical BCI with the processing performed

on a computer is designed. This section gives details on the same. Figure 2.12 outlines the

tasks performed.

Fig. 2.12 Block diagram of computer based BCI

The PSoC microcontroller is used to digitize the EEG signal. Digitization is carried out at 256

sps and the digitized data is transmitted serially to the computer. Since the laptops used in the

project do not have a RS-232 serial port, a RS-232 to USB converter is used.

A GUI is developed in MATLAB which receives the data transmitted from the PSoC and

also incorporates certain other features, summarized below:

i. Serial data can be recorded from any of the COM ports on the computer, as chosen by

the operator. Data can be recorded according to the length of the epoch or according

to the number of samples desired.

ii. The EEG signal is displayed on the GUI.

iii. Since the next step involves the calculation of the Fourier transform in order to find

the power in the 8-12 Hz range, the removal of the dc component from the signal is

essential. This is done by subtracting the average value of the signal from each sample.

iv. A bar graph, acting as a power meter is present, which objectively displays the power

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in the mu rhythm frequency range (8-12 Hz). Since this power can vary over time

within the same session and from session to session, depending on a multitude of

factors, a provision to perform scaling of the power is present. This can be done by

adjusting a horizontal scroll bar, provided below the power meter. This scaling is

done in order to restrict the ambient changes in power to the range of 0 to 100 such

that the power levels for relaxation and motor imagery fall between 0 and 100.

v. A provision to view real time data, to record data and to load previously recorded data

is available. The operator can also perform offline spectral analysis of the EEG signal

by choosing 'Math Operations’.

Figure 2.13 shows the GUI developed using MATLAB that has been used by the operator

during the initial testing period.

Fig. 2.13 MATLAB GUI for operator

For the purpose of neurofeedback training, an application is designed in the Visual Basic

script using Microsoft Visual Studio, 2005 (Figure 2.14). This 'user' GUI has the following

features:

i. A cursor is present at the centre of the screen with targets at the top and bottom end of

the screen respectively.

ii. On starting the application, one of the targets is highlighted; this is the cue for the user

to move the cursor in that direction.

iii. If the user can move the cursor to the highlighted target successfully, it is registered as

a ‘hit’. The application then refreshes itself with the cursor back at the centre, and a

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new highlighted target.

iv. If the user moves the cursor in the wrong direction and makes contact with the target

that is not highlighted, it is registered as a 'miss' and the application refreshes itself

with the cursor back at the centre of the screen. The targets are highlighted in a

random order, thereby giving the user an opportunity to demonstrate control over the

cursor movement.

v. The results of the session in terms of accuracy and information transfer rate are

provided to the user online.

Fig. 2.14 GUI used for feedback training of user

This user GUI is designed to read the mu rhythm power values from MATLAB; compare it to

a threshold and move the cursor upwards or downwards depending on whether the power is

greater than or less than the threshold. The GUI has a provision to set the threshold value in

the range 0 to 100. Establishing communication between the MATLAB and the Visual Basic

GUI is a challenging task which is circumrouted in a unique manner. MATLAB writes the

power in the mu rhythm band into a text file after every recorded epoch and Visual Basic

based GUI reads this power every 350 ms and moves the cursor according to the value of the

threshold.

Subjects were trained using this GUI for a period of two weeks while corrections and

improvements in the code were being incorporated. An important debugging problem was

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realized where the RS-232 to USB converter would malfunction, sending two data samples in

a manner such that the computer would read it as one large sample. This would cause spikes

in the EEG waveform observed on the MATLAB GUI and would also lead to huge power

values in the 8-12 Hz band, thereby often providing incorrect feedback. This problem has

been corrected by stemming the EEG sample values to zero if they are larger than the digital

equivalent of 5V.

After a period of two weeks, the BCI seemed to work satisfactorily and the project proceeded

to implement the same functional blocks as the ones currently used in MATLAB using the

PSoC microcontroller, with dedicated software written in Visual Basic.

2.6 BCI DEVELOPMENT ON PSoC

The MATLAB GUI is now discarded for signal processing with the entire processing being

carried out on the PSoC microcontroller, with only the power in the 8-12Hz range being

serially transmitted to the computer, thus making it a completely stand alone BCI system.

Figure 2.15 shows the sequence of the tasks carried out. These are summarized below:

Fig.

2.15 Block diagram of PSoC based BCI

2.6.1 Processing on the PSoC

i. Incoming analog signal is sampled at 128sps. Following this, 64 consecutive data

samples are digitized and stored in an array. This process takes approximately 0.50s

(error is 2% or less), thereby resulting in an epoch length of 0.50s. This epoch length

is critical in calculating the frequency bin of the Fourier Transform data, as shown in

the subsequent chapter.

ii. Post digitization, the average of the EEG signal is calculated and subtracted from

each sample. This is done to remove the DC offset; failing which, the power in the

DC component overshadows the power in the remainder of the spectrum. This

method of offset compensation is utilized since the DC offset in the signal varies

from trial-to-trial and occasionally within the same trial as well.

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iii. The Cooley-Tukey FFT algorithm, written in C is used for calculating the 64 point

DFT of the recorded data.

iv. The average power in the 8-12 Hz range is calculated and serially transmitted to the

computer.

2.6.2 Visual Basic GUI for the user

i. This GUI receives the average power in the 8-12 Hz range. It has two screens, one

for the operator (Figure 2.16) and one for the user (Figure 2.17).

ii. The operator screen has a power meter just like the MATLAB GUI of the previous

subsection. Provision to scale the power as in the MATLAB GUI is present. After

calibrating the system initially i.e. after scaling the power values appropriately to fit

the 0-100 range, no calibration changes need to be made for that session if the signal

quality remains steady.

iii. The user screen has the same features as the one described in the previous subsection.

The only additional feature is a provision to save the results of a session as a text file

in memory.

Fig. 2.16 Operator screen

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Fig. 2.17 User screen

2.7 NEUROFEEDBACK

The method of neurofeedback is simple. After a stable mu rhythm recording is obtained, the

operator sets the threshold (empirically) in the Visual Basic GUI in a way such that the cursor

moves up and down approximately equal number of times. The importance of suitable

calibration cannot be overemphasized and therefore the operator is an integral part of the BCI.

After setting the threshold, the training session begins and the user tries to move the cursor in

the direction of the highlighted target. If the cursor is to be moved up, the user has to

mentally relax and if the cursor is to be moved down, the user has to perform motor imagery.

The direction of cursor movement acts as feedback for the user.

After sufficient training, the user is able to associate certain mental states with particular

cursor behaviour. With training, the user reaches a stage where the cursor movement can be

controlled without much cognitive effort.

The objective of this project is restricted to testing the capability of the BCI developed to

function suitably and not to perform a study on the acquisition of mu rhythm control.

Therefore, only a total of three subjects have been trained for two weeks.

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CHAPTER 3

RESULTS AND DISCUSSION

This chapter discusses the results obtained and the milestones achieved over the course of the

project. It also includes an account on the challenges encountered and the training protocol

employed.

3.1 OBSERVATIONS ON THE ACQUIRED EEG SIGNALS

The first aim of the project was to develop the EEG acquisition hardware. After realizing a

satisfactory theoretical design, the necessary circuits were tested independently for their

frequency response. After the results were deemed satisfactory, the entire signal acquisition

system was assembled and tested again. For testing purposes, the signal used was generated by

an oscillator. Ultimately, the circuit was soldered on to a circuit board.

The project then proceeded to extract the mu rhythm. After placing the electrodes at the

appropriate locations on the scalp, a low frequency (< 20Hz) and low amplitude (1V, peak to

peak) signal was observed on the digital storage oscilloscope. Figure 3.1 shows one of the

earliest recordings of the signal.

Fig. 3.1 One of the first EEG recordings

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Over the course of the project, all project members were able to visually recognize the mu

rhythm. It was realized that the mu rhythm often manifests itself in certain distinctive and typical

waveforms (visually observed). These observations are summarized below. It is important to

note that these observations are restricted to the system developed and cannot be generalized,

owing to the differences in the frequency response of various signal acquisition systems.

i. Figure 3.2 shows the most commonly observed mu rhythm waveform.

Fig. 3.2 The most common mu rhythm waveform

ii. Figure 3.3 shows a train of oscillations with very similar amplitude. This waveform has

been photographically captured from the Digital Storage Oscilloscope. In particular, the

frequency of these oscillations is closely matched.

Fig. 3.3 Periodical mu rhythm waveform

iii. Figure 3.4 shows a signal waveform which is characterized by intermittent spikes.

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Fig. 3.4 Mu rhythm waveform with intermittent spikes

iv. Fig 3.5 shows a signal characterized by oscillations, where the amplitude seems to vary

periodically.

Fig. 3.5 Mu rhythm waveform with periodically varying amplitude

v. Bilateral oscillations of extremely large amplitudes are observed when the subject is

asleep. This is in accordance with previous findings [42].Due to the rarity of such a

situation during experimentation; no waveform for the same is available.

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In order to extract the mu rhythm, the placement of the electrodes is critical. Some observations

in this regard are listed below:

i. While the signal amplitude may show ambient changes due to the mental state of the

subject, and from session to session, a major problem encountered during

experimentation was due to the drying up of the electrode gel, slight changes in the

electrode position as a result of subject movement and electrode aging (since the

electrodes are temporary disposable electrodes). These factors not only cause a reduction

in signal amplitude but also result in the infusion of power line interference. Figure 3.6

and Figure 3.7 show the waveform and the corresponding DFT plot of an EEG signal

where slight power line noise is being induced as a result of the gel drying up.

Fig. 3.6 Mu rhythm waveform superimposed with 50 Hz power line interference

Fig. 3.7 DFT of mu rhythm waveform with the 50 Hz peak clearly visible

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ii. As mentioned earlier, the interelectrode impedance must be matched within 1kΩ of each

other and in general the absolute electrode-skin impedance must be considerably lower

than the input impedance of the instrumentation amplifier. Therefore, not surprisingly,

the output of the signal acquisition system is saturated with 50 Hz noise if an open circuit

exists between the inputs of the instrumentation amplifier.

iii. After placing the electrodes on the scalp, the power line noise reduces considerably. This

reduction of power line noise corresponds to a lowering of impedance at the inputs of the

instrumentation amplifier. If the electrodes are placed close enough on the scalp, only a

constant DC output is observed and power line interference totally disappears.

iv. In order to extract the mu rhythm, the electrodes are generally placed at Cz and C3

according to the International 10-20 System of Electrode Placement. If the electrodes are

suitably gelled and are placed properly, the mu rhythm is observed. The presence of a

constant DC signal or contamination due to power line interference is a clear indication

that the electrodes are either inadequately gelled or improperly placed.

3.2 PRELIMINARY SIGNAL ANALYSIS ON THE COMPUTER

After the functioning of the signal acquisition system was verified, the analog output was

digitized on the PSoC. During the preliminary stages of signal analysis and testing, the digitized

signal was sent to the laptop at a rate of 256 sps. Signal analysis was then carried out on

MATLAB using a custom made graphical user interface. In the preliminary signal analysis, large

signal epochs are captured (up to 2.5s) and stored in memory. EEG signals from the subject are

recorded, while the subject is in different mental states, such as, during relaxation, while

performing voluntary movement and during motor imagery. The preliminary results from the

analysis of these signal recordings are listed below:

i. The signal power is mostly confined to the frequencies below 20Hz. While significant

power seems to be present in the 8-12 Hz range, the DFT coefficients corresponding to

frequencies below 8 Hz are also large in amplitude. While the origin of these lower

frequency signals is unknown, they do not interfere in the working of the BCI. Figure 3.8

shows the 2048 point DFT of an EEG signal and is indicative of the power in different

frequency ranges.

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Fig. 3.8 2048 point DFT of an EEG signal

ii. Initially, there is no difference in mu rhythm power for a subject performing relaxation

and motor imagery. However, a reduction in power is observed when a person performs

real movement, in comparison to a state when the person is relaxed.

iii. After affirming a difference in mu rhythm power for movement and for relaxation,

subject training is initiated. The goal of training is to allow the subject to consciously

control mu rhythm power by changing the mental state between relaxation and motor

imagery. During preliminary sessions, auditory feedback about the subject’s mu rhythm

power is given verbally by the operator, while the subject is instructed to relax or to

imagine movement. The mu rhythm power is calculated and displayed in the operator’s

GUI.

iv. As experimentation progressed, a GUI was designed using Visual Basic to provide visual

feedback directly to the user. Further training was carried out using the Visual Basic GUI.

A formal training protocol was formulated and adhered to, requiring each subject to train

for forty five minutes, six days a week for a period of two weeks. Each training session

was restricted to fifteen minutes only, since it was found to be mentally exhausting. In

this way, three subjects trained thrice daily. These time regulations are incorporated in the

Visual Basic GUI itself, which pauses after every fifteen minutes.

As previously mentioned, the signal quality may deteriorate due to the gel drying up, due to

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electrode movement and due to electrode aging. In order to compensate for these intermittent

changes without changing the threshold for cursor movement (which is empirically determined

by the operator before initiating a training session), the operator has the provision to perform

digital scaling of the mu rhythm power. These intra-session calibrations are ad hoc in nature and

are unavoidable.

In this manner, training progressed and all three subjects showed significant improvement in

their ability to control the mu rhythm power. Figure 3.9 and figure 3.10 are the DFT plots of a

subject during states of relaxation and motor imagery respectively. While not visually

ascertainable, the mu rhythm power in Figure 3.9 is approximately four times larger than the mu

rhythm power in Figure 3.10.

Fig. 3.9 DFT of subject relaxing(x axis is frequency in Hertz whereas y axis is amplitude in

arbitrary units)

Fig. 3.10 DFT of subject performing motor imagery (x axis is frequency in Hertz whereas y axis

is amplitude in arbitrary units)

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The following formulas are employed for calculating the power in the mu rhythm range:

i. Frequency resolution for the DFT of the acquired data is given by (3.1)

(3.1)

Where, is the frequency resolution

is the epoch length of the acquired data

is the number of samples in the captured epoch

is the length of the DFT employed.

The size of the frequency bin, Fb for each sample in the DFT is given by (3.2)

(3.2)

Thus the amplitudes of the DFT, a[1], a[2] …a[N] corresponded to the amplitudes for

frequencies Fb, 2Fb…NFb.

Equation (3.3) is used for calculation of power in the frequency range of interest:

∑ ( )

(3.3)

Where, is the average power in the frequency band of interest

is the number of samples for which the power is calculated

and are the sample numbers of the frequencies corresponding to the highest and lowest

frequencies of the frequency band

is amplitude corresponding to the ith

frequency component

Analysis on a long epoch length would yield a better frequency resolution, thereby allowing

more accurate measurements of power in the 8-12 Hz range. However, using a long epoch length

reduces the speed of communication. Thus, there is a tradeoff between the accuracy of power

measurement versus the speed of communication. While epochs up to 2.5s are used in the

MATLAB based BCI, shorter epochs are used in the PSoC based BCI. Even the sampling rate is

reduced to 128 sps. This is done since the PSoC can maximally calculate a 64 point DFT.

Equations (3.4) and (3.5) are employed to quantify the results of the BCI:

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i. Measuring accuracy

(3.4)

ii. Measuring communication speed

(3.5)

Since the BCI is simply a communication device, the accuracy and speed of communication

completely quantify it.

3.3 RESULTS OF BCI IMPLEMENTATION ON THE PSoC

After verifying the functional capability of the BCI designed using MATLAB, the BCI design is

implemented on the PSoC. To the best of our knowledge, no previous attempt has been made at

developing a microcontroller based BCI. The software required in providing neurofeedback is

completely standalone and comes with its own installer.

Epochs of 0.50s are used for calculating power. The power is calculated in the PSoC and is

serially transmitted to the Visual Basic GUI. The results obtained using this BCI are quantified

below:

i. Approximate accuracy = 70% for each subject

ii. Highest accuracy = 80%

iii. Maximum hit rate = 7 hits/min

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CHAPTER 4

CONCLUSIONS AND FUTURE SCOPE

4.1 CONCLUSIONS

A mu rhythm based BCI has been designed and implemented in a novel manner. Its functionality

is verified by training subjects for a period of two weeks, after which they were able to show

sufficient control over cursor movement in order to validate the claims towards the BCI’s

functionality.

This BCI design is not only the first of its kind but is also cost effective. A unit commercially

designed on the basis of this prototype would cost less than `10,000.

4.2 FUTURE SCOPE

i. The signal acquisition system designed in the project is a single channel system which aims

at extracting a very specific frequency band. A general signal acquisition system capable of

acquiring any frequency within the EEG frequency range can be easily developed by

modifying the filter design. With such a purpose in mind, the number of channels would

have to be increased, although, it would still prove to be extremely cost effective in

comparison to commercially available systems.

ii. The present system hardware is electrically isolated and will meet the safety requirements of

research work. In order to meet the more stringent clinical standards, a right leg driver can

be added.

iii. Instead of using the CY3210 evaluation board, a circuit can be designed for the PSoC with

only those hardware peripherals on it which are absolutely essential for the project. This

would lead to a considerable reduction in the cost of the BCI developed.

iv. The signal acquisition system can be fabricated on a single circuit board, thereby making it a

compact package. Once the hardware becomes standalone, the BCI becomes a reproducible

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system that is a candidate for mass production at a fraction of the cost of commercially

available BCIs.

4.3 FINAL REMARKS

Hans Berger modified radio equipment in 1923 to acquire the first ever EEG signal. By doing so,

he opened an entirely new avenue for research. After more than eight decades of research much

is known and much remains a mystery about the nature of the EEG signal.

The most basic aspects of this signal are yet to be clearly understood. One of the obvious

questions on the nature of the EEG signal still remains unanswered - is the system linear or

nonlinear?

Besides the obvious problems in the acquisition of a signal only a few millionths of a volt and

that too embedded in noise that is at least a thousand times greater in amplitude, the very nature

of the signal makes it difficult to acquire and analyze.

While the EEG signal is seemingly chaotic, perhaps its global dynamics are not. To study this

complex signal it becomes essential to break it down into distinct frequency bands. This raises

the question whether these bands are correlated in any manner whatsoever, or not?

Answers to such questions would enable BCI researchers to develop superior systems since this

would allow them to not only choose appropriate signals for use in a BCI but also to choose

suitable signal processing algorithms.

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treatment of attention - deficit hyperactivity disorder”, Expert Review of

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Volume 579, Issue 3, 2007, PP. 621-636.

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[20] Hari Singh Dhillon, Rajesh Singla, Navleen Singh Rekhi and Rameshwar Jha, “EOG and

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[29] Elizabeth A Felton, J Adam Wilson, Justin C Williams and P Charles Garell,

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[35] Birbaumer N, “Slow cortical potentials: Their origin, meaning, and clinical use”, Brain

and Behavior: Past, Present and Future, Tilburg University Press, Tilburg, pp. 25-39.

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Applications, Artech House Publishers, Edition 1, ISBN: 159693204X.

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[39] Mehrdad Fatourechi, Ali Bashashati, Rabab K Ward and Gary E Birch, “EMG and EOG

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*************

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APPENDIX A

PROGRAMMABLE SYSTEM ON CHIP

The Programmable System on Chip (PSoC) is a range of Programmable-System-on-Chip

controllers manufactured by Cypress Semiconductors. The PSoC has a microcontroller,

integrated user programmable analog and digital logic blocks and programmable interconnects.

PSoCs offer the ability to design a truly integrated system that may not even require the use of

external analog signal processing components.

The PSoC‟s architecture allows users to create customizable peripheral configurations that match

the requirements of individual applications. A fast central processing unit (CPU), flash program

memory, Static Random Access Memory (SRAM) data memory, and configurable input/output

(I/O) pins offer flexibility in system design.

Cypress offers three kinds of PSoC microcontrollers, viz., PSoC1, PSoC3 and PSoC5. These on

chip systems differ in their CPU architecture, ROM and RAM sizes and the availability of on

chip resources.

The microcontroller used for the purpose of the project is the PSoC CY8C29466, PSoC1. The

reasons for this choice are as follows:

i. The 32-bit Multiply Accumulate (MAC) Register which greatly enhances the speed of

general mathematical calculations, especially the calculation of Sin and Cos values

resulting in speedier DFT configurations.

ii. Availability of on chip customizable analog and digital modules, minimizing external

hardware.

iii. Simplicity and low cost.

The Logical Block diagram of the PSoC1 microcontroller is given in Figure A-1.

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Fig. A-1 Logical block diagram

The four main areas of the architecture as seen in the above figure are:

i. PSoC core, i.e. CPU core (M8C) and its associated resources

ii. Digital system (digital block array)

iii. Analog system (analog block array)

iv. System resources

Each of these core areas consist of user programmable blocks which, when combined with a

configurable global bus allows the user to create a completely customizable system. The

PSoC CY8C29466 has three input/output (I/O) ports that can be connected to global digital

and analog interconnects, providing access to 8 digital and 12 analog blocks. Figure A-2

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shows the pin configuration of the CY8C29466. The importance of the pins relevant to the

project is discussed, as and when needed.

Fig. A-2 Pin-out for CY8C29466

A short discussion on the PSoC core, the digital blocks and the analog block is provided below:

A.1 PSoC CORE

The M8C CPU core of the PSOC has an 8-bit-Harward Architecture. It can run at a clock

frequency of up to 24MHz, clocking out four million instructions per second. The user‟s program

is timed and protected using the sleep and watchdog timers, although this feature is not used in

the project. The user has 32kb of flash for storage of programs (with an erase-write endurance of

50,000 cycles), 256 bytes of SRAM for data storage and up to 2kb of EEPROM that is emulated

using the flash. Three, eight pin I/O ports: P0, P1 and P2 are available to the user.

The system can run at 5V or at 3.3V. The supply voltage decides the ranges of voltage in which

the analog blocks operate. Supply voltage is given to pin 28 (Vdd), and ground is given to pin

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14 (Vss). The 5V mode of voltage operation is selected to give a large rail to rail operation for

the analog blocks.

For its clock requirements, the system can use an internal 24MHz RC oscillator which is accurate

to 2.5% of its value within the operating temperature (-40 to 85 C) and voltage (3 to 5.25 V)

ranges of the PSoC. For higher accuracies a 32.786 kHz External Crystal Oscillator (ECO) can

be used as a real time clock (RTC). Optionally this external crystal can be used to generate an

accurate 24MHz system clock using an on chip Phase Lock Loop (PLL). Another option for

system clock is to provide an external 24MHz signal that can be given at pin 17 (EXTCLK).

Since the clock accuracy provided by the on chip oscillator is sufficient for the project, the

internal 24MHz oscillator is used. This 24MHz clock, which is used to derive other clock

frequencies, is called the „SysClk‟. SysClk can have a value of 24MHz or 6MHz, for both 5V

and 3.3V supply.

The CPU clock can be run at SysClk/N, where N can take values 1, 2, 4, 8, 16, 32, 128 or 256.

SysClk/1 is selected for use as CPU clock in this project since it provides fast computational

speeds.

The SysClk can be internally tapped and divided to give slower frequencies that may be required

for running analog or digital blocks. Three clock sources can be derived from the SysClk; VC1,

VC2 and VC3. Their Clock frequencies are given as follows:

i. VC1=SysClk/N, where N=1, 2, 3…16

ii. VC2=VC1/N, where N=1, 2, 3…16

iii. VC3=VC3 source/VC3 divider, where VC3 source can be VC1, VC2, SysClk/1 or

SysClk*2 and the VC3 divider =1, 2, 3…256.

This project uses the following clock configurations:

i. CPU clock= SysClk/1

ii. VC1 = SysClk/12 or SysClk/16 (to be given to the Analog to Digital (ADC) block,

depending on the sampling rate)

iii. VC2 = VC1/16 (to be given to a 16 bit down counter to verify ADC operation)

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iv. VC3 = ((SysClk/1)/156) (to be given to the TX module which sends data serially to the

computer)

The PSoC‟s general purpose input output (GPIO) pin provides connection to the CPU and the

digital and analog resources of the device. Each pin‟s operation mode may be selected from eight

possible options:

i. High Z: Standard configuration for digital I/O pins

ii. High Z Analog: Standard configuration for analog I/O pins

iii. Pull up: Gives a resistive pull up or a strong drive to Vss depending on the data bit

given to the pin

iv. Pull down: Gives a resistive pull down or a strong drive to Vdd depending on the data

bit given to the pin

v. Open Drain High/Low: These are the same as the pull up/down without the pull

up/down resistor. This means when used as an input there must be an external resistor

vi. Strong: A signal of Vdd on high and Vss on low at the pin is given to drive external

components connected to the pin

vii. Strong Slow: Similar to strong, it adds additional slew to the output signal. In some

applications it reduces audible noise in the circuit

These features allow great flexibility in external interfacing. Each pin can generate a system

interrupt on high level, low level and change from last read. This feature is not needed and is not

used.

A.1.1 Reference Selection for the PSoC

Selecting reference is important to ensure appropriate functioning of the analog modules.

Selecting the reference is done by selecting the Ref Mux property from a list of given options in

the PSoC Designer. The range of Ref Mux values available to the user are given in Table A-1.

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Table A-1. Analog ground and reference values

Selection Voltage Range

VDD/2 +/- BandGap 1.2 V to 3.8 V for VDD =5.0 V

0.35 V to 2.85 V for VDD =3.3 V

VDD /2 +/- VDD /2

0.0 V to 5.0 V for VDD =5.0 V

0.0 V to 3.3 V for VDD =3.3 V

BandGap +/- BandGap

0.0 V to 2.60 V for VDD =5.0 V

0.0 V to 2.60 V for VDD =3.3 V

1.6*BandGap +/- 1.6*BandGap

0 V to 4.16 V for VDD =5.0 V

Not valid for VDD =3.3 V

2*BandGap +/- BandGap

1.3 V to 3.9 V for VDD =5.0 V

Not valid for VDD =3.3 V

2*BandGap +/- P2[6]

2.60-P2[6] to 2.60+P2[6] for VDD =5.0 V

Not valid for VDD =3.3 V

P2[4] +/- BandGap

P2[4]-1.30 V to P2[4]+1.30 V for VDD =5.0V

P2[4]-1.30 V to P2[4]+1.30 V for VDD =3.3V

when P2[4]<1.8 V

P2[4] +/- P2[6]

0.3 V to 4.4 V for VDD =5.0 V

0.4 V to 2.8 V for VDD =3.3 V

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For a 5V supply, a Ref Mux range of VDD/2 +/- VDD/2 gives a range of operation from 0V to

5V for the analog components. Although this is supply dependent, it provides the maximum

possible range for system operation and is best suited for the project since the supply is drawn

from a stable USB port. This reference range gives an analog ground (AGND) of 2.5V but this

value is not used in this system as the data is sampled in an unsigned format.

A.2 ANALOG SYSTEM

The analog system is composed of twelve configurable blocks, arranged in four columns, each

containing an Op-amp circuit in the top-most block that allows the creation of complex analog

signal flows. Figure A-3 gives a diagram of the analog system.

Fig. A-3 Analog system block diagram

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Analog peripherals are very flexible and can be customized to support specific applications.

Port0 pins are associated with analog input and output. The connections to the analog blocks are

chosen using the analog multiplexers, provided with each analog block column. Some of the

PSoC analog functions (mostly available as user modules) are:

i. ADCs (maximum of four, with 6 to 14 bit resolution)

ii. Filters (2, 4, 6 or 8 pole band pass, low pass, and notch)

iii. Amplifiers (maximum four, with gain up to 48x)

iv. Instrumentation amplifiers (up to two, with gain up to 93x)

v. Comparators (maximum four, with 16 selectable thresholds)

vi. DACs (maximum four, with 6 bit to 9 bit resolution)

vii. Multiplying DACs (maximum four, with 6 bit to 9 bit resolution)

viii. High current output drivers (four with 30-mA drive as a core resource)

ix. 1.3-V reference (as system resource)

x. DTMF Dialler

xi. Modulator

xii. Correlator

xiii. Peak detector

The analog blocks used in the project are listed as follows:

A.2.1 Programmable gain amplifiers (PGA):

The PGA User Module implements an Op-amp based non-inverting amplifier with user

programmable gain (Figure A-4). The module used is named „PGA‟ and is placed in the first

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analog block. The input to PGA is given from Port0 pin1 (Port_0_1). The pin is configured to

work in High Z analog mode.

Fig. A-4 Programmable gain amplifier

This amplifier has high input impedance, wide bandwidth, and selectable reference. The PGA

User Module amplifies an internal or externally-applied signal. This signal can be referenced to

the internal analog ground or any other selected reference. The gain of the amplifier is set by

programming the selectable tap in a resistor array and the feedback tap in a continuous time

analog PSoC block. The gain, input, reference, and output bus enable are set by the user from

tables of values in the Device Editor. For gains greater than or equal to one, the amplifier has the

transfer function given by (A.1).

( ) (

) (A.1)

PGA is programmed for a gain of one and acts as a voltage follower for impedance matching

between the external signal and the ADC.

A.2.2 Variable resolution incremental analog to digital converter (ADCINVR):

The ADCINVR is an integrating Analog to Digital Converter with an adjustable resolution

between 7 and 13 bits. It operates at a sampling rate that can be varied from 4 to 10,000 sps,

depending on the selected resolution, DataClock and CalcTime parameters. In this project, the

ADCINVR module is named „ADC‟ and works at a resolution of 10-bits. Operating within a

voltage range of 0V to 5V gives a resolution of 4.88mV per bit. As mentioned earlier the data is

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assumed to be unsigned. The input of ADC is taken from the output of PGA. Figure A-5 gives

the functional diagram of the ADCINVR module.

Fig. A-5 ADCINVR block diagram

The ADCINVR is formed from a single analog switched capacitor PSoC block and three digital

PSoC blocks. The analog block is configured as an integrator that can be reset. Depending on the

output polarity, the reference control is configured so that the reference voltage is either added or

subtracted from the input and placed in the integrator. This reference control attempts to pull the

integrator output back towards AGND. An 8-bit counter is used to accumulate the number of

cycles for which the output is positive. A 16-bit PWM is used to measure the integration time

and gate the clock into the 8-bit counter. All four blocks, are given the same clock, VC1. The

sampling rate of ADC is set to 256 sps for subject training and 128 sps for the PSoC based BCI

system. Equation (A.2) gives the parameter values needed to set the sampling rate:

(A.2)

For a sampling rate of 256 sps, at a resolution of 10-bits per sample, DataClock (VC1) is given at

SysClk/12 and the CalcTime value (which can vary from 1 to 65,536) is set at 3,700.

For a sampling rate of 128 sps at a resolution of 10-bits per sample, DataClock (VC1) is given at

SysClk/16 and the CalcTime value is set at 7,600.

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A.3 DIGITAL SYSTEM

The digital system comprises of 16 PSoC digital blocks. Each is an 8 bit resource. These can

operate independently or in concert with other blocks to form 16, 24 and 32 bit peripherals which

are called modules. Figure A-6 gives the functional diagram of a PSoC digital block.

Fig. A-6: Block diagram of PSoC digital block.

Digital blocks are provided in rows of four and for the CY8C29466 there are 4 rows, making a

total of 16 available digital blocks. Digital peripheral configurations include:

i. Pulse Width Modulator, PWMs (8 to 32bit)

ii. PWMs with dead bands (8 to 32 bit)

iii. Timers (8 to 32 bit)

iv. Universal Asynchronous Receiver Transmitter, UART; 8-bit with selectable parity (up to

two)

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v. SPI slave and master

vi. I2C slave and multi-master

vii. Pseudo Random Sequence (PRS), generators (8 to 32bit)

The digital blocks can be connected to any GPIO through a series of global buses that can route

any signal to any pin, by altering the row input and row output configuration (Fig.6). These

buses also allow for signal multiplexing and for performing logical operations. The following

digital blocks have been used in the project.

A.3.1 16-bit down counter

It is a 16 bit down counter with a programmable period, made using two PSoC digital blocks. In

this project VC2 is given to the timer block for its operation. The period of the clock is

programmed to the maximum possible value of 65,535. Once started, it counts down from the

programmed period. A compare value of 0 is programmed on to the compare register of the

counter. The counter generates an interrupt when the period value becomes equal to or falls

below (depending on the counter configuration) the compare value.

This feature is not used here as the purpose of the counter is to function as a timer. Therefore, the

timer interrupt is disabled. The 16-bit down counter is used to verify the functioning of the ADC

at the correct sampling rate. The module is named „Timer‟. It is started before the acquisition of

data begins. After the data values have been acquired, Timer is stopped. The time elapsed after

acquisition of 64 data samples is displayed on the LCD. Figure A-7 shows the functional block

of the timer.

Fig. A-7 Functional block diagram of Timer

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The capture bit is tied low; this is needed for proper function of the software capture mechanism.

The timer is synched to SysClk by configuring the ClockSync value.

A.3.2 8-Bit serial data transmitter-TX8

The TX8 module is an 8-bit RS-232 data format compliant serial transmitter with programmable

clocking and selectable interrupt/polling style operation. The data is framed with a leading start

bit, a stop bit and an optional parity bit. VC3 is given to the clock of the TX8 module, named

TX. The module internally divides the clock given to it by eight to generate a baud rate of 19200

bits per second. Transmitter firmware is used to initialize, start, stop, read status and write data to

the TX8. Figure A-8 gives the functional diagram of the TX module

Fig. A-8 Functional diagram of TX module

The TX8 User Module has Buffer, Shift, and Control registers. The Control register is initialized

and configured, using the TX8 User Module firmware Application Programming Interface (API)

routines. A data byte to transmit is written by an API routine into the Buffer register; clearing the

Buffer Empty status bit in the Control register. This status bit can be used to detect and prevent

transmit overrun errors. The rising edge of the next bit clock transfers the data to the Shift

register and sets the Buffer Empty bit of the Control register. If the interrupt enable mask is

enabled, an interrupt will be triggered. This feature is not used here. The start bit is transmitted at

the same time the data byte is transferred from the Buffer register to the Shift register.

Successive clock pulses shift serial bit to the output stream. The stream is composed of each bit

of the data byte, least significant bit first, an optional parity bit, and a final stop bit. Upon

completion of transmission of the stop bit, the Control register‟s TX Complete status bit is set.

When this bit is set it indicates the completion of data transfer, following which the user program

loads the next byte of data into the TX buffer for transmission.

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When the data byte is written to the Buffer register, the data byte will be transferred to the Shift

register and transmission of the data will begin on the next rising edge of the clock pulse. This

process is repeated for all data bytes that need to be sent. The output of TX is connected using

the user configurable internal system bus to the global output data line GOE0. This data line is

connected to the pin0 of Port0 (Port_0_0). This pin is configured in the „Strong‟ mode of

operation as it has to drive the serial communication data line. Thus, this pin is the output pin for

serial data that is sent to a laptop computer for analysis and storage.

A.4 PSoC DEVELOPMENT ENVIRONMENT: THE PSoC DEVELOPER

The PSoC Designer is an integrated design environment that is used to customize the PSoC

system to function according to the desired system design and specifications. The developer

contains pre configured analog and digital peripherals (called user modules) and their pre written

libraries of code. The desired modules can be placed onto the available system blocks (both

analog and digital).Block parameters can be configured by subsequently setting the properties of

the modules, once they have been placed. The PSoC Designer automatically generates

initialization codes for the blocks on the final compilation of the project. The main program

routine for the CPU of the system is written using the compiler provided in the designer in C.

The designer then complies this into assembly language code and generates the final code to be

burnt onto the PSoC‟s program memory, using a USB based serial programmer and the CY3210

evaluation board.

A.5 THE CY3210 EVALUATION BOARD

The Cypress Semiconductor's CY3210 evaluation board (Figure A-9) is used in this project to

provide the CY8C29466 with the appropriate peripherals (power supply, reset and clock) needed

for its functioning. The board also contains a programmer for device programming. Other

peripherals are also provided on the board for use in system development. These are:

i. General purpose breadboard

ii. Taps for Vcc (5 V) and ground (0 V)

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iii. General purpose switch

iv. General purpose LEDs

v. General purpose potentiometer to serve as a variable voltage source (0 to 5V)

vi. Liquid Crystal Display

vii. A UART chip interfaced to an RS-232 port (female) for serial communication with

another device.

Fig. A-9 CY3210 evaluation board

A.6 THE PSoC SYSTEM DESIGN OVERVIEW

The configuration of the PSoC system is different for subject training and for the final

deployment of the system. For both applications the module PGA is used with a unity gain to

serve as a buffer between the external analog circuitry and the PSoC‟s internal analog blocks.

For the purpose of subject training, the PSoC is used only to digitize the incoming data from the

signal acquisition system. The ADC analog module is used for this purpose. The digitized data

(256 sps) is then sent to a laptop computer, through module TX (at a rate of 19,200 bits per

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second, one start bit, one stop bit and no parity bit), where further data analysis is carried out on

a custom made user application.

In the final deployment, the PSoC is used to carry out the bulk of the data processing. Incoming

analog data is sampled in the ADC (128 sps) following which 64 consecutive data samples are

digitized and stored in an array. Capturing 64 samples at a rate of 128 sps gives us an epoch

length of 0.5 seconds. Once 64 data samples are obtained, the removal of the DC offset from the

data is done by calculating the average value of the data and then subtracting this value from

each data sample.

After this process, the data is ready for frequency domain analysis. The Cooley-Tukey Fast

Fourier Transform algorithm written in C is used to calculate a 64 point Discrete Fourier

Transform of the recorded data. The average power in the 8-12 Hz range is then sent to the

laptop computer through the module TX at 19200 bits per second; 8 data bits, one start, one stop

and no parity bit.

Sources:

1) Robert Ashby, “Designer‟s guide to the cypress PSoC”, Elsevier, 2010.

2) CY8C29466, PSoC1, Datasheet.

3) PSoC Application notes and module specific datasheets, www.cypress.com .

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APPENDIX B

FILTER DESIGN

An analog Butterworth filter is an electronic circuit, whose frequency response is governed by

the Butterworth Polynomial given in (B.1),

(B.1)

Where, G is the gain of the filter

ω is the angular frequency in radians per second

n is the number of active elements, poles in the filter

The above polynomial can also be written with real coefficient unlike the complex form shown

above. This representation is called a Normalized Butterworth Polynomial, and is given by (B.2)

and (B.3):

( ) ∑ ( (

) )

For n even (B.2)

( ) ( )∑ ( (

) )

For n odd (B.3)

Where, Bn is the filter transfer function

s is a pole of the filter.

For a fourth order Butterworth filter the above polynomial expands according to (B.4):

S = (s2 + 0.7654s + 1) (s2 + 1.8478s + 1) (B.4)

This equation is used in the calculation of filter parameters. The filter was implemented using an

active RC filter topology as shown in Figure B-1 and Figure B-2.

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Fig. B-1 Active RC 2nd

order low pass Butterworth filter

Fig. B-2 Active RC 2nd

order high pass Butterworth filter

The second order low pass and high pass filters shown in the above figures were cascaded in

series to give a second order band pass filter. Two band pass filters were then cascaded in series

to give a fourth order band pass filter.

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For the topologies in Figure B-1 and Figure B-2 the values of R3 and R4 are selected using the

Butterworth polynomial given in (B.4) and Equation (B.5).

(B.5)

Where, is the coefficient of s in the polynomial S,

is the gain of the filter, given by (B.6)

(B.6)

If R4 is10kΩ (assumed) and value of is substituted from the polynomial S, the value of R3 is

calculated as 5.7kΩ.

For calculating the values of R1, R2, C1 and C2, the relationship between the filter‟s cut-off

frequency and R-C values is used, (B.7); which in turn is derived from its frequency response.

(B.7)

Where is the cut-off frequency

For a low pass filter whose upper cut-off frequency fh is 25Hz, with the assumption that

C1=C2=1µf gives R1=R2=6.3kΩ

For a high pass filter whose lower cut-off frequency fl is 5Hz, with the assumption that

C1=C2=1µf gives R1=R2=31.8kΩ

Sources:

1) Ramakanth A Gayakwad, Op-Amps and linear integrated circuits, Prentice Hall.

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APPENDIX C

COST ESTIMATE

C.1 PROJECT COSTS

i. CY3210 PSoC Eval1: ` 5985

ii. Instrumentation amplifier AD624 (2x950): ` 1900

iii. Temporary electrodes and leads (100pcs): ` 6930

iv. Power supply unit: ` 200

v. Op-amp LF353 (2x40): ` 80

vi. Miscellaneous (breadboard, circuit board, wires etc.): ` 500

TOTAL: ` 15,595

**************

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CONTACT INFORMATION

Project Title: A Mu Rhythm Based Brain Computer Interface for Binary Control

Duration: 4 months Date of reporting: 18/01/2011

Institution: Manipal Institute of Technology

Address: Manipal Institute of Technology

Madhav Nagar, Manipal 576104

Karnataka, India

Website address: www.manipal.edu

External Guide

Name: Ms Shefali Jayanth Kandi

Designation: Assistant Professor

Address: Ms Shefali Jayanth Kandi

Dept. Of Electronics & Communications

MIT Manipal, 576104

Karnataka, India

Email: [email protected] Phone No (M): +91-9740836606

Internal Guide

Name: Ms Rajitha K V

Designation: Assistant Professor – Senior Scale

Address: Dept. of Biomedical Engineering

MIT Manipal, 576 104

Karnataka, India

Email: [email protected] Phone No (M): +91-9980959363

Students

Name: Prateek Saraswat

Register Number: 070902008 Roll No: 4

Email: [email protected] Phone No (M): +91-9986406618

Name: Rohan Joshi

Register Number: 070902070 Roll No: 15

Email: [email protected] Phone No (M): +91-9036672394

Name: Rudhram Gajendran

Register Number: 070902007 Roll No: 3

Email : [email protected] Phone No (M): +91-9901727436

Page 74: A Mu Rhythm Based Brain Computer Interface for Binary Control

CONTACT INFORMATION

Project Title: A Mu Rhythm Based Brain Computer Interface for Binary Control

Institution: Manipal Institute of Technology

Name: Prateek Saraswat Email: [email protected]

Name: Rohan Joshi Email: [email protected]

Name: Rudhram Gajendran Email : [email protected]

65