A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose...

38
1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor V. Zhirnov (SRC) 1st Berkeley Symposium on Energy Efficient Electronic Systems June 11 & 12, 2009, Berkeley, CA

Transcript of A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose...

Page 1: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

1

A Carnot Bound for General Purpose Information Processors?

Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor V. Zhirnov (SRC)

1st Berkeley Symposium on Energy Efficient Electronic Systems

June 11 & 12, 2009, Berkeley, CA

Page 2: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 2

Main Points• Energy/Power minimization is a universal macro-

constraint for on-chip architectures– Performance should not (& does not have to) be sacrificed

• Many new directions to leverage scaling– New materials, devices, topologies– Functional diversification

• Power sources, capacitors• Application-specific processors

• How is maximum computational performance related to device physics?– Architecture and software need consideration to enable scaling

=> Thermodynamics of Computation at System Level is a more systematic way to leverage scaling

– A new methodology based on statistical physics and quantum mechanics have been developed for addressing thermodynamics of switching-based systems

Page 3: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 3

Outline

• What ?– Basic goals

• Why do it ?– Context of power versus MIPs

• How ?– Methodology used in the analysis

• Where ?– Utility

Page 4: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 4 S. Shankar

12 June 2008

Fundamental limits for information engines?

Source: Wikipedia

The discipline of Thermodynamics resulted from the practical need to increase the EFFICIENCY of heat engines

Carnot’s formula - the fundamental limits on engine’s efficiency

Efficiency boundaries for computation?

2

11TT

−=η

Page 5: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 5

System Reliability Perspectives• Current approach: System reliability

through device reliability– All N devices in the logic system operate

correctly

• Requiring all ideal devices may not end with ‘ideal’ system– Locally optimized components may not result

in globally optimized system– Global system optimization:

Eb↑

Eb↓ ??

Page 6: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 6

Computing Engine Premise

• Similar to a heat engine, a computing engine can be visualized

A B CC A

B C

EM Energy Heat Energy

Digital Computation: EM Energy

Information

Heat EnergyHeat Energy

Mechanical Work

Heat Engine

Computing Engine

Page 7: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 7

Thermodynamics of Computation@System Level

• Thermodynamics is the study of energy transformation properties common to all systems

• Goal is to use thermodynamics, which incorporates relations between system’s components and determines the most energy efficient systems

A B CC A

B C

EM Energy Heat Energy

Digital Computation: EM Energy

Information

Page 8: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

8

Previous Work

Acknowledgement: V. Zhirnov, R. Cavin

Page 9: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 9

9

Computing Power: MIPS (μ) vs. BIT (β)

1.E-011.E+001.E+011.E+021.E+031.E+041.E+051.E+061.E+071.E+081.E+09

1.E+09 1.E+11 1.E+13 1.E+15 1.E+17 1.E+19 1.E+21 1.E+23 1.E+25

Max. binary throughput, bit/s

MIP

SSources: The Intel Microprocessor Quick Reference Guide and

TSCP Benchmark Scores

Inst

ruct

ions

per

sec

×10

6

BIT:

80808088

8028680386

80486Pentium

Pentium IIPentium III

Pentium 4

Page 10: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 10

10

Computing Power: MIPS (μ) vs. BIT (β)

1.E-011.E+001.E+011.E+021.E+031.E+041.E+051.E+061.E+071.E+081.E+09

1.E+09 1.E+11 1.E+13 1.E+15 1.E+17 1.E+19 1.E+21 1.E+23 1.E+25

Max. binary throughput, bit/s

MIP

SSources: The Intel Microprocessor Quick Reference Guide and

TSCP Benchmark Scores

Inst

ruct

ions

per

sec

×10

6

BIT:

80808088

8028680386

80486Pentium

Pentium IIPentium III

Pentium 4

X6800QX6700

QX9770

pkμ β=k=10-7 and p=0.6

Single-core

Multi-core

Page 11: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 11

MPU Watt- MIPS relations

11

80386

Pentium 4

Itanium

Page 12: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 12

12

Observations1) There appears to be a functional relationship between ultimatetechnology capability defined as the maximum number of binary transitions per unit time, β, and the millions of instructions executed per section, μ, executed by a processor:

pkμ β= k=10-7 and p=0.6How can we increase MIPS?

2) There also appears to be a functional relationship between electrical power consumption, and the millions of instructions executed per section, μ, executed by a processor:

pkP μ⋅= k=0.43 and p=0.66How can we decrease WATTS?

Page 13: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 13

Turing-Heisenberg Rapprochement?

pkμ β=Binary Information Throughput

a measure of computational capability on device level

Instructions per seconda measure of computational capability on the processor level

Alan TuringWerner Heisenberg Ludwig Boltzmann

Can computational theory suggest new devices? Stan Williams @ Nanomorphic Forum

sw

bit

tn

=Number of binary elements

Switching time

Page 14: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 14

Nanoscale Devices

‘1’ ‘0’ ‘1’ ‘0’

Eb

This structure cannot be used for representation/processing information

An energy barrier is needed to preserve a binary state

xmin

We think that all devices operating in an equilibrium with thermal environment are governed by these relations, no matter what state variables are chosen!

2lnmin kTh

“Boltzman constraint” on minimum switching energy

2lnmin TkE Bb =

“Heisenberg constraints”on device size and speed

2ln2min mkTx h

=

h≥ΔΔ px)exp(Tk

E

B

berror =Π

h≥ΔΔ tE

2ln3min TkE Bsw =

~10-21 J ~1.5 nm

~40 fs

Πerror=0.5

Page 15: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 15

CMOS scaling on track to obtain physical limits for electron devices

0.01

0.1

1

10

100

0.001 0.01 0.1 1LGATE (μm)

Gate Delay(ps)

0.000001

0.00001

0.0001

0.001

0.01

0.1

1

10

100

0.001 0.01 0.1 1LGATE (μm)

Switching Energy

(fJ)

Bolzmann-Heisenberg Limit 3kBTln2

George Bourianoff / Intel

104kBT

•Long way to go => challenges ahead; opportunities abound

•Question: Why are we at 10,000 kBT ?

Page 16: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 16

16

Binary switch abstraction: Generic floorplan and energetics

a

a

Eb

Eb

a a

Generic Floorplan of a binary switch

2min 3aArea = TkE Bsw 3

min=

⎟⎠⎞

⎜⎝⎛=

tileJTkBε

a a a

nmmkT

a 5.12ln2

==h

Πerror=0.5

Page 17: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 17

Two-well bit – Universal Device Model

a

a

Eb

Eb

w w

Generic Floorplanof a binary switch

White spaces are required to provide for isolation and interconnect

Array

Optimum tiling

2max 81a

n =

2)20(1a

nMPU =

Device density

1) Upper Bound

2) IC (ITRS)

Page 18: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 18

18

More electrons means more energy…

• We need a significant number of electrons for branched communication between binary switches

0.00E+00

1.00E+04

2.00E+04

3.00E+04

4.00E+04

5.00E+04

6.00E+04

0 5 10 15 20 25 30 35 40 45 50Channel Length

Num

ber

of E

lect

rons

0

200

400

600

800

1000

1200

1400

Ebit/

kbT

Ebit/kBTNumber of electrons

Page 19: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 19

19

In the limits: Energy per interconnect tile

0

0.5

1

1.5

2

0 50 100

k (# of tiles)

k BT/

tile

0

0.5

1

1.5

2

0 1 2 3 4 5

F

kBT

/tile

Long interconnect limit

Minimum interconnect limit

FO1

FO2

FO3

FO4

tileTkB18.1=ε

tileTkB33.1=ε

ε ~ kBT/tile

Π=0.5

Page 20: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 20

20

Floor space Expenses of Communication between Binary Switches

Assumption: For each of 3 tiles of Binary Switch we need at least:

One contacting interconnect tile (3 total) and one connecting interconnect tile (3 total)

Total 6 interconnect tiles per binary switch

aL 6~intA typical interconnect length distribution for MPU (J. Meindl) n, cm-2

1.E+02 4.11.E+04 6.41.E+06 8.31.E+08 9.71.E+10 10.5

gLnL )(

Reality check:

Page 21: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 21

21

Digital circuit abstraction: Generic floor plan, energetics and speed

Esw=3Eb+6Eb=9kBTln2

Switching energy of one binary switch in a circuit

Operational energy of a circuit of n binary switches:

3 switch tiles

6 wire tiles

2min 8anArea ⋅= Joyner tiling

2ln29 TnkE Bop =

Speed: τmin/tile2lnmin kT

h=τ ~40 fs

Switching delay of one binary switch in a circuit:

tsw=9τmin

(50% activity)

Page 22: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 22

22

1-bit ALU example – simple Turing Machine model

ALUInput Data Output Data

Instructions

X

Y

C0

Z

C1

The minimal ALU does 22=4 operations on two 1-bit X and Y:Operation 1: X AND YOperation 2: X OR YOperation 3: (X+Y)Operation 4: (X+(NOT Y))

Jan Rabaey, Digital Integrated Circuits

Page 23: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 23

23

Minimal ALU abstraction: Energetics

AND

OR

OR

ADDX+Y+C

4:1 MUX

NOT

Y

ADD

X+Y+C

Total: 98 devices

Energy efficiency:ALU

op

EE

TkTkE BBALU 300~2ln9829

⋅⋅=

TkTkE BBAND 10~2ln329

⋅⋅=

TkTkE BBADD 84~2ln2729

⋅⋅=

%3~AND

η

%28~ADD

η

3

3

27

272

33

3

All 4 units execute even though only one output is used

Page 24: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

24

Current Work: System Layout

Expression of Computing Systemin a Geometrical Representation

Page 25: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 25

Binary Switch - Basicsa

Eb

L L

Eb

Key Characteristics:1. Confinement (Energy)2. Barrier (Energy)3. Information carrier (Charge)

Geometrical Parameters:1. Confinement Width (W) &

Length (L)2. Barrier Length (a)3. Information carrier (Charge)

W

System Parameters:1. Barrier Energy (Eb)2. Temperature T3. Charge (e)

Page 26: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 26

Arr

ay

L La

W

Binary Switch – Floor Plan

White spaces are required to provide for isolation and interconnect

Ncell-LNi-L

Nce

ll-W

Ni-W

Page 27: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 27

Floor Planning Examples

2 Switches

1 Switch

12 Switches

7 Switches

4 Switches

Page 28: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 28

Floor Planning ExamplesDensity

2

1( )( )cell L i Lcell w i w NN N

naN− −− − ++

=

11111

Ni-W

12-S7-S4-S2-S1-S

Examples

365152431520323121158113

αNcell-WNi-LNcell-L2

1naα

=

2max 81a

n =

2

1(20 )MPUn

a=

Upper Bound

IC (ITRS)

Page 29: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 29

Logical Switches - Illustration

NOR - 3 switches

NAND - 3 switches

Inverter - 2 switches

SRAM - 6 switches

Page 30: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 30

Floor Planning Examples - Density

1111

Ni-W

6-T SRAMNANDNORInverter

Examples

48517161172431512115

αNcell-WNi-LNcell-L2

1naα

=

max 2

112

na

=

2

148MPUn

a=

Upper Bound: Inverter

Lower Bound: 6-T SRAM

• Reflects the principle of floor planning• Actual Layout may have other

considerations

Page 31: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

31

Current Work: System Thermodynamics

Mapping the Geometrical Representation to a

Thermodynamic System

Page 32: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 32

Thermodynamics of Computing Basic Premise

• Switches are operating at quantum limits, while the macro-system is thermodynamic

• Macro-system is in thermal equilibrium with surroundings (canonical ensemble)

• Micro-systems (multi-switch systems; NAND etc..) are sub-domains which can be thermodynamically represented by average energy

• Probability determined by operating “NITS” (NIT =2 is bit)

Micro-system

Mic

ro-s

yste

ms

Switch

Macro-system

Page 33: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 33

NIT Switching Energy

NIT

Energy

2 3 41

E1Es

E1 + EsEs

E1 + 2Es

Es

QuarternaryTernaryBinary

Nature of Switching

432

NIT

Page 34: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 34

Ensemble – Micro System

T

T

T T U

E1

E2

E3

E1

E2

E3

E1

E2

E3

EsEs

E1

E2

E3

E1

E2

E3

E1

E2

E3

EsEs

E1

E2

E3

E1

E2

E3

E1

E2

E3

E1

E2

E3

E1

E2

E3

E1

E2

E3

E1

E2

E3

EsEs

Page 35: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 35

Basic Equations

N

ii iBS k P LogP= − ∑

System Entropy

A E TS= −System Free energy

EquationProbability

/i BE k T

ieP

Z

=

D - Linear Dimension of the Systemgi - Statistical weight of each of the micro-systemEi – Energy is estimated from quantum mechanicsN – energy statesZ – Partition function

( )2 2 2 2

2

2( ) / 42i

x y z

electron

n n n hE

m a+ +

=

Energy of a quantum device

/i Bi

NE k TZ g e−= ∑

Page 36: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 36

Entropy of a Single Switch System

• Entropy is determined by statistical mechanics

Nit – Nit = 2 is bit, Nit = 4 is qit etc….kB - Boltzmann constantN – number of states in the system (1 for single state switching)Et – Total Energy is estimated from statistical mechanicsZ – Partition function

( 1) ln lnis B B

E NS E Nit k N Z k NitT T

= − − + +

Total energySwitching Energy

Quantum StatesSwitching state

Page 37: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 37

Simple Illustration• For a binary switch, the minimum energy is determined

by the need to maintain binary transition (bit) and energy of the particle in an isolated level

• For a classical switch, the following are the limits

1/216N

1/4N

1/4N

1/2N

1/2N

Pi

16kT log 22kT log 22kT log 2kT log 2kT log 2

EMin

D2/16a22NAND6-T SRAM

NORInverterBinary

Example Micro-Systems

D2/48a216

D2/24a22D2/12a21D2/8a21

NBits

• EMin is idealistic and is determined by the bits processed in the micro-systems

Page 38: A Carnot Bound for General Purpose Information Processors? · 1 A Carnot Bound for General Purpose Information Processors? Sadasivan Shankar (Intel), Ralph K. Cavin III (SRC), Victor

S. Shankar11 June 2009 38

Summary• We have developed a general methodology for applying

thermodynamic principles for information engines like the Carnot principle to heat engines– More fundamental than simplistic capacitance based formalism currently

being used• Two applications

– Similar to heat engines, will identify the ideal Compute Engine –Carnot’s Compute Engine for ideal computing. This would serve as a limiting case for realistic architectures

– Evaluate theoretical efficiencies for different architectures based on physics

• Lessons from Biological Computation– the brain appears to operate at a device switching energy of a few

hundred kT• Continue work on estimating minimum energy needed of various

simple systems– Include realistic heat terms (dissipation)

• Estimate available energy