NETAJI SUBHAS INSTITUTE OF TECHNOLOGY

SUBJECT CODE: EC- 316, Microprocessors Lab

PROJECT TITLE-DIGITAL DICE

PROJECT REPORT

SUBMITTED BY-: Sandeep Kumar 142/EC/12

Sachin Kumar 138/EC/12

ACKNOWLEDGEMENT

We are highly thankful to Mr. D.V. GADRE sir for the invaluable support and guidance in respect to the accomplishment of our project work. We would also like to thank all friends who helped us in the building of our project and getting it work. They encouraged and motivated us right from the beginning of our project. Their persistent encouragement helped us in moulding our project well.

CONTENTSS.No. TOPIC

1 INTRODUCTION2 SYNOPSIS3 PROCESS CHART4 WORKING5 LIST OF COMPONENTS6 PROJECT CODE 7 SCHEMATIC DIAGRAM8 BOARD FILE9 FINAL PROJECT BOARD

INTRODUCTIONThe 8085 microprocessor has B, C, H, L, D, E, A, FLAG register pairs which are available to the programmer for programming the 8085. 8085 needs an external latch for demultiplexing the D0-D7 lines of the 8085.An external RAM and ROM are also needed to be connected to it. It also a 16-bit program counter and a 16-bit stack pointer to memory. Using input and output mapped ports 256 different ports can be connected to 8085. The input and output ports can also be memory mapped and by which the number of ports can be increased.

PIN DIAGRAM OF 8085

Intel 8085A used here is a 8 bit parallel Central processing unit. It consists of 1 non-vectored maskable interrupt, 3vectored maskable interrupts and 1 non-mask able interrupt (TRAP).

It uses multiplexed data bus. The address is split between 8 bit address bus and 8 bit data bus. So we’ve used an address demultiplexing latch 74HCT573. The ALE signal of 8085 latches the Low order 8bits.

Memory

As 8085 consists of 16 address lines so it can interface memory of 216bits ie 64KB so we’ve used 32KB of EPROM & 32KB of RAM.

Control UnitGenerates signals within uP to carry out the instruction, which has been decoded. In reality causes certain connections between blocks of the uP to be opened or closed, so that data goes where it is required, and so that ALU operations occur.

Arithmetic Logic Unit The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’, ‘AND’, ‘OR’, etc. Uses data from memory and from Accumulator to perform arithmetic. Always stores result of operation in Accumulator. Registers

The 8085/8080A-programming model includes six registers, one accumulator, and one flag register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the program counter. They are described briefly as follows. The 8085/8080A has six general-purpose registers to store 8-bit data; these are identified as B,C,D,E,H, and L as shown in the figure. They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit operations. The programmer can use these registers to store or copy data into the registers by using data copy instructions.

Accumulator The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A.

Flags

The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are listed in the Table and their bit positions in the flag register are shown in the Figure below. The most commonly used flags are Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions. For example, after an addition of two numbers, if the sum in the accumulator id larger than eight bits, the flip-flop uses to indicate a carry-- called the Carry flag (CY) -- is set to one. When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one. The first Figure shows an 8-bit register, called the flag register, adjacent to the accumulator. However,it is not used as a register; five bit positions out of eight are used to store the outputs of the five flip-flops. The flags are stored in the 8-bit register so that the programmer can examine these flags (data conditions) by accessing the register through an instruction. These flags have critical importance in the decision-making process of the micro- processor. The conditions (set or reset) of the flags are tested through the software instructions. For example, the instruction JC (Jump on Carry) is implemented to change the sequence of a program when CYflag is set. The thorough understanding of flag is essential in writing assembly languageprograms.

Program Counter (PC)

This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location

Stack Pointer(SP)

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memorylocation in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack pointer. The stack concept is explained in the chapter "Stack andSubroutines."

Instruction Register/Decoder

Temporary store for the current instruction of a program. Latest instruction sent here from memory prior to execution. Decoder then takes instruction and ‘decodes’ or interprets the instruction. Decoded instruction then passed to next stage.

Memory Address Register

Holds address, received from PC, of next program instruction. Feeds the address bus withaddresses of location of the program under execution.

Control Generator

Generates signals within uP to carry out the instruction which has been decoded. In reality causes certain connections between blocks of the uP to be opened or closed, so that data goes where it is required, and so that ALU operations occur.

Register Selector

This block controls the use of the register stack in the example. Just a logic circuit which switches between different registers in the set will receive instructions from Control Unit.

SYNOPSIS

BASIC PRINCIPLE

The project is based on the principle of random number generation. This is implemented using the fact that a switch when pressed bounces for some time when it switches its state from ’ON’ to ‘OFF’ or from ‘OFF’ to ‘ON’ and it stays ‘ON’ for some time but the ‘ON’ time(the time for which it stays in a stable state) varies everytime a switch is pressed.

PROJECT DESCRIPTION

In the project the idea of using a dice was implemented as a game of three rounds. It is a two player game. When a player presses the switch a random no. is generated and showed out on seven segment. Then, the second player plays his turn and again a random no. is generated.

KEYWORDS : Random number, seven Led(display), button, 8085, microprocessor, dice, game.

BLOCK DIAGRAM :

Random number on

seven segment 1

8085 micro-

processor

Push button

Score on seven segment displays of each player

RAM

ROM

PROCESS CHART

Start

PLAYER 1 presses the push button and a random number is generated and shown

on dice

PLAYER 2 presses the push button and a random number is generated and shown

on dice

The random generated is stored in the memory.

The random generated is stored in the memory .

Both the random number are compared and score of each player is incremented accordingly

The player with greater cumulative score will be winner

and is shown on the seven segment

WORKING IT IS BASED ON THE PRINCIPLE OF RANDOM NUMBER GENERATION.

1. FIRST OF ALL, POWER SUPPLY IS GIVEN TO THE CIRCUIT TO POWER UP ALL THE IC’S.

2. FIRST PLAYER PRESSES THE BUTTON CONNECTED TO THE SID PIN OF MICROPROCESSOR.

3.E EPROM BEING BURNED WITH A PROGRAM RESPOND TO THE ACTION AND GENERATES A RANDOM NUMBER DISPLAYED ON THE SEVEN SEGMENT.

4. SECOND PLAYER PRESSES THE BUTTON AGAIN TO GENERATE ANOTHER RANDOM NUMBER.

5. THIS PROCESS IS REPEATED FOR SEVERAL ROUNDS.

6. AFTER EACH ROUND SCORE IS DISPLAYED ON SEVEN SEGMENT DISPLAYS OF THE TWO PLAYERS. A SCORE OF TWO IS ADDED TO THE THE TALLY OF WINNER OF EACH ROUND. IN CASE OF A TIE EACH PLAYR GETS ONE SCORE ADDED TO HIS ACCOUNT.

7. AFTER THREE ROUNDS, THE PLAYER WITH THE HIGHER CUMULATIVE SCORE IS THE WINNER.

8. TO START THE PROCESS ALL OVER AGAIN PRESS THE RESET BUTTON .

BILL OF MATERIALS

S. NO. COMPONENTS USED QUANTITY

1. 8085 1

2. EEPROM(28C256) 1

3. RAM(62256) 1

4. LATCH(74573N) 3

5. DEMULTIPLEXER (74139N) 2

6. NAND GATES IC(7400) 2

7. SEVEN SEGMENT DISPLAY(COMMON ANODE) 3

8. LEDS(5MM) 2

9. RESISTORS 36 = 10(10k) + 26(330 ohm)

10. ELECTROLYTIC CAPACITORS 2

11. CERAMIC CAPACITORS 14 = 13(0.1uf) + 1(22uf)12. CRYSTAL HC49US[CRYSTAL OSCILLATOR] 1

13. 10-XX[OMRON SWITCH] 2

14. DEBUGGING PINS[MALE CONNECTORS] 40

15. PAIR OF CONNECTOR PINS[INPUT] 1

16. USB 1

PROJECT CODE

.ORG 0000H

LXI SP, 0FFFFH

JMP START

START: MVI C,00H

LXI H,9100H

MVI M,00H

LXI H,9200H

MVI M,00H

MVI D,00H

LXI H,9101H

MVI M,00H

LXI H,9201H

MVI M,00H

MVI E,00H

MVI B,00H

LXI H,9300H

MVI M,03H

MVI A,0FFH

OUT 00H

OUT 01H

OUT 02H

READ: RIM

ANI 80H

JZ READ

CALL DELAY_2MS

MVI C,00H

DOWHILESWITCH:

INR C

MVI A,06H

CMP C

JNC NOADJUST

MVI C,01H

NOADJUST: RIM

ANI 80H

JNZ DOWHILESWITCH

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;C CONTAINS RA

INR D

LXI H,TABLE

MOV A,L

ADD C

JNC NOCARRY0

INR H

NOCARRY0:MOV L,A

MOV A,M

OUT 00H

MOV A,D

RAR

JC UPDATE_PLAYER1

UPDATE_PLAYER2: LXI H,9200H

MOV M,C

JMP NDPRESS2

UPDATE_PLAYER1: LXI H,9100H

MOV M,C ;TO KEEP COPY OF THE DICE SCORE

JMP READ

NDPRESS2: LXI H,9100H

MOV A,M

LXI H,9200H

MOV L,M

CMP L

JZ DRAW

JC PLAYER1SSD

JNC PLAYER2SSD

DRAW:

MOV A,E

ADI 01H

MOV E,A

MOV A,B

ADI 01H

MOV B,A

JMP DISPLAY

PLAYER2SSD:

MOV A,B

ADI 02H

MOV B,A

JMP DISPLAY

PLAYER1SSD:

MOV A,E

ADI 02H

MOV E,A

DISPLAY:

LXI H,TABLE

MOV A,L

ADD B

JNC NOCARRY1

INR H

NOCARRY1:MOV L,A

MOV A,M

OUT 01H

LXI H,TABLE

MOV A,L

ADD E

JNC NOCARRY2

INR H

NOCARRY2:MOV L,A

MOV A,M

OUT 02H

LXI H,9300H

DCR M

JNZ READ

MOV A,E

CMP B

JC PLAYER2WON

PLAYER1WON: CALL DELAY_1S

MVI A,49H

OUT 00H

SIM

HLT

PLAYER2WON: CALL DELAY_1S

MVI A,0F3H

OUT 00H

SIM

HLT

DELAY_2MS: PUSH PSW

MVI A,0FFH

THERE2: DCR A

JNZ THERE2

POP PSW

RET

DELAY_1S: LXI B, 0FFFFH

LOOP: DCX B

MOV A,C

ORA B

JNZ LOOP

RET

TABLE: .DB 81H

.DB 0F3H

.DB 49H

.DB 61H

.DB 33H

.DB 25H

.DB 05H

.DB 0F1H

.DB 01H

.DB 21H

SCHEMATIC

BOARD FILE

FINAL BOARD