8085 Memory Interfacing

• Generally µP 8085 can address 64 kB of memory .• Generally EPROMS are used as program memory and

RAM as data memory.• We can interface Multiple RAMs and EPROMS to

single µP .• Memory interfacing includes 3 steps :1. Select the chip.2. Identify register.3. Enable appropriate buffer.

• Example: Interface 2Kbytes of Memory to 8085 with starting address 8000H.

Initially we realize that 2K memory requires 11 address lines

(2^11=2048). So we use A0-A10 .

• Write down A15 –A0

•

AA1515 1414 1313 1212 1111 1010 99 88 77 66 55 44 33 22 11 00 ADDADD

11

11

00

00

00

00

00

00

00

00

00

11

00

11

00

11

00

11

00

11

00

11

00

11

00

11

00

11

00

11

00

11

8000H8000H

87FFH87FFH

• Address lines A0-A10 are used to interface memory while A11,A12,A13,A14,A15 are given to 3:8 Decoder to

A15-A8

LatchAD7-AD0

D7- D0

A7- A0

8085

ALE

IO/MRDWR

2K ByteMemory

Chip

WRRD

CS

A10- A0

A15- A113:8DECODER

provide an output signal used to select the memory chip CS¯or Chip select input.

• MEMR¯ and MEMW¯are given to RD¯and WR¯pins of Memory chip.

• Data lines D0-D7 are given to D0-D7 pins of the memory chip.

• In this way memory interfacing can be achieved.

The diagram of 2k interfacing is shown below

8255 PIN DIAGRAM

PA0-PA7 Port A Pins CS ¯ Chip select

PB0-PB7 Port B Pins Vcc , Gnd +5volt supply

PC0-PC7 Port C Pins WR ¯ Write input

D0-D7 Data Pins A0-A1 Address pins

RESET Reset pin RD¯ Read input

8255 BLOCK DIAGRAM

A0,A1 decide the port to be used in 8255A1 A0 Selected port0 0 Port A0 1 Port B1 0 Port C1 1 Control Register

Group A and Group B Control:

Group A control consists of Port A and Port C upper. Group B control consists of Port A and Port C lower. Each group is controlled through software. They receive commands from the RD¯, WR¯ pins to allow

access to bit pattern of 8085. The bit pattern consists of :1. Information about which group is operated.2. Information about mode of Operation. PORT A,B:These are bi-directional 8 bit ports each and are

used to interface 8255 with CPU or peripherals. Port A is controlled by Group A while Port B is controlled

by Group B Control. PORT C: This is a bi-directional 8 bit port controlled

partially by Group A control and partially by Group B control .

It is divided into two parts Port C upper and Port C lower each of a nibble.

It is used mainly for control signals and interfacing with peripherals.

8255 MODES Mode 0 : Simple I/O

1. Any of A, B, CL and CH can be programmed as input or output

Mode 1: I/O with Handshake1. A and B can be used for I/O2. C provides the handshake signals

Mode 2: Bi-directional with handshake

1. A is bi-directional with C providing handshake signals2. B is simple I/O (mode-0) or handshake I/O (mode-1)

BSR (Bit Set Reset) Mode1. Only C is available for bit mode access.

Allows single bit manipulation for control applications

INTERFACING STEPPER MOTOR with 8255

82558085

3:8 decoder

74373

(AD0-AD7)

D7-D0

A0-A7

/CS

A0A1

O0O1

O7

A13A12A11

ALE

RD ¯WR ¯

RD¯WR¯

G2A G2B G1

A15

A14

IO/M

A

B

C PA

PB

PC

 Stepper Motor(5V)

8255Lines

STEPPER MOTOR

COIL-A PA.0

COIL-B PA.1

COIL-C PA.2

COIL-D PA.3

Program

                 MVI A,80                 OUT 23 START:    LXI H,Look Up                  MVI B,04REPET :    MOV A,M                 OUT 20                 LXI H,0202DELAY:    NOP                 DCX D                 MOV A,E                 ORA  D                 JNZ  DELAY                 INX H                 DCR B                 JNZ  REPET                 JNZ  STARTLOOK UP TABLE            DATA9200       DB 03H,06H,0CH,09H (CLOCK WISE)9204       END

Traffic Light Control Statement: Design a microprocessor system to control traffic lights. The traffic light arrangement is as shown in Fig. The traffic should be controlled in the following manner. 1) Allow traffic from W to E and E to W transition for 20 seconds. 2) Give transition period of 5 seconds (Yellow bulbs ON) 3) Allow traffic from N to 5 and 5 to N for 20 seconds 4) Give transition period of 5 seconds (Yellow bulbs ON) 5) Repeat the process.

Fig. shows the interfacing diagram to control 12 electric bulbs.

Port A is used to control lights on N-S road and Port B is used to control lights on W-E road. Actual pin connections are listed in Table 1 below.

The electric bulbs are controlled by relays. The 8255 pins are used to control relay on-off action with the help of relay driver circuits. The driver circuit includes 12 transistors to drive 12 relays. Fig. also shows the interfacing of 8255 to the system.

ProgramMVI A, 80H : Initialize 8255, port A and port B OUT 83H (CR) : in output mode START: MVI A, 09H OUT 80H (PA) : Send data on PA to glow R1 and R2 MVI A, 24H OUT 81H (PB) : Send data on PB to glow G3 and G4 MVI C, 28H : Load multiplier count (40ıο) for delay CALL DELAY : Call delay subroutine MVI A, 12H OUT (81H) PA : Send data on Port A to glow Y1 and Y2 OUT (81H) PB : Send data on port B to glow Y3 and Y4 MVI C, 0AH : Load multiplier count (10ıο) for delay CALL: DELAY : Call delay subroutine MVI A, 24H OUT (80H) PA : Send data on port A to glow G1 and G2 MVI A, 09H

OUT (81H) PB : Send data on port B to glow R3 and R4 MVI C, 28H : Load multiplier count (40ıο) for delay CALL DELAY : Call delay subroutine MVI A, 12H OUT PA : Send data on port A to glow Y1 and Y2 OUT PB : Send data on port B to glow Y3 and Y4 MVI C, 0AH : Load multiplier count (10ıο) for delay CALL DELAY : Call delay subroutine JMP START Delay Subroutine: DELAY: LXI D, Count : Load count to give 0.5 sec delay BACK: DCX D : Decrement counter MOV A, D ORA E : Check whether count is 0 JNZ BACK : If not zero, repeat DCR C : Check if multiplier zero, otherwise repeat JNZ DELAY RET : Return to main program

Temperature Control

PROGRAM:MVIA,91HOUT CR

BEGIN:CALL CONVERSATIONCPI 41HJC NEXTMVI A,0EHOUT PCJMP BEGIN

NEXT: MVIA,0FH OUT PCJMP BEGIN

CONVERSIONSUBROUTINE:CONVERSION:

MVI A,00HOUT PB;Send address to select IN0MVI A,08H;Latch address by giving ALE HighOUT PB

BACK:MVI A,18HOUT PB; Make SOC HighMVIA,08HOUT PB; Make SOC LowMVI A,00HOUT PB;Make ALE Low

LOOP:IN PC ANI 01H JZ LOOP; Wait for EOC IN PA RET;Return value and store Accumulator