8-Bit Kogge Stone Adder Ppt

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Transcript of 8-Bit Kogge Stone Adder Ppt

  • 8bitKoggeStoneAdder

    EE619 Course ProjectEE619CourseProject

    Ashish Bhatia(Y5827121)Anurag Sindhu(Y5106)g ( )

  • Kogge Stone Adder(KSA)KoggeStoneAdder(KSA)

    Most popular carry look ahead adderMostpopularcarrylookaheadadder Fastestadderdesign

    C i f i d FastComputationatcostofincreasedarea

  • TheoryTheory

    Pre processingPreprocessing Generate(pi,gi)from(Ai,Bi)

    p = A xor B pi =Ai xor Bi gi =Ai and Bi

  • TheoryTheory

    Carry look ahead networkCarrylookaheadnetwork Generate(Pij,Gij)from(Gi,Pi)and(Gj,Pj)

    P = P and P Pi:j =Pi:k+1 andPk:j Gi:j =Gi:k+1 or(Pi:k+1andGk:j )

  • TheoryTheory

    Post processingPostprocessing Sumi =pi xor Carryi1C = G or (C and P ) Ci =Gi:0or(Cin and Pi:0)

  • Ill iIllustration

  • B3=1A3=1 B2=1A2=0 B1=0A1=1 B0=0A0=1 Cin=0

    g3=1p3=0 g2=0p2=1 g1=0p1=1 g0=0p0=1g3 p3 g2 p2 g1 p1 g0 p0

    Pre processingPreprocessing pi =Ai xor Bi

    d gi =Ai and Bi

  • B3=1A3=1 B2=1A2=0 B1=0A1=1 B0=0A0=1 Cin=0

    g3=1p3=0 g2=0p2=1 g1=0p1=1 g0=0p0=1g3 p3 g2 p2 g1 p1 g0 p0

    G3:2=1P3:2=0

    G2:1=0P2:1=1

    G1:0=0P1:0=1

    G0=C0=0

    Carry look ahead networkCarrylookaheadnetwork Pi:j =Pi:k+1 andPk:j G = G or (P andG ) Gi:j =Gi:k+1 or(Pi:k+1andGk:j ) Ci =Gi:0or(Cin and Pi:0)

  • B3=1A3=1 B2=1A2=0 B1=0A1=1 B0=0A0=1 Cin=0

    g3=1p3=0 g2=0p2=1 g1=0p1=1 g0=0p0=1g3 p3 g2 p2 g1 p1 g0 p0

    G3:2=1P3:2=0

    G2:1=0P2:1=1

    G1:0=0P1:0=1

    G0=C0=0

    G3:0=1P3:0 =0

    G1 =C1=0G2 =C2=0

    3:0

    Carry look ahead networkCarrylookaheadnetwork Pi:j =Pi:k+1 andPk:j G = G or (P andG ) Gi:j =Gi:k+1 or(Pi:k+1andGk:j ) Ci =Gi:0or(Cin and Pi:0)

  • B3=1A3=1 B2=1A2=0 B1=0A1=1 B0=0A0=1 Cin=0

    g3=1p3=0 g2=0p2=1 g1=0p1=1 g0=0p0=1g3 p3 g2 p2 g1 p1 g0 p0

    G3:2=1P3:2=0

    G2:1=0P2:1=1

    G1:0=0P1:0=1

    G0=C0=0

    G3:0=1P3:0 =0

    G1 =C1=0G2 =C2=0

    3:0

    G3 =C3=1 Carry look ahead networkCarrylookaheadnetwork Pi:j =Pi:k+1 andPk:j G = G or (P andG ) Gi:j =Gi:k+1 or(Pi:k+1andGk:j ) Ci =Gi:0or(Cin and Pi:0)

  • Cin=0

    p3=0 p2=1 p1=1 p0=1

    Postprocessing

    p3 p2 p1 p0

    G0=C0=0 Si =pi xorCi1

    G1 =C1=0G2 =C2=0

    G3 =C3=1

    S0=1S1=1S2=1S3=0Cout =1 0123out

  • B3=1A3=1 B2=1A2=0 B1=0A1=1 B0=0A0=1 Cin=0

    g3=1p3=0 g2=0p2=1 g1=0p1=1 g0=0p0=1g3 p3 g2 p2 g1 p1 g0 p0

    A=1011

    G3:2=1P3:2=0

    G2:1=0P2:1=1

    G1:0=0P1:0=1

    G0=C0=0B=1100Cin =0

    S = 0111

    G3:0=1P3:0 =0

    G1 =C1=0G2 =C2=0

    S 0111Ccout =1

    3:0

    G3 =C3=1

    S0=1S1=1S2=1S3=0Cout =1 0123out

  • SpecificationsSpecifications

    Max frequency = 374.94 MHzMaxfrequency 374.94MHz Area=440mX300m=0.132mm^2 Power = 460 uWPower=460uW

  • Worst Case DelayWorstCaseDelay

  • Power ConsumptionPowerConsumption

    Avg Power=(1.224*10^12)*fmax =0 46 mW0.46mW

  • Implementation DetailsImplementationDetails

    Designedschematicof8bitKSA(Fulladder)es g ed sc e at c o 8 b t S ( u adde ) Technology=AMS0.35m(4metallayer) 518MOSFETs(=259CMOS) CadenceVirtuosoSchematicEditor Spectre (simulator)

    Designedcompletelayout CadenceVirtuosoLayoutEditor

    f l d if d i SuccessfulDRCandLVStoverifydesign Synthesis XilinxSpartan3FPGA

  • SchematicSchematic

  • LayoutLayout

  • DRC ReportDRCReport

  • LVS ReportLVSReport

  • Synthesis ReportSynthesisReport

  • AdvantagesAdvantages

    High SpeedHighSpeed LowandregularFanout

    l i G Regularstructure easymappingtoFPGAfabric

  • Main ChallengesMainChallenges

    Layout DesignLayoutDesign DRCconstraints

    S i LVSconstraints

  • ConclusionConclusion

    We designed and implemented 8 bit KoggeWedesignedandimplemented8bitKoggeStoneTreeAdderthatoperatesat375MHz(f ) and complete layout takes an areaMHz(fmax)andcompletelayouttakesanareaof440X300um^2

    24

  • ReferencesReferences

    Swaroop Ghosh Patrick Ndai Kaushik Roy "ASwaroopGhosh,PatrickNdai,KaushikRoy. ANovelLowOverheadFaultTolerantKoggeStone Adder Using Adaptive Clocking" DATEStoneAdderUsingAdaptiveClocking .DATE2008.

    J Rabaey "Digital Integrated Circuits: A Design J.Rabaey, DigitalIntegratedCircuits:ADesignPerspective",PrenticeHall,1996.