I/O Interfacing

8051 I/O Interfacing Need for more ports PPI 8255 8255 8051 Interfacing Key board Interfacing LED Interfacing 7 Segment LED InterfacingI/O Interfacing

I/O Devices connected through ports8051 has 4 I/O ports P0 to P3.In case 8051 needs external program and/or data memoryP0 and P2 are used for address bus & P0 is used for data bus.Only 2 ports (P1,P3) remain i.e. only 2 I/O devices can be connected. In case system application needs interrupt, serial I/O, i.e. alternate functions of P3Only 1 port (P1) remain i.e only 1 I/O device can be interfaced.

In case of 8031(Rom less version )Program memory is external i.e. (P0 and P2) are not available for I/O interfacing.If P3 in used for alternate functions then Only one port (P1) in available. We need more ports.Intel has designed programmable peripheral Interface (PPI) Intel 8255 for this purpose.Intel 8255 PPI has 24 I/O lines distributed to four ports.Port A (8 Lines)Port B (8 Lines)Port C (Upper) (4 Lines)Port C- (Lower) (4 Lines)

Each port can be programmed to be input or output.Individual port lines cant be read or written to - different from 8051 ports. Ports have been put in two groups.Group A -Port A and Port C (Upper) (PA7 PA0) (PC7 PC4)Group B - Port B and Port C (Lower) (PB7 PB0) (PC3 PC0)

The 8255A block diagram.D7- D0 Used for data transfer between p and 8255(Bidirectional)RD (Input)- Read control Signal WR (Input)-Write control Signal RESET (Input)- Resets the ports. Ports are configured an input ports on Reset.CS -Used to select the 8255 chip. Chip is selected based on the address decoding. A1, A0-Are used to select the specified ports in 8255. -A1. A0 are lower 2 bits of as address lines.

Issued by pA1A000-Port A01-Port B10-Port C11-Control RegisterNote There is no separate selection for Port C (Upper) or Port C (Lower) Port C is selected as a whole i.e. both upper and Lower ports are selected when A1, A0 = 10. Control Register is used to program the Ports as input or outputProgram the I/O mode.The I/O ports can be programmed to work in any of the 3 modesMode 0-Basic Input OutputMode 1-Strobed Input-OutputMode 2-Strobed Bidirectional Bus Mode 0 Basic Input-Output majority of application fall under this mode. - Any port A , B, C(U) or C(L) can be input or output

Mode 1- Strobed input-output - Provides means for transferring I/O data to or from a specified port in conjunction with strobes or hand shaking signals.- Port C lines are used for hand shaking signals.- Port A and Port B can be used as input or output. - Port A uses port C (Upper) lines for hand shaking Group A- Port B uses port C (Lower) lines for hand shaking Group B

Mode 2- Strobed Bidirectional Bus Port A can be used for input as well or output for transmitting as well as receiving the data in conjunction with hand shaking signals on Port C.Hand shaking signals are provided to maintain proper bus flow direction 5 bits (PC7-PC3) of port C are used for hand shaking. Mode 2 is available for only Group A.Parallely Group B i.e port B can be used in mode 0 or 1.Configuring 8255- We have already mentioned that 8255 ports can be configured using control register (A1 A0 = 11).- The control word format for configuration of 8255 is shown

Example- We need to configure 8255 with Port A as input, Port B as output, Port C (L) as output, port C (upper) as input using mode=00Note Mode set flag i.e. D7=1 for all configuration. If this bit is one then only mode setting with be done by 8255.Thus D7=1 , D5, D6=00-Mode 0, D4=1 (Port A=Input), D3=1[Port C(Upper)=Input], D2=0, (Mode=0) D1=0 (port B=output), D0=0 [ Port C(lower)=output]So the Configuration byte = D7D6D5D4D3D2D1D0

=98 HBy transferring 98H to control Register of 8255 will configure 8255 in the above manner.How -? We shall see after interfacing of 8255 with 8051.Note The concept of 8255 configuration using control register has been used in 8051 in case of Timer, Serial I/O and interrupts.

100110008255 8051 Interfacing Let us review I/O mapped I/O and memory mapped I/O [Ref. Page 38-39 of Krishna Kant book.]In I/O mapped I/O- The p has separate instructions for memory and I/O read-write.In addition p will have separate control signals for I/O read-write and memory read-write. A variation of this may be that p has same read-write control signal for I/O and memory but may have another signal to identify whether the read-write is for memory or for I/O. I/O and memory are treated separately Example 8086 has IN and OUT as I/O read and write instructions. It has same RD (for read),WR (for write), signal for I/O and memory read- write. It has M/IO to identify memory or I/O read-write.

In memory mapped I/O I/O ports are treated as memory locations. p having memory mapped I/O.Will not have separate instructions for I/O and memory read-write.Will have only single read and write control signals for read and write.Will not have any signal to identify memory or I/O read-write. Example - 8051 has no separate instructions for memory and I/O read - write 8051 has only single read and write control signal

15PSEN external program memory read RD External data memory readWR - External data memory writeIt has no signal to indentify whether read - write in for I/O or memory.Thus I/O ports are treated as memory locations.Thus if we have to interface memory to 8051 , 8255 must be interfaced in external memoryExternal program memory cant be written to .Thus 8255 must be interfaced in the external data memory.We need to select the address XXXXH of memory The address on address lines to be decoded such that when XXXXH is there, CS for 8255 is generated i.e 8255 needs to be selected.

RD (8051) connect to RD (8255)WR (8051) connect to WR (8255)MOVX instructions to be used for data transfer from / to 82558255 has four portsWhen address lines A1 A0 =00-Port A is selected=01-Port B is selected=10-Port C is selected=11-Control register is selectedThus last two bits starting address of 8255 address must be 00

Assume that 8255 is interfaced at address FE10HPort A address =FE10HPort B address =FE11HPort C address =FE12H Control register address = FE13HMOV DPTR, # FEI3HMOV A, # 98HMOVX, @DPTR, A(will configure 8255)MOV DPTR, # FE10HMOVX A, @ DPTR(will bring the content of Port A to ACC.)

Address is sent to 8255 throughP0(Lower Address Byte) and P2(Higher Address Byte) Data is sent to/from 8255 through P0.P0 acts both as Lower address lines as well as data lines in time multiplexed manner.When Address is present, content of P0 must be latched , so that it can be used for data.Microprocessor sends a pulse on ALE when address is present.

High to Low transition of ALE may be used to latch the address on a latch.The latch can be connected to memory to give lower address byte.P2 is directly connected to higher address lines of memory.Two latch chips (octal latch) are popular- 74LS373- 8282 (by Intel)Both have 8 input lines & 8 output lines74LS3738282Input1D to 8DDI0 to DI7Output1Q to 8QDO0 to DO7Trackingwhen Enable=1when STB=1Latchingwhen Enable=0when STB=0Presentingwhen Enable OC=0when OE=0on output

IF 74LS373 is used to latch the lower address byteP0 connected to input (1D to 8D) output (1Q to 8Q) connected to memory chip- Enable is connected to ALE.- Thus when ALE is high, input is tracked. Input is latched on high to low transition of ALE.- OC is connected to ground. Thus latched data is available at output immediately.

7 4 L S 3 7 3 OC 1 20 VCC 1Q 2 19 8Q 1D 3 18 8D 2D 4 17 7D 2Q 5 16 7Q 3Q 6 15 6Q 3D 7 14 6D 4D 8 13 5D 4Q 9 12 5Q GND 10 11 ENABLEInput - 1D to 8DOutput - 1Q to 8QWhen Enable = 1 Input is Tracked. = 0 Input is Latched.When Output Control (OC) = 0 latched output is present on output Similarly for 8282STB is connected to ALEOE is grounded.

VCC (+ 5V) 120 219 318 417 5 828216 6 or15 7 8283 14 813 912 1011DI0DI1DI2DI3DI4DI5DI6DI7OEGNDDO0DO1DO2DO3DO4DO5DO6DO7STBThe 8282/8283 pin diagramInput DI0 to DI7Output DO0 to DO7When STB = 1, Input is tracked = 0, Input is latchedWhen Output Enable (OE) = 0, latched input is present on output. P2

8051

ALE

P074LS373Or8282Address DecoderCS

8255RDWRA0A1A0 A7A2 A7A8 A15AD0 AD7D0 D7To generate CS for 8255 from given address.Assume address = FE1015 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

F E 1 0A1 , A0 are directly connected to 8255 and used for selection of I/O ports A,B,C and Control Regester. For selection of 8255 through CS, the address bits A2 to A15 may be decoded using simple gates.

1111111000010000A15A14A13A10A11A12A8A9A6A7A5A2CS of 8255A4A3Many Variations of circuits are possible If we select 8255 address as 0030H then decoding may be- A5 A4 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 A7A6A5A4A3A2CSBut it will generate Cs for 8255 for all address where A7 to A2 = 00 11 00i.e. 0030H, 0130H .FF30HAll these address will be valid for 8255 selection and are called address aliases (aliases is used in general for other names identifying a person)Problem - 1If selected address for 8255 = 8000H i.e. 10000000 00000000What will be decoding strategy ?

Problem -2 If 8255 address = 1110H Then what will be decodingDecoder 74LS138 may also be used.

1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0A15A12A1 A0CS of 8255ORDecoding of 8255 Address E000H to generate chip selectA15A13A11A12A14A10A 9A 8Reading and writing to 8255 portsLet us assume that 8255 has been interfaced at address E000H the port addresses will be Port A - E000HPort B - E001HPort C - E002HControl register - E003HConsider that the application demands the following ports configuration Port A - OutputPort B - InputPort C - OutputMode = 0 What will be control word of 8255 ?

The 8255 control word will be-1000 0010 =82HWe may configure 8255 by writing 82H to control register in two ways:-(A)MOVDPTR,# E003HMOV A,# 82HMOVX@DPTR,ANote - E003 is location in external data 8255.Other way of writing (A) will be(B)PRAEQUE000HPRBEQUE001HPRCEQUE002HPRCREQUE003HORG00HSJMP 030HORG 030H

MOVDPTR,# PRCRMOVA,# 82HMOVX@DPTR, ATo read data from Port BMOVDPTR,# PRBMOVXA,@DPTRTo write data to Port AMOVDPTR,# PRAMOVA,# DataMOVX@DPTR, A

Note :- 8255 ports ie . A,B,C have no addressable bits.That to find status of individual bits Read port contextUse logical operations ANL ORL etc Or - Use shift/rotate RRC A , RRLC A etcIn keil bit (24 MHz, 8051) 8255 has been interfaced at addres E000HIn program (B) way of writing is normally used.Now let us take some I/O interfaceWe shall first take up Keyboard interfacing followed by LED interfacing and 7 segment LED interfacing

Keyboard interfacingBasic keyboard operation is shown in figure INHighOUT (High when the key is pressed) Basic keyboard operation-single key. Basic keyboard operation- two keys.OUT 1OUT 2INOUT 3OUT 2OUT 1OUT 4IN Basic keyboard operation four keys. Above Configuration cant be adopted for more no. of keys A 64 key keyboard will require EIGHT bit portsWe may represent the above as.COUT1OUT2IN1IN2(1)(2)(3)(4) 2x2 keyboard operation Contains two rows IN1 and IN2 and two columns OUT1 and OUT2 Activate Row1 i.e IN1 check OUT1 (If 1 then key No. 1)Else cheek OUT2 (If 1 then key No. 2)Activate Row2 i.e IN2 check OUT2 (If 1 then key No. 3)Else check OUT2 (If 1 then key No. 4)8 x 8 key board can be arranged in 8 rows and 8 columns.Only two ports are required to interface with p.

8x8 keyboard interfacing with microprocessor The codes of keys of key board may be stored row wise is 8255.

When a Key is pressed. row no. and column no. i.e. position of key is identified

key code is taken from table and used in the program. Codes for keysin the first rowCodes for Keysin the second rowCodes for keysin the eighth rowXX1XX2XX8Code table for 8 x 8 keyboardStartI 1Enable the Ith rowSet the address of the code for the first key on this rowCheck for key depressionKeyDepressed?Determine the column number and the code of the keyI I+1I>8?YesNoYesNoKeyboard- microprocessor interface software flowchartKey Debouncing

When a key is depressed and released contact is not broken permanently.Key makes and breaks the contact several time for few milliseconds before the contact is broken permanently. Thus a key depression detected by p may be false i.e it may be due to bouncing of key. Thus key debouncing i.e. as certaining that key depression in true is important. Debouncing by HW and SW both in possible. Software debouncing after key depression detected. p executes a delay routine for few milliseconds. p then again checks for key depression.If key is depression is detected then real depression else false depression.

Let us interface 4x4 keyboard with 8051Both rows and columns can be connected to 8 lines of one port.Rows can be activated by using SET B bit instruction.Key Depression can be checked by using JB or JNB instructions. Hex key pad interface in Lab. - 16 keys (0 to F) arranged in - 4 x 4 key boardRows connected to PB0 to PB3Columns connected to PA0 to PA3You have to determine the key depressionStore the code of the key in 8255.

Fig-33LED Interface LED i.e Light Emitting Diode

emits light energy when conducts Anode is held at higher voltage than cathod

+5 VLED operation. LED interface with microprocessor Common cathode Anode connected to Port Lines

All cathodes connected together to groundsPortBit 7Bit 0Microprocessor interface to LED (common cathode)[ Port bit = 1LED Conducts i.e glows ]Common Anode Anodes of all LEDs connected together to 5V

Cathodes of LEDs connected to port linesBit 7Bit 0+5 V Microprocessor interface to LED (common anode).[ Port bit = 0LED Conducts i.e glows ]In common cathode- by making individual port bits as 1 we may glow the LED. SETB P2.7 i.e LED connected to P2.7 will glowMOV P2,#0FFH All LEDs connected to port Port P2 will glowIn common Anode making a particular port bit 0 will glow the LED connected to the port line.CLR P2.7- LED connected to P2.7 will glowMOV P2, # 00H- Will glow all the LEDs connected to port P2.The structure has eight segments a,b,c,d,e,f,g and h. Very use full in displaying numeric and alphanumeric data.Example :- For displaying A, all segments except d and h should glow.abcdefghSeven segment LEDs The LEDs can be arranged in the fashion shown in Character formation in seven segment LEDsabcefgacdefgFor displaying 6, all segments except b and h should glow.h is used for displaying decimal point. Note Previously there were only seven segments. Eighth segment h has been added later. But name seven segment has remained stock. The On/Off in formation of segments can be arranged in one byte. Called control byte for 7 segment LEDThe bits (port lines) can be connected to segments as common cathode or common anode fashion. Common Cathode - Anodes connected to bits, cathodes connected to ground.Common Anode Anodes connected to +5V, cathodes connected to bit.

Representing segment code in byte- two ways 76 5 4 3 2 1 0 ab c d e f g h 76 5 4 3 2 1 0hg f e d c b a0-Glow the segment for common Anode configuration 1-Do not glowCommon Cathode - bit =1, segment glows bit = 0 doesnt glow

Common Anode -bit = 0 segment glowsbit = 1 segment doesn't glow

Microprocessor can be interfaced to seven segment LED in parallel or serial way.

Parallel interface +5 VAnodeabhResistersOut port760 Microprocessor interface to seven-segment LED (parallel interface).in common Anode fashion Cathode of segments connected to port bits.MOV Px, #00H will glow all the segmentsCLR Px .3 will glow segment No. 3 i.e segment e.Simple Hardware and software interfaceFor one 7 segment LED i.e display of 1 character one port is dedicated.Thus for displaying 20 characters, 20 ports will be required. Generation of ports will require extra hardware.Parallel interface is very fast but we dont require very fast changing display due to limitation of our eyes.Serial Interface- Over comes the limitation of parallel interface in case of large no. of 7 segment displays.

AnodeabhResisters+5VMSBShift registerLSBClock Microprocessor interface to seven-segment LED(serial interface)abcdefghCode bitsContains shift register connected to 7 segment LED.Two input lines- one for code bits and other for clock.The operation sequence is shown in StartLoad LSB from display codeLoad clockLoad next bitLoad clockSeventh bit loaded ?StopNoYes 1 0 0 0 1 0 0 0After 8 clock period the character will appear in 7 segment.Example:- Display code for A

7 6 5 4 3 2 1 0 h g f e d c b a for common anode configuration .abcefgAs bits move in shift register different segments glow and at the end of 8 clock periods A appears. Connecting more segments doesnt require any extra port or line. Using just clock and code bit line we may connect many segments in serial fashion. MSB of a segment is connected to input code bit line of shift register of next segment.

The characters will appear almost instantenously. Large No. of 7 segment displays can be connected74164 shift register is normally used. Any two port lines-one for clock and other for code bits may be used for displaying.Control byte may also be arranged as a bcdefgh

In this case we shall Input MSBInput Clock

And continue doing it After 32 clocks, the 4 characters will appear in 4 -7 segment LEDsCoder bits of characters to be displayed may be stored in consecutive 8255 locations. D0D1D2D3

Code bits are sent in the order of D0 to D3.A segment counter is initialized to 32.After every clock decremented When counter =0, - stop i.e. operation is completed 7 segment display experiment is part of microcontroller lab.