52.223 Low Level Programming Lecturer: Duncan Smeed

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52.223 Low Level Programming Lecturer: Duncan Smeed Recap

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52.223 Low Level Programming Lecturer: Duncan Smeed. Recap. The Organisation of a Computer. Organisation of a computer, showing the five classic components: input output memory datapath and control (these last two are sometimes combined and called the processor). - PowerPoint PPT Presentation

Transcript of 52.223 Low Level Programming Lecturer: Duncan Smeed

Page 1: 52.223 Low Level Programming Lecturer: Duncan Smeed

52.223 Low Level Programming Lecturer: Duncan Smeed

Recap

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The Organisation of a Computer

Organisation of a computer, showing the five classic components:– input– output– memory– datapath and– control (these last two are sometimes combined and called the processor)

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Block Diagram of Typical Computer

Processor (CPU)

Input/Output Memory

Direct Memory

Access

I/O Bus Memory Bus

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Input/Output (I/O) Subsystem

CPU

Memory

I/O

Interface

I/O

Interface

I/O

Device

I/O

Device

•••

••• •••

•••

•••

I/O Address

I/O Data

I/O Control

Specialised

data and

control lines

Memory

Bus

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Memory-mapped I/O Structure

CPU

Memory

I/O

Interface

I/O

Interface

I/O

Device

I/O

Device

•••

••• •••

•••

•••

Address

Data

Control

Specialised

data and

control lines

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Memory Structure

• Most, if not all, modern day computers incorporate at least two types of main memory device:– Read Only Memory (ROM) and

– Random Access Memory (RAM).

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Read Only Memory (ROM)

• The contents of such memory devices are non-volatile– which means that their contents are not lost when the power is switched

off.

• ROM is normally required 'boot' (start from a power off state) a computer as it must get (at least) its first few instructions from such a device.

• The (rest of the) operating system is then, typically, loaded from a magnetic media such as tape, floppy disk or hard disk.

• Some computers keep the whole of their operating system in ROM although this has the disadvantage that it cannot be as easily updated as changing the (contents of) magnetic media.

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Random Access Memory (RAM)

• More accurately called Read/Write Memory (RWM)– the contents of which can be written as well as read.

• Normally volatile in that it loses its contents when power is switched off.

• Most computers have much more RAM than ROM as most programs, including the operating system, are loaded into this type of memory.

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Typical Structure of Main Memory

•••

Control Circuits

Main Memory

b bits

0

1

2

3

n-4

n-3

n-2

n-1

Address

Bus

Data Bus

Read

Write

CPU

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Memory Organisations

7 0

0

1

2

3

4

5

S 6

T 7

R 8

I 9

N 10

G 11

12

65533

65534

65535

Byte-addressable memory for an 8-bit processor…

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Memory Organisations - Little-Endian

Byte-addressable memory for a “Little-Endian” 16-bit processor such as the Intel 8086…

15 8 7 0

1 0

3 2

5 4

7 T S 6

9 I R 8

11 G N 10

65533 65532

65535 65534

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Memory Organisations - Big-Endian

Byte-addressable memory for a “Big-Endian” 16-bit processor such as the Motorola 68000…

15 8 7 0

0 1

2 3

4 5

6 S T 7

8 R I 9

10 N G 11

65532 65533

65534 65535

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CPU Structure and Function

The major structural components of a CPU are:– Control Unit: Controls the operation of the CPU– Arithmetic and Logic Unit: Performs the

computer’s data processing functions– Registers: Provides storage internal to the CPU– CPU Interconnection: Some means of

communication between the CU, ALU, and registers.

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…CPU Structure and Function

The function of the CPU is to:– Fetch Instructions– Interpret Instructions– Fetch data (if required)– Process data (if required)– Write data (if required)

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Register Organisation

The registers in the CPU serve two functions:– User-Visible Registers: These enable the

programmer to minimise external memory references by optimising usage of registers.

– Control and Status Registers: These enable the control unit to control the operation of the CPU.

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User-Visible Registers

These can be categorised as follows:

– General Purpose

– Data

– Address

– Condition Codes

In some m/cs General Purpose registers may either be used for Data or Address. In a completely orthogonal instruction set (IS) any GP register can contain the operand(s) for any opcode. Often, however, there are restrictions.

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Control and Status Registers

These, in general, are not visible to the user.

Four registers are essential to instruction execution:– Program Counter (PC): Contains the address of an instruction to be

fetched.

– Instruction Register (IR): Contains the instruction most recently fetched.

– Memory Address Register (MAR): Contains the address of a memory location.

– Memory Buffer Register (MBR): Contains a word to be written to memory or the word most recently read.

Typical CPU designs include a register often called the Program Status Word (PSW) that contains status information such as condition codes plus other status information.

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Instruction Types

Any program written in a high-level language (HLL) must be translated into machine language in order to be executed. Thus the set of m/c instructions must be sufficient to express any of the instructions from a HLL. Thus we can categorise the following types:

– Data Processing: Arithmetic & Logic– Data Storage: Memory instructions– Data Movement: I/O instructions– Control: Test & Branch instructions

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Instruction Repertoire - types of operation

The number of different opcodes varies widely from machine to machine. A typical categorisation is:– Data Transfer

– Arithmetic

– Logical

– Conversion

– I/O

– System Control

– Transfer of Control