5 4 J361Y-SB Rev V3.06(06/16/2005) 91.3H801.001 Sheet Sheet 1 · 2020. 3. 1. · J361Y RS482+M1573...

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SheetCover pageSheet 1Block DiagramPOWER DELIVERY CHART

Sheet 2Sheet 3Sheet 4 GPIO Table

Sheet 7Sheet 6Sheet 5

Sheet 8

Althon64/64FX HT I/FAlthon64/64FX DDR I/FAthlon64/64FX MiscAlthon64/64FX PWR & GND

Sheet 10Sheet 9

Unbuffered DDR 1,2SSTL-2 Termination ResRS482M-HT LINK & DVO I/F

Sheet 11

Sheet 13Sheet 12

RS482M-DAC/LVDS/MIS/CLK/PMRS482M-PCIE & A-Link

Sheet 15

TV OUT Conn

Sheet 14

Sheet 17 TMDS Transmitter & conn

RS482M-POWER and GroundLVDS ConnSheet 16

Sheet 24 Clock GENSheet 23

Sheet 19

M1573 SATA & IDE I/F

Sheet 18

Sheet 25

Sheet 21 M1573 PCI/RTC/AC97/LPC/MISC

VGA FILTER/CRT CONN

M1573 USB/AC97/RESUME

M1573 ALinkSheet 20

IDE and SATA CONN

Sheet 22

USB POWER & PWR CTL

BIOS /Battery RTC

Sheet 41

VCC_Core(ISL6559)

LAN

Sheet 40

Sheet

Sheet 36

TPM

AUDIO CONN

Sheet 43

CardBUS Slot and 1394 Conn

R5C842-PCI I/F and 1394

SIO DM1737 & FDD Conn

Sheet 50

Sheet 46

Screw Hole

Sheet 35

R5C842-MDIO I/F and CB I/F

VDDIO and DDRVTT Regulator

Sheet 42

Sheet 38

Sheet 45

Sheet 49Sheet 48

KB/MS PS2 CONN

AUDIO CODEC

MS/SD/xD CARD Conn

VCC18_RUN & VCC12_RUN

ATX 24Pin conn

Rev Notes

Sheet 47

Front Board Header & Buzzer

PCI Riser Slot

Sheet 44

Sheet 37

PWR Sequence controller

COM & PARALLEL PORT

LED/FAN/PWRBTN

Sheet 39

Dual_5V_3.3V_1.8V & 3.3VSB

Sheet 28

Sheet 32

Sheet 27Sheet 26

Sheet 30Sheet 29

Sheet 31

Sheet 33Sheet 34

JJ361Y-SB Rev_V3.06(06/16/2005)91.3H801.001

USB CONN

CLK MAP

J361Y RS482+M1573 1A

Wistron Incorporated21F, 88, Hsin Tai Wu RdHsichih, Taipei

Custom

1 50Thursday, June 16, 2005

Cover Page

Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

A-Link 1X2 Lanes (Up to 4 Lanes)

External Graphics-DVO

Ricoh -R5C842

IN

CRT

Port A : Line_OUT(Orange/Consumer)

DDR266/333/400

Y/C/COMP S-Video outand Y/Pr/Pb HDTV

Port A : Line_OUT(Lime/Corporate)

RearAudioport

PCI 2.3 - 33MHz

Internal 2*1

REAR 2*2

A-Link 1X2 Lanes (Up to 4 Lanes)

AC'97/HD Audio I/F

AC

'972.3/H

DA

udioI/F

HEADPHONE OUT :BLACK

PCMCIA/PC card-2 Slots

Can extend up to1X4 Lans

12 bits DVO I/F

PCI RiserSlot

USB Port

VCORE

IDE Bus 2-Channel

HyperTransport LIN0 CPU I/F

Channel A-DIMM1

Front 1*2

FDD

FLASHBIOS

MIC IN : Pink

PCI I/F

TPM

LPC BUS

TV-OUTPCI-E 4X1 Lanes

HyperTransport- 16x16/1GHz

PS2KB/MS

Integrated Graphics -CRT/TV-out/LVDS

10/100 and GigaLANdual-layout

South Bridge - ULi M1573

RGB

SD/MMC/MS/MS Pro/xD

IDE I/F

SATA 1.0 4 ports

CLK GENICS951412

Front Audioport 1

LPT

Front Audioport 2

1 Channel

1394 *2

Parallel ATADevices

External Clock Gen

LVDS

SMSC LPC SIODM1737

AMD Althon64/64FX(Socket uFCBGA939)Processor

USB 1.1/2.0 I/F

USB 2.0-8 portsLPC I/F INT RTC

BCM4401/5705M/5788M

A-Link Express I/F1X2 Lanes

ATI NB RS482/482M(LVDS)RS482M only

CH7301C-T

BW:2000MT/s or4000Mbyte/s

8 Ports

SerialPort*2

TMDS

VRM ISL65594 Phase

Channel B-DIMM2

AC'97 CodecALC655/ALC250HD CodecALC880/ALC260

DDR266/333/400

Port C : SPDIF (Black)

1 16x PCIE I/F

SATA 1.0Serial ATADevices

Riser MRSlot

3 Channel

Port B : Line_IN(Light Blue)

BBlock Diagram

OU

T

J361YRS482+M1573 1A

Wistron Incorporated21F, 88, HsinTaiWuRdHsichih,Taipei

Custom


Block Diagram

Title


Date: Sheet of

WWW.AliSaler.Com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC3_3+/-5%7.46A

VCC5+/-5%10.7A

VCC5SB+/-5%2.5A

AcBel Power Supply ACPI4PC49

Total 54.8W Max Total 180W Max

VCC12/+12Vcore+/-5% 10.7A

+12VL+/-5%4.0A

VCC-12V+/-5%0.1A

VRM SW REGULATORISL6559

VDDA 2.5V 33mA

VDDCORE 0.8-1.55V 80A

VCC2.5V_SUS (S0,S1,S3)VLDT (S0, S1) VLDT 1.2V 0.5A

VCC2.5V_SUS (S0,S1,S3)

DDR400 MEM I/F VTT 1.3V0.19A, VDDIO 2.6V 1.25A

VCC_CORE (S0, S1)

ATHLON64 CPU

DDR_VTT (S0,S1,S3)

VDDA (S0,S1)2.5V LDO APL1087VCC5 (S0, S1)

DDR_VTT (S0,S1,S3)DDR400 DIMMs

VDDIO 2.6V 8.52AVCC2.5V_SUS (S0,S1,S3)VTT 1.3V 2.31A,

+12Vcore (S0, S1)

VDDHT 1.2V/0.5A I/O Power for HT I/FNB ATI-RS480M (Max ?mW)

VDD_DVO 1.8V/2A for DVO I/F IO power

VLDT (S0, S1)

VDDIO 2.6V SWREGULATORAPW7057KC

DDRVTT 1.3VAPL5331U5C

33mA

80A0.19A

1.25A0.5A

2.31A

8.52A

0.5A

12.27ANMOS PHD45N03LTAPMOS AP20P02J

DDR_VCC5_DUAL(S0,1,3,5)

VCC5 (S0, S1)VCC5SB(S0,1,3,5)

VCC3_3 (S0, S1) VCC12_RUN 1.2VSW REGULATORAPW7057KC

VCC3_3Dual(S0,1,3,5)CEM9939AVCC3_3SBAPL1085

VCC3_3SB(S0,1,3,5)

VCC5SB(S0,1,3,5)

USB x4 Rear

2.0AVCC5_USB_R VCC5_USB_F

2.0A

USB x2 Front& x2Header

CEM9939A

CEM9939A

VCC5SB (S0,1,3,5)

VCC5 (S0, S1)VCC5_USB_R(S0,1,3)

VCC5_USB_F(S0,1,3)

VCC12 (S0,1)

VCC3_3 (S0,1)

5V

-12V3.3Vaux

0.1A

3.3V

0.375A

7.6A

PCI Slot Max25W

5.0A

0.5A12V

VCC-12 (S0,1)

VCC3_3Dual(S0,1,3,5)

VCC5 (S0, S1)

2A

2A

ICS953803-LFCLK_3.3V 400mA

CLK GEN

VCC3_3(S0,S1)400mA

xVCC Min2.0A

PCMCIAx2 Slot

CEM9939A

CEM9939A

R5534V

AV

CC

BV

CC

AV

PP

BV

PP

VCC3_3SB(S0,1,3,5)

VCC3_3Dual_842(S0,1,3,5)

VCC5_Dual_842(S0,1,3,5)

VCC5 (S0, S1) 2AVCC5SB (S0,1,3,5)VCC3_3 (S0, S1) 2A

VDD_CORE 1.0~1.2V/5A for NB ASIC core powerVDD_CORE_NB(S0, S1) 5A

VDDA12 1.2V/2.25A for PCIE I/F main power2.25AVDDA12(S0, S1)

8.25A

2AVDD_DVO (S0, S1)

VDD_18 1.8V/0.2A for CORE transform power0.2AVDD18 (S0, S1)

0.75AVDDA18(S0, S1) VDDA_18 1.8V/0.75A for PCIE I/F output driver I/O POWER and PLLAVDDQ1.8V for Band gap ref voltage for DAC

LPVDD 1.8V for LVDS PLL

PLLVDD/HTPVDD 1.8V for PLL&HT PLLLVDDR18A 1.8V for LVDS Analog POWER

AVDD 2.5V or 3.3V for DAC Analog powerVDDR3 3.3V for 3.3V I/O POWERVCC3_3(S0,S1) 0.3A

VDD_CPU 1.2V/10mA post driver power for CPU I/F

VDD18M_CORE 1.8V/0.6A for main core power

VDD33RUSB 3.3V/0.1A for RESUME power for USB PHY

VDD33M_IO 3.3V/0.2A for 3.3V Driving I/F power

PCE_VDD/PCE_VTT 1.8V/0.4A for PCI-E PHY power

PCE_VDDA 1.8V/0.15A for PCI-E PLL analog power

VDD33R_RTC 3.3V RESUME power for RTC POK circuit

SATA_18M 1.8V/150mA for SATA analog power

VDD18R_CORE 1.8V/0.1A for 1.8V RESUME power

SB ULi-M1573(Max 3.6W)

0.6A

0.4A

0.15A0.15A

10mA

10mA

VCC 1.8_DUALAPL1087

VCC18_RUN 1.8VSW REGULATORAPW7057KC

4.75AVCC5 (S0, S1)

VDD33R_IO 3.3V/10mA for RESUME power for 3.3V driving I/F

SBVCORE_1D8V(S0,S1)

PCIE_1D8V(S0,S1)

PCIE_VDDA(S0,S1)

SATA_1D8V(S0,S1)

VCC3_3Dual (S0,1,3,5)VCC_CORE (S0, S1)

VCC3_3(S0,S1) 200mA

100mAVCC18_DUAL(S0,1,3,5)

3V_DUAL_IO(S0,1,3,5)

100mA

1.3A

AVDDQ(S0,S1)

AVDDDI 1.8V Digital power for DAC

LVDDR18D 1.8Vfor LVDS Digital POWERLPVDD(S0,S1)

LVDDR18A(S0,S1)PLLVDD/HTPVDD(S0,S1)

VDDR3(S0,S1)AVDD(S0,S1)

Ricoh R5C842VCC3_3(S0,S1) Power Supply

Current, operatingMax 160mA

160mA

VCC12VL

6Pins Panelpower conn

4.0AVCC12VL (S0, S1)

PPower Delivery

J361Y RS482+M1573 1A


Custom


Power Delivery

Title


Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GP22

PCIPIRQJD,A,B,C

CTS*2

Mux Function

GP57

KBRST*

AD21

GP52

AUX (VTR)

O

KBCLK

MSDATA

O

GP50

GP27

I

GP33

I

SMSC DM1737

KBDATA

IGP32

I

GP42

AUX (VTR)

RST_IDE*

IDSEL

I

GP53

MSCLK

GP56

AUX (VTR)

AD22

MAIN (VCC)

MAIN (VCC)

AUX (VTR)

I

I

MAIN (VCC)

O

R5C842

DSR*2

MAIN (VCC)

O

GP54

PREQJ0/PGNTJ0PREQJ1/PGNTJ1

IRQ

AUX (VTR)

PREQJ3/PGNTJ3

MAIN (VCC)

RTS*2

AUX (VTR)

I

POWERGPIO Function

GP43

A20GATE

PIRQJA,B,C,DPIRQJB,C,D,A

O

GP51

MAIN (VCC)

I/O

O

O

GP11

RI*2

MAIN (VCC)

Device

O

I

GP37

GP12

MAIN (VCC)

SLP_S1_S5_L*

AUX (VTR)

PREQJ4/PGNTJ4

I

I

I

DTR*2

MAIN (VCC)

MAIN (VCC)

I

MAIN (VCC)

GP14

PCIRISER

GP36

O

GP55

GP40

TVLED*

GPIO #

GP61

GP60

PIRQJE

MAIN (VCC)

AUX (VTR)

DCD*2

MAIN (VCC)

PCI LAN

I

O

MAIN (VCC)

I

GP21

MAIN (VCC)

MAIN (VCC)

GP10

RXD2

GP13

AD19AD20

TXD2

GNTJ/REQJ

MAIN (VCC)

VDDR3

SATA_GPO1

O

ATI RS482/482M

I

GPIO Function

DFT_GPIO3

I

RUNGPIO1

VDDR3

SATA_GPI2

Mux Function POWER

I

LCD_VID1 VDD33M_IO

LCD_VID2

VDD33M_IOSATA_GPI0

MO_DET

VDD33M_IO

POWER

VDD33M_IO

I

LCD_VID0

VDD33M_IO

DFT_GPIO2

VDD33R_IO

SATA_GPO2

GPIO Function

O

SATA_GPI3

I

GPIO #

I

GPIO #

SATA_GPI1

LOAD_ROM_STRAPS#

I

DFT_GPIO1

LOAD_MEM_STRAPS#

DFT_GPIO4

VDD33M_IO

O

O

RSMGPIO0

RUNGPIO0

SATA_GPO3

ULi M1573DFT_GPIO5

I

TV_SWITCH

PWRLED*

VDD33M_IOIDE_P

SATA_GPO0

VDDR3

Mux Function

I

VDD33M_IO

VDDR3

RUNGPIO2

VDD33M_IO

VDD33M_IO

VDD33M_IO

VDDR3

O

I

I/O

I/O

O

VDDR3

VDD33M_IO

O

I

DFT_GPIO0

Active Status

LOW

LOW

LOW

Active Status

Low

Low@S0/ S1/ S3 / High@S4/ S5

Low

High / push-pull

Low/ S5 wake up event

Active Status

Low

Low

Active StatusHigh

LOW

LOW

High/Default LOW

LOW

LOW

1:D-Video0:S-Video

RUNGPI18 ACB_BITCLK BOARD_ID_0 I VDD33M_IO

RUNGPI11 VOL_UP# BOARD_ID_1 I VDD33M_IO

RUNGPI12 VOL_DOWN# BOARD_ID_2 I VDD33M_IO

RUNGPI13 VOL_MUTE# BOARD_ID_3 I VDD33M_IO

RUNGPI9 CLKRUN# CRT_TMDS_DISJ O VDD33M_IO HIGH

D_PLUGDET 0: HDTV connected1: HDTV unconnected

RUNGPO[13] CPUHI# Blueled* O VDD33M_IO HIGH

RUNGPO[16] IGNNE# Blueled02* O VDD33M_IO HIGH

RUNGPO[21] SMI# Blueled03* O VDD33M_IO HIGH

SUSLED*PCIRST_OUT4

LAN_DISJPCIRST_OUT1

Low

Low/Default high

FlashROM_WP

IO_PMES3#

IO_PMES5#

USBPWR_Ctrl Consumer:S3->H, S4/S5->LCorporate:S3/S4->H, S5->L

RSMGPIO1

RSMGPIO3

SLPBTN# IO_PMES5#

VDD33R_IO

OACPILED*

IRSMGPIL[0] VDD33R_IO

S3:HighRSMGPIO2

842HWSPNDJ

VDD33R_IO

High

I

HIGH

IO_PMES3#SMBALERT#

O

VDD33R_IO

RSMGPI10

VDD33R_IO

O

ACPI_S3

0: MO connected1: MOunconnected

PME event input

PME event input

PME eventoutput

PME event output

PME event output

LCDONJ_SIO

RUNGPIO3

RUNGPO[19] NMI HDDLED O VDD33M_IO HIGH

J361Y RS482+M1573 1A


Custom


GPIO Table

Title


Date: Sheet of

WWW.AliSaler.Com

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NOTE :

Rev Description PageDATE3/10 SA_V1.0

RRev. NotesRelease Schematic

SA_V1.1 Add Board_ID_[3..0] setting 22Add PIRQ#[E:H] pull high 36Add CN41 28HW strapping setting 13,21,22,23Modify Front HP OUT Mute circuit 39

Two copper pure for VTT fill - at least 100mils wide/Change DDR_VTT_CPU as DDR_VTT 7,824Modify Net REFCLK0_1 and REFCLK0_247Connect ASIC8M_CPU_RST to LDTREST#3/14

Change R92 to 2.4K ohm 17Modify DVO_IDCKN and DVO_IDCKP 17Modify TMDS HotPlug circuit 17Modify TV-out I2C circuit 18

3/15 Modify VDD_DVO power for RS482 revA11 15Modify DVO_VREF circuit 17

SA_V1.2 Change L33 223/15Modify VRM Circuit (Vendor suggestion) 46Change M1573 HW strapping resistors to 1K ohm 21Change R536 and R538 to 1K ohm and change R554 to 5.1K (Vendor suggestion) 46Modify SB&NB POWER Good circuit 47

SA_V1.33/16 Modify DLINE circuit 18Modify TMDS Hot plug circuit 15

SA_V1.43/16 Move R664 and R97 to Page17. Delete R665 and R666 13,17,19Delete R669 and R670 18Delete TC86 32Modify DLINE circuit 18Change M1573 to RevA1D 20-23Add LAN Disable circuit 37Delete TC39 for Extra 4 CPU FANSINK screw hole3/19 SA_V1.5 46Change C763 to a small size 40Modify FJ's checklist items

SA_V1.63/21 SWAP USB Port 26SMBCLK and SMBDATA (SIO Page) 28SA_V1.7Modify SUSLED* circuit 41

14Change R74 and R75 to 8.25K and 82.5 ohm (ATI PA_RS4X0F4.pdfModify NB_RST* circuit 20

SA_V1.8 Modify LAN Disable circuit 373/223/23 Add 6559_Common Ground 46SA_V1.9

Change PCIRST circuit from VCC3_3DUAL driven to VCC3_3SBUSE CLKRUN# of M1573(RUNGPO9) to disable CRT and TMDS

SA_V1.10

Modify GPIO arrangementAdd another pair of SM bus dedicate for CLK GEN and DDR

SA_V1.11 Net Swap3/24SA_V1.123/25 Add Two capacitors for EMI 38SA_V1.13 Change Q70 to 3904 NPN BJT 42SA_V1.163/30 Rename Reference and swap nets

3/31 SA_V1.17 Connect H7 to AGNDSA_V1.184/06 Add CLOCK MAP 50

SB_V2.0Rev Description PageDATE

0422 Modify All SA P/R rework items and FJ GFX_FeedbackSB_V2.10426 Modify R354 and R744 and FJ GFX Feedback ver.0427 47

0427 Swap ACZ_SDIN0 and ACZ_SDIN1 at SB side 23SB_V2.2 LO_R can't be connected with Mute_LO. 39

Add R746/R747/R748 23Change C267 to 0.018uF and R418 to 60.4 ohm 44Add R749 27Modify LAN_RSTJ signal 37Remove JP2 and around circuitChange Pin assignment of CN39Modify LCD PWRON circuit 37

4021

Add USB ESD IC 26Add COMMON GND for SW regulator 44,45Change TC35 to 220uF

46Add common ground near VRD low side MOSSB_V2.30505Modify SUSLED circuit 41Modify FAN Tach circuit 41Modify GPIO assignment for LED functionModify PCI Riser IDSEL 36Add FlashRom_write protect functionAdd Two more GPIO pin for IO_PMES3# and IO_PMES5#

0508 SB_V2.5 Modify USBPWR control circuit 42Modify SUSLED circuit 41Modify TVON_Plug circuit 41Modify All LED circuit 41Modify BIOS write protection circuti 27Add a pull-up resistor on Mute# 40Change R557 to 100K ohm

0509 SB_V2.6 Modify VDDA_2.5V_CPU Enable circuit 081394 port 0 and port1 swap

SB_V2.70510 Remove Q73 and ACZ_RST_CRL* 40Modify All LED circuit 41Modify USB POWER controller circuit 42Add two 1K ohm between VCC5_USB_F"/VCC5USB_R" and GND 42Remove D31 and R517. Then change R518 from 1k-ohm to 0ohm and unmount as default.[ESD for DDC]

2917/19

0511 SB_V2.8 Add SLP_S4_H to control USB power 23/42Change R775.1 to VCC5 08

28/41Modify TVON_PLUSE3.jpgChange Q55 to 2N7002 and remove R768SB_V2.9 41

SB_V2.10 USE CRT_TMDS_DISJ to do mute function 40Change BOM option for Audio function 40Reserve 3.3V pull-up for Fansink 41

SB_V2.110512 Modify VLDT_EN circuit 45Modify USB power control circuit 42Unmount R8SB_V2.120513 41

0517 SB_V2.13 Change Q105 to FET(2N7002)Consuemr M/B: Board_ID[3..0] = "0001"Corporate M/B: Board_ID[3..0] = "1000"Small Qty M/B: Board_ID[3..0] = "0010"

Change Board ID

Change C67 to X7RChange R512 for Consumer/LCDPC ,Change R508 for Corporate

4021

1629

Change C88 and C413 to X5Rmount C691 and C692 24

32 26

R13 R14 change to 1Kohm , RN1 change to 1K ohm 28U58 U59 U60 change to 83.01293.0AE 26

0524 R129 unmount, L66 change to 63.R0004.1510525 R59 R777 change to 0 ohm, Q103 Q15 change to 2N7002 41

32 38

J361Y RS482+M1573 1A


Custom


Rev Notes

Title


Date: Sheet of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PProcessor HyperTransport Interface

AL1

uPGA939

A31A1

Top View

At least 200mils for pureand 20mils to pin

20/5/5/5/20 1"

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PProcessor DDR Memory Interface

Break in/out : 15/5/15Data/DM/CHECK group Layout rule : (Target Impedance 45 ohm)

Motherboard trace routing : 10/10/10

DQS group Layout rule : (Target Impedance 35 ohm)

Motherboard trace routing : 20/15/20Break in/out : 20/5/20 Break in/out : 15/5/15


Address/Command group Layout rule : (Target Impedance 45 ohm)

To

DIMM

Channel-A

To

DIMM

Channel-B

A1

AL1

Top ViewuPGA939

A31

Clock group Layout rule :20/5/5/5/20(Target Impedance 93 ohm)

10/10/10

Two copper pure for VTT fill - at least 100mils wide

Unused clock pairsPlace test points onthe bottom layer

C231, C229, C228, C234,C223 are the decouplingfor VTT pins nearProcessor

MEMZN,MEMZP with5/10/5,

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

20/5/5/5/20, length

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Bottom Layer between CPUand DIMMs

VCC_Core decoupling -Bottom Layer underCPU socket

AL1

TOP Layer betweenCPU and DIMMs

PProcessor POWER & Ground

Top View

TOP Layer near CPU socketside

A1 A31

uPGA939

VDDIO Decoupling

Bottom Layer under CPUsocket

J361Y RS482+M1573 1A


Custom


Althon64/64FX Power and Ground

Title


Date: Sheet of

VCC_CORE

VCC_CORE

VCC_CORE

VCC2.5V_SUS

VCC2.5V_SUS VCC2.5V_SUS

VCC2.5V_SUS

VCC2.5V_SUS

C278

SCD22U10V3KX

1 2

C645

SC10

U10

V6KX 1

2

U34E

SKT-K8-2

AA4

AA7

AA9

AA1 1

AA13

AA1 5

AA17

AA19

AA21

AB6

AB8

AB10

AB12

AB14

AB1 6

AB1 8

AB2 0

AC9

AC11

AC13

AC15

AC17

AC19

AD2

AD6

AD8

AD10

AD12

AD14

AD16

AD18

AE4

AE7

AE9

AE1 1

AJ11

AK5

AK7

AK9

AK1 1

B5 B10

B12

D1 0

G7

G9

G11

G13

H2

H6

H8

H10

H12

H1 4

H16

H1 8

J4 J7 J9 J11

J13

J15

J17

J19

K6 K8 K10

K12

K14

K16

K18

K20

L7 L9 L11

L13

L15

L17

L19

L21

M2

M6

M8

M1 0

M12

M1 4

M16

M18

M2 0

N4

N7

N9

N1 1

N13

N15

N17

N1 9

N21

P6 P8 P10

P12

P14

P16

P18

P20

R7

R9

R11

R1 3

R1 5

R1 7

R19

R2 1

T2 T6 T8 T10

T12

T14

T16

T18

T20

U4

U7

U9

U11

U13

U1 5

U1 7

U1 9

U21

V6 V8 V10

V12

V14

V16

V18

V20

W7

W9

W1 1

W13

W15

W17

W1 9

W2 1

Y2 Y6 Y8 Y10

Y12

Y14

Y16

Y18

Y20

AA23

AB22

AB24

AB3 0

AC21

AC23

AD20

AD22

AD24

AD30

AF30

AH30

AK16

AK18

AK20

AK22

AK24

AK2 6

AK2 8

AK3 0

B16

B18

B20

B22

B24

B26

B28

B30

D30

F30

H20

H22

H24

H3 0

J21

J23

K22

K24

K30

L23

M22

M2 4

M3 0

N23

P22

P24

P30

R23

T22

T24

T30

U23

V22

V24

V30

W2 3

Y22

Y30

VDD

1VD

D2

VDD

3VD

D4

VDD

5VD

D6

VDD

7VD

D8

VDD

9VD

D10

VDD

11VD

D12

VDD

13VD

D14

VDD

15VD

D16

VDD

17VD

D18

VDD

19VD

D20

VDD

21VD

D22

VDD

23VD

D24

VDD

25VD

D26

VDD

27VD

D28

VDD

29VD

D30

VDD

31VD

D32

VDD

33VD

D34

VDD

35VD

D36

VDD

37VD

D38

VDD

39VD

D40

VDD

41VD

D42

VDD

43VD

D44

VDD

45VD

D46

VDD

47VD

D48

VDD

49VD

D50

VDD

51VD

D52

VDD

53VD

D54

VDD

55VD

D56

VDD

57VD

D58

VDD

59VD

D60

VDD

61VD

D62

VDD

63VD

D64

VDD

65VD

D66

VDD

67VD

D68

VDD

69VD

D70

VDD

71VD

D72

VDD

73VD

D74

VDD

75VD

D76

VDD

77VD

D78

VDD

79VD

D80

VDD

81VD

D82

VDD

83VD

D84

VDD

85VD

D86

VDD

87VD

D88

VDD

89VD

D90

VDD

91VD

D92

VDD

93VD

D94

VDD

95VD

D96

VDD

97VD

D98

VDD

99VD

D10

0VD

D10

1VD

D10

2VD

D10

3VD

D10

4VD

D10

5VD

D10

6VD

D10

7VD

D10

8

VDD

109

VDD

110

VDD

111

VDD

112

VDD

113

VDD

114

VDD

115

VDD

116

VDD

117

VDD

118

VDD

119

VDD

120

VDD

121

VDD

122

VDD

123

VDD

124

VDD

125

VDD

126

VDD

127

VDD

128

VDD

129

VDD

130

VDD

131

VDD

132

VDD

133

VDD

134

VDD

135

VDD

136

VDD

137

VDD

138

VDD

139

VDD

140

VDD

141

VDD

142

VDD

143

VDD

144

VDD

145

VDD

146

VDD

147

VDD

148

VDD

149

VDD

150

VDD

151

VDD

152

VDD

153

VDD

154

VDD

155

VDD

156

VDD

157

VDD

IO1

VDD

IO2

VDD

IO3

VDD

IO4

VDD

IO5

VDD

IO6

VDD

IO7

VDD

IO8

VDD

IO9

VDD

IO10

VDD

IO11

VDD

IO12

VDD

IO13

VDD

IO14

VDD

IO15

VDD

IO16

VDD

IO17

VDD

IO18

VDD

IO19

VDD

IO20

VDD

IO21

VDD

IO22

VDD

IO23

VDD

IO24

VDD

IO25

VDD

IO26

VDD

IO27

VDD

IO28

VDD

IO29

VDD

IO30

VDD

IO31

VDD

IO32

VDD

IO33

VDD

IO34

VDD

IO35

VDD

IO36

VDD

IO37

VDD

IO38

VDD

IO39

VDD

IO40

VDD

IO41

VDD

IO42

VDD

IO43

VDD

IO44

VDD

IO45

VDD

IO46

VDD

IO47

VDD

IO48

VDD

IO49

VDD

IO50

VDD

IO51

VDD

IO52

VDD

IO53

VDD

IO54

VDD

IO55

VDD

IO56

VDD

IO57

VDD

IO58

C321

SCD22U10V3KX

1 2

C619

SC10

U10

V6KX 1

2

C624

SCD

22U

10V3

KX 12

C625

SC10

U10

V6KX 1

2

C617

SC10

U10

V6KX 1

2

C644

SC10

U10

V6KX

(R)

12

C639

SCD

22U

10V3

KX 12

U34F

SKT-K8-2

A7 A9 AA6

AA8

AA1 0

AA1 2

AA14

AA1 6

AA18

AA20

AA22

AB2

AB7

AB9

AB11

AB13

AB1 5

AB1 7

AB1 9

AB2 1

AB23

AB26

AB2 8

AC4

AC6

AC10

AC12

AC14

AC16

AC18

AC20

AC22

AC24

AD7

AD9

AD11

AD13

AD15

AD17

AD19

AD21

AD23

AD26

AD28

AE6

AE8

AE1 0

AE1 2

AE14

AF2

AF6

AF7

AF9

AF11

AF14

AF16

AF20

AF22

AF24

AF26

AF28

AG5

AG11

AG13

AG12

AH1

AH2

AH3

AH4

AH5

AH7

AH9

AH11

AH13

AH16

AH18

AH20

AH22

AH24

AH26

AH28

AJ3

AJ13

AK13

AL13

B7 B9 C2

C8

C9

D2

D3

D5

D6

D7

D9

D13

D16

D1 8

D20

D2 2

D2 4

D2 6

D28

E3 E4 E10

E12

G12

F5 F6 F7 F9 F10

F12

F14

F16

F18

F22

F24

F26

F28

G4

G6

G8

G10

G1 4

H7

H9

H11

H13

H15

H1 7

H19

H21

H2 3

H2 6

H28

J6 J8 J10

J12

J14

J16

J18

J20

J22

J24

K2 K7 K9 K11

K13

K15

K17

K19

K21

K23

K26

K28

L4 L6 L8 L10

L12

L14

L16

L18

L20

L22

L24

M7

M9

M11

M13

M1 5

M1 7

M19

M21

M2 3

M2 6

M2 8

N6

N8

N10

N12

N14

N16

N18

N20

N2 2

N24

P2 P7 P9 P11

P13

P15

P17

P19

P21

P23

P26

P28

R4

R6

R8

R1 0

R12

R1 4

R1 6

R1 8

R20

R22

R24

T7 T9 T11

T13

T15

T17

T19

T21

T23

T26

T28

U6

U8

U1 0

U1 2

U14

U16

U18

U2 0

U22

U2 4

V2 V7 V9 V11

V13

V15

V17

V19

V21

V23

V26

V28

W4

W6

W8

W10

W1 2

W14

W16

W18

W20

W22

W24

Y7 Y9 Y11

Y13

Y15

Y17

Y19

Y21

Y23

Y26

Y28

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS1

0VS

S11

VSS1

2VS

S13

VSS1

4VS

S15

VSS1

6VS

S17

VSS1

8VS

S19

VSS2

0VS

S21

VSS2

2VS

S23

VSS2

4VS

S25

VSS2

6VS

S27

VSS2

8VS

S29

VSS3

0VS

S31

VSS3

2VS

S33

VSS3

4VS

S35

VSS3

6VS

S37

VSS3

8VS

S39

VSS4

0VS

S41

VSS4

2VS

S43

VSS4

4VS

S45

VSS4

6VS

S47

VSS4

8VS

S49

VSS5

0VS

S51

VSS5

2VS

S53

VSS5

4VS

S55

VSS5

6VS

S57

VSS5

8VS

S59

VSS6

0VS

S61

VSS6

2VS

S63

VSS6

4VS

S65

VSS6

6VS

S67

VSS6

8VS

S69

VSS7

0VS

S71

VSS7

2VS

S73

VSS7

4VS

S75

VSS7

6VS

S77

VSS7

8VS

S79

VSS8

0VS

S81

VSS8

2VS

S83

VSS8

4VS

S85

VSS8

6VS

S87

VSS8

8VS

S89

VSS9

0VS

S91

VSS9

2VS

S93

VSS9

4VS

S95

VSS9

6VS

S97

VSS9

8VS

S99

VSS1

00VS

S101

VSS1

02VS

S103

VSS1

04VS

S105

VSS1

06VS

S107

VSS1

08VS

S109

VSS1

10VS

S111

VSS1

12VS

S113

VSS1

14VS

S115

VSS1

16VS

S117

VSS1

18VS

S119

VSS1

20VS

S121

VSS1

22VS

S123

VSS1

24VS

S125

VSS1

26VS

S127

VSS1

28VS

S129

VSS1

30VS

S131

VSS1

32VS

S133

VSS1

34VS

S135

VSS1

36VS

S137

VSS1

38VS

S139

VSS1

40VS

S141

VSS1

42VS

S143

VSS1

44VS

S145

VSS1

46VS

S147

VSS1

48VS

S149

VSS1

50VS

S151

VSS1

52VS

S153

VSS1

54VS

S155

VSS1

56VS

S157

VSS1

58VS

S159

VSS1

60VS

S161

VSS1

62VS

S163

VSS1

64VS

S165

VSS1

66VS

S167

VSS1

68VS

S169

VSS1

70VS

S171

VSS1

72VS

S173

VSS1

74VS

S175

VSS1

76VS

S177

VSS1

78VS

S179

VSS1

80VS

S181

VSS1

82VS

S183

VSS1

84VS

S185

VSS1

86VS

S187

VSS1

88VS

S189

VSS1

90VS

S191

VSS1

92VS

S193

VSS1

94VS

S195

VSS1

96VS

S197

VSS1

98VS

S199

VSS2

00VS

S201

VSS2

02VS

S203

VSS2

04VS

S205

VSS2

06VS

S207

VSS2

08VS

S209

VSS2

10VS

S211

VSS2

12VS

S213

VSS2

14VS

S215

VSS2

16VS

S217

VSS2

18VS

S219

VSS2

20VS

S221

VSS2

22VS

S223

VSS2

24VS

S225

VSS2

26VS

S227

VSS2

28VS

S229

VSS2

30VS

S231

VSS2

32VS

S233

VSS2

34VS

S235

VSS2

36VS

S237

VSS2

38VS

S239

VSS2

40VS

S241

VSS2

42VS

S243

VSS2

44VS

S245

VSS2

46VS

S247

VSS2

48VS

S249

VSS2

50VS

S251

VSS2

52VS

S253

VSS2

54VS

S255

VSS2

56VS

S257

VSS2

58VS

S259

VSS2

60VS

S261

VSS2

62VS

S263

VSS2

64VS

S265

VSS2

66VS

S267

VSS2

68VS

S269

VSS2

70

C367

SC4D7U10VMX-U(R)

1 2

C285

SCD22U10V3KX

1 2

C616

SCD

22U

10V3

KX

(R)

12

C614

SCD

22U

10V3

KX 12

C354

SC4D7U10VMX-U

1 2

C366

SC4D7U10VMX-U

1 2

C356

SC4D7U10VMX-U

1 2 C286

SCD22U10V3KX

1 2

C365

SC4D7U10VMX-U

1 2

C355

SC4D7U10VMX-U(R)

1 2

C623

SC10

U10

V6KX

(R)

12

C637

SC10

U10

V6KX

(R)

12

C606

SCD

22U

10V3

KX

(R)

12

C647

SCD22U10V3KX

1 2

C648

SCD22U10V3KX

1 2

C631

SCD

22U

10V3

KX 12

C641

SC10

U10

V6KX 1

2

C636

SC10

U10

V6KX 1

2

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

93

2

Data/DM/CHECK group Layout rule :

54

DIMM Slots


DQS group Layout rule :

145

TopView


Break in/out : 15/5/15

Clock group Layout rule:20/5/5/5/20

20/15/20

DDR Socket52

Break in/out : 20/5/20

183

92

Break in/out : 15/5/15Address/Command group Layout rule :


143

DIM

MS

lot

B

DIM

MS

lot

A

6/14

6/14

6/14

6/14

J361Y RS482+M1573 1A


Custom


Unbuffered DDR 1,2

Title


Date: Sheet of

MEM_CLK_1H_H0

MEM_ADDB11MEM_ADDB11

MEM_CLK_1H_L2

MEM_ADDB13

MEM_BANKB0 MEM_BANKB0

MEM_CLK_1H_H2

MEMWPB

SMBDATSMBCLK

MEM_CLK_1H_H1

MEM_ADDB12

MEM_CLK_1H_L1

MEM_CLK_1H_L0

MEM_BANKB1MEM_BANKB1

MEM_RESET_L

MEM_DQS_UP[8..0]

MEM_CHECK_UP[7..0]

MEM_DM_UP[8..0]

MEM_DATA[127..64]

MEM_ADDB[13..0]

MEM_ADDB9MEM_ADDB9MEM_ADDB8

MEM_ADDB10MEM_ADDB10

MEM_ADDB7


MEM_ADDB6MEM_ADDB6

MEM_ADDB2


MEM_ADDB5

MEM_CHECK_UP2

MEM_CHECK_UP6

MEM_CHECK_UP4

MEM_CHECK_UP0

MEM_CHECK_UP5

MEM_CHECK_UP1

MEM_CHECK_UP3

MEM_CHECK_UP7

MEM_DATA87

MEM_DATA101

MEM_DATA88

MEM_DATA104

MEM_DATA85

MEM_DATA103

MEM_DATA93

MEM_DATA105

MEM_DATA86

MEM_DATA100

MEM_DATA95

MEM_DATA90

MEM_DATA98

MEM_DATA91

MEM_DATA99

MEM_DATA94

MEM_DATA97

MEM_DATA102

MEM_DATA96

MEM_DATA92

MEM_DATA89

MEM_DATA108MEM_DATA108






MEM_DATA114





MEM_DATA111







MEM_DATA117

MEM_DATA113

MEM_DATA110

MEM_DATA127


MEM_DATA75


MEM_DATA73


MEM_DATA72MEM_DATA71MEM_DATA71

MEM_DATA81MEM_DATA81MEM_DATA80MEM_DATA80






MEM_DATA64


MEM_DATA74



MEM_DQS_UP0MEM_DQS_UP1MEM_DQS_UP2MEM_DQS_UP2MEM_DQS_UP3

MEM_DQS_UP7MEM_DQS_UP7MEM_DQS_UP6MEM_DQS_UP6

MEM_DQS_UP4MEM_DQS_UP4MEM_DQS_UP5MEM_DQS_UP5

MEM_DM_UP2MEM_DM_UP1MEM_DM_UP1

MEM_DQS_UP8MEM_DM_UP0


MEM_DM_UP3MEM_DM_UP4


MEM_ADDA13



MEM_CHECK_LO7

MEM_DQS_LO1MEM_DQS_LO1

MEM_ADDA[13..0]



MEM_CHECK_LO5

MEM_DQS_LO8

MEM_DATA37

MEM_DATA27


MEM_DATA9

MEM_DATA48

MEM_CLK_1L_L2

MEM_DM_LO3MEM_DM_LO3

MEM_CLK_1L_H1

SMBCLK

MEM_ADDA4

MEM_ADDA8

MEM_CLK_1L_H0

MEM_BANKA0

MEM_DM_LO[8..0]

MEM_DATA33



MEMWPA

MEM_DATA2MEM_DATA2

MEM_CHECK_LO1

MEM_DATA28


MEM_DM_LO8

MEM_BANKA0MEM_DM_LO0MEM_DM_LO0



MEM_DATA8

MEM_DATA57


MEM_CLK_1L_L1


MEM_ADDA7MEM_ADDA7


MEM_ADDA11MEM_ADDA11

MEM_BANKA1

MEM_DATA47

MEM_BANKA1





MEM_DATA7

MEM_DATA46

MEM_ADDA0



MEM_DATA4



MEM_CLK_1L_H2


MEM_CHECK_LO0

MEM_ADDA3MEM_ADDA3


MEM_DATA1MEM_DATA1




MEM_DQS_LO6MEM_DQS_LO6MEM_ADDA10MEM_ADDA10



MEM_ADDA1MEM_ADDA1

MEM_CLK_1L_L0


MEM_RESET_L

MEM_DATA5MEM_DATA5






MEM_DQS_LO[8..0]

MEM_CHECK_LO4


MEM_ADDA6MEM_ADDA6

MEM_CHECK_LO6




MEM_DATA0

MEM_ADDA2





MEM_DATA24



MEM_DATA[63..0]

MEM_ADDA12



MEM_CHECK_LO2


MEM_DATA3

MEM_CHECK_LO3

MEM_DATA32

SMBDAT


MEM_DATA63

MEM_DATA49

MEM_CHECK_LO[7..0]



MEM_ADDA5

MEM_DATA6MEM_DATA6

MEM_ADDA9



MEM_DM_LO7MEM_DM_LO7MEM_CLK_1H_L1 7

MEM_CS_1H_L0 7,11

MEM_CASB_L7,11

MEM_CS_1H_L1 7,11

MEM_WEB_L7,11

MEM_CLK_1H_L0 7

MEM_CLK_1H_L2 7

MEM_RASB_L7,11

MEM_CLK_1H_H1 7

MEM_CKEC 7,11

MEM_CLK_1H_H0 7

MEM_ADDB137,11

MEM_CLK_1H_H2 7

MEM_RESET_L7

MEM_BANKB07,11

SMBDAT 24,28

MEM_BANKB17,11

SMBCLK 24,28

MEM_DQS_UP[8..0]7,11

MEM_ADDB[13..0]7,11

MEM_DATA[127..64]7,11

MEM_CHECK_UP[7..0]7,11

MEM_DM_UP[8..0]7,11

MEM_CASA_L7,11

MEM_CLK_1L_H2 7

MEM_CHECK_LO[7..0]7,11

SMBDAT 24,28

MEM_BANKA17,11

MEM_CLK_1L_L0 7

MEM_ADDA[13..0]7,11

MEM_DATA[63..0]7,11

MEM_CS_1L_L1 7,11

MEM_CKEA 7,11

SMBCLK 24,28

MEM_DQS_LO[8..0]7,11

MEM_DM_LO[8..0]7,11

MEM_ADDA137,11

MEM_CS_1L_L0 7,11

MEM_CLK_1L_H1 7MEM_CLK_1L_L1 7

MEM_CLK_1L_L2 7

MEM_RASA_L7,11

MEM_RESET_L7

MEM_CLK_1L_H0 7

MEM_WEA_L7,11

MEM_BANKA07,11

DDRVREF

DDRVREF

VCC2.5V_SUS

VCC3_3

VCC2.5V_SUS

VCC3_3

VCC2.5V_SUS

DDRVREF

VCC3_3

VCC3_3

VCC3_3

C430

SCD

01U

16V3

KX1

2

CA5SCD1U

12

C432

SC39

P

(R)12

CA6SCD1U

12

C434

SCD

01U

16V3

KX 12

C678

SCD

1U16

V3KX

(R)12

C433

SC10

00P5

0V3K

X

(R)12

C677

SC10

00P5

0V3K

X

(R)12

CN35

SKT-DIMM184-U(22.10244.291)

1

2

3

4

5

6

7

8

9

10

11

1213

14

15

1617

18

1920

21

22

2324

25

26

27

28

29

30

31

32

33

34

35

36

37

38

3940

41

42

43

4445

46

47

48

49

50

51

52

53

54

55

56

58

57

59

60

61

62

63

64

65

66

67

6869

70

71

7273

74

7576

77

78

7980

81

82

8384

85

86

8788

89

90

9192

93

9495

96

97

9899

100

101102

103

104

105106

107

108

109110

111

112

113

114

115

116

117

118 119

120

121

122

123

124

125

126127

128

129

130

131

132

133

134135

136

137138

139

140

141

142

143

144

145

146147

148

149

150151

152

153

154

155

156

157158

159

160

161162

163

164

165166

167

168

169

170171

172

173

174175

176178179

180

181182183

184

177

VREF

DQ0

VSS

DQ1

DQS0

DQ2

VDD

DQ3

NC

RES

ET_N

VSS

DQ8DQ9

DQS1

VDDQ

CK1/CK1

VSS

DQ10DQ11

CKE0

VDDQ

DQ16DQ17

DQS2

VSS

A9

DQ18

A7

VDDQ

DQ19

A5

DQ24

VSS

DQ25

DQS3

A4

VDD

DQ26DQ27

A2

VSS

A1

CB0CB1

VDD

DQS8

A0

CB2

VSS

CB3

BA1

DQ32

VDDQ

DQ33

DQS4

VSS

DQ34

BA0

DQ35

DQ40

VSDQ

/WE

DQ41

/CAS

VSS

DQS5

DQ42DQ43

VDD

NC/CS2

DQ48DQ49

VSS

/CK2CK2

VDDQ

DQS6

DQ50DQ51

VSS

VDDID

DQ56DQ57

VDD

DQS7

DQ58DQ59

VSS

WP

SDASCL

VSS

DQ4DQ5

VDDQ

DM0

DQ6DQ7

VSS

NCNC

FETE

N

VDDQ

DQ12DQ13

DM1

VDD

DQ14DQ15

CKE1

VDDQ

BA2

DQ20

A12

VSS

DQ21

A11 DM2

VDD

DQ22

A8

DQ23

VSS

A6

DQ28DQ29

VDDQ

DM3

A3

DQ30

VSS

DQ31

CB4CB5

VDDQ

CK0/CK0

VSS

DM8

A10

CB6

VDDQ

CB7

VSS

DQ36DQ37

VDD

DM4

DQ38DQ39

VSS

DQ44

/RAS

DQ45

VDDQ

/CS0/CS1

DM5

VSS

DQ46DQ47

NC/CS3

VDDQ

DQ52DQ53

A13

VDD

DM6

DQ54DQ55

VDDQ

NC

DQ60DQ61

VSSDQ62DQ63

VDDQ

SA0SA1SA2

V33

DM7

R569 4K7R31 2

R570 4K7R31 2

CN38

SKT-DIMM184-U(22.10244.291)

1

2

3

4

5

6

7

8

9

10

11

1213

14

15

1617

18

1920

21

22

2324

25

26

27

28

29

30

31

32

33

34

35

36

37

38

3940

41

42

43

4445

46

47

48

49

50

51

52

53

54

55

56

58

57

59

60

61

62

63

64

65

66

67

6869

70

71

7273

74

7576

77

78

7980

81

82

8384

85

86

8788

89

90

9192

93

9495

96

97

9899

100

101102

103

104

105106

107

108

109110

111

112

113

114

115

116

117

118 119

120

121

122

123

124

125

126127

128

129

130

131

132

133

134135

136

137138

139

140

141

142

143

144

145

146147

148

149

150151

152

153

154

155

156

157158

159

160

161162

163

164

165166

167

168

169

170171

172

173

174175

176178179

180

181182183

184

177

VREF

DQ0

VSS

DQ1

DQS0

DQ2

VDD

DQ3

NC

RES

ET_N

VSS

DQ8DQ9

DQS1

VDDQ

CK1/CK1

VSS

DQ10DQ11

CKE0

VDDQ

DQ16DQ17

DQS2

VSS

A9

DQ18

A7

VDDQ

DQ19

A5

DQ24

VSS

DQ25

DQS3

A4

VDD

DQ26DQ27

A2

VSS

A1

CB0CB1

VDD

DQS8

A0

CB2

VSS

CB3

BA1

DQ32

VDDQ

DQ33

DQS4

VSS

DQ34

BA0

DQ35

DQ40

VSDQ

/WE

DQ41

/CAS

VSS

DQS5

DQ42DQ43

VDD

NC/CS2

DQ48DQ49

VSS

/CK2CK2

VDDQ

DQS6

DQ50DQ51

VSS

VDDID

DQ56DQ57

VDD

DQS7

DQ58DQ59

VSS

WP

SDASCL

VSS

DQ4DQ5

VDDQ

DM0

DQ6DQ7

VSS

NCNC

FETE

N

VDDQ

DQ12DQ13

DM1

VDD

DQ14DQ15

CKE1

VDDQ

BA2

DQ20

A12

VSS

DQ21

A11 DM2

VDD

DQ22

A8

DQ23

VSS

A6

DQ28DQ29

VDDQ

DM3

A3

DQ30

VSS

DQ31

CB4CB5

VDDQ

CK0/CK0

VSS

DM8

A10

CB6

VDDQ

CB7

VSS

DQ36DQ37

VDD

DM4

DQ38DQ39

VSS

DQ44

/RAS

DQ45

VDDQ

/CS0/CS1

DM5

VSS

DQ46DQ47

NC/CS3

VDDQ

DQ52DQ53

A13

VDD

DM6

DQ54DQ55

VDDQ

NC

DQ60DQ61

VSSDQ62DQ63

VDDQ

SA0SA1SA2

V33

DM7

R572

100R

3F1

2

C435

SCD

047U

10V2

KX

(R)12

R571

100R

3F1

2

WWW.AliSaler.Com

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Address/Command group Layout rule :

DQS group Layout rule :

Channel B

Data/DM/CHECK group Layout rule :

Motherboard trace routing : 10/10/10Break in/out : 15/5/15

Break in/out : 20/5/20Motherboard trace routing : 20/15/20

Break in/out : 15/5/15DDR Termination


Channel A

MEM_CKB unused

MEM_CKD unused

MEM_CS_2H_L1MEM_CS_2H_L0

MEM_CS_2L_L1MEM_CS_2L_L0

unsed

unsed

Place at either end of VTT island

Place between CPU and DIMMs

Place between CPU and DIMMs

J361Y RS482+M1573 1A


Custom


DDR termination

Title


Date: Sheet of

MEM_DATA81

MEM_DQS_UP0

MEM_DATA69

MEM_DQS_UP5

MEM_DATA101

MEM_RASB_L

MEM_DATA111

MEM_DATA113

MEM_CHECK_UP0

MEM_DATA127

MEM_DM_UP8

MEM_DQS_UP2

MEM_DATA66

MEM_DATA99

MEM_WEB_L

MEM_DATA125

MEM_DATA84

MEM_ADDB2 MEM_BANKB0MEM_CHECK_UP4

MEM_ADDB3

MEM_DATA82


MEM_CHECK_UP7

MEM_ADDB8

MEM_DATA91

MEM_DATA105

MEM_DATA103

MEM_DATA121

MEM_DQS_UP4

MEM_DM_UP7

MEM_CHECK_UP[7..0]

MEM_CS_1H_L0

MEM_DM_UP2


MEM_CASB_L

MEM_CHECK_UP2

MEM_DATA75

MEM_DATA89

MEM_WEB_L

MEM_DATA114

MEM_DATA70

MEM_DATA115

MEM_DM_UP[8..0]

MEM_ADDB0

MEM_DATA74

MEM_DATA97

MEM_DATA109

MEM_DATA83

MEM_CKEC

MEM_DATA123

MEM_DATA117

MEM_RASB_L

MEM_CHECK_UP1MEM_CS_1H_L0

MEM_DATA90

MEM_DQS_UP8

MEM_DATA116

MEM_ADDB6MEM_ADDB5

MEM_ADDB12

MEM_DATA108MEM_ADDB9

MEM_DATA[127..64]

MEM_DQS_UP[8..0]

MEM_BANKB0

MEM_ADDB[13..0]

MEM_DATA104

MEM_CS_1H_L1

MEM_DATA85

MEM_BANKB1

MEM_DM_UP5

MEM_DM_UP4

MEM_DATA93

MEM_ADDB7

MEM_DATA65

MEM_CASB_LMEM_CHECK_UP6

MEM_DQS_UP3

MEM_DATA106

MEM_DATA86

MEM_DATA94

MEM_DATA73

MEM_DATA112

MEM_DATA122

MEM_DATA80

MEM_CS_1H_L1

MEM_DATA96

MEM_DATA124


MEM_DATA100MEM_CKEC

MEM_DATA95 MEM_ADDB13

MEM_DATA120

MEM_DM_UP0MEM_ADDB11

MEM_ADDB10

MEM_DATA52

MEM_ADDA2

MEM_DATA42

MEM_RASA_L

MEM_DATA5

MEM_DATA36

MEM_DATA34

MEM_DATA35

MEM_DQS_LO2

MEM_CKEA

MEM_DATA53

MEM_DQS_LO7

MEM_DATA45

MEM_DATA13

MEM_DM_LO4

MEM_DQS_LO0

MEM_CASA_L

MEM_DATA54

MEM_CHECK_LO6

MEM_DATA59

MEM_DATA31

MEM_DATA33

MEM_DATA[63..0]

MEM_DATA15

MEM_DQS_LO3

MEM_CHECK_LO[7..0]

MEM_DM_LO7

MEM_ADDA7MEM_WEA_L

MEM_DATA49

MEM_DATA9

MEM_CHECK_LO3

MEM_ADDA0

MEM_CASA_LMEM_DATA57

MEM_DATA40

MEM_DM_LO0

MEM_DATA51

MEM_CKEA

MEM_DATA28


MEM_DATA30

MEM_ADDA5

MEM_BANKA0

MEM_DATA16

MEM_DATA20

MEM_DATA62

MEM_ADDA1

MEM_DATA12

MEM_CHECK_LO1

MEM_ADDA9

MEM_DATA7

MEM_DATA41

MEM_DATA0

MEM_DATA8 MEM_ADDA8

MEM_DM_LO8


MEM_CHECK_LO0

MEM_ADDA12

MEM_CHECK_LO4

MEM_DATA17

MEM_DM_LO6

MEM_BANKA1

MEM_DM_LO1

MEM_DATA60

MEM_DATA56

MEM_ADDA[13..0]

MEM_ADDA4

MEM_CKEA

MEM_DATA26

MEM_DATA39

MEM_DM_LO2

MEM_DATA38

MEM_CS_1L_L1

MEM_DATA37

MEM_DATA1

MEM_DQS_LO4

MEM_DATA10

MEM_DATA46

MEM_ADDA10

MEM_DATA14

MEM_DATA4

MEM_CS_1L_L0

MEM_DATA24

MEM_DATA2MEM_DM_LO[8..0]

MEM_DATA32

MEM_DQS_LO[8..0]

MEM_BANKA0

MEM_DATA11

MEM_DATA19

MEM_DATA50

MEM_DQS_LO6MEM_CHECK_LO5

MEM_DATA44

MEM_DATA21

MEM_ADDA6

MEM_ADDA11

MEM_DATA6

MEM_DATA58

MEM_RASA_LMEM_CS_1L_L0

MEM_DQS_LO8

MEM_ADDA13

MEM_DQS_LO1

MEM_DATA25

MEM_CHECK_LO2

MEM_DATA61

MEM_DATA22

MEM_CS_1L_L1

MEM_DATA55

MEM_DATA23

MEM_CHECK_LO7

MEM_DATA43

MEM_DATA18

MEM_DM_LO3

MEM_ADDA3

MEM_BANKA1

MEM_DATA3

MEM_DATA27

MEM_WEA_L

MEM_CASA_L

MEM_BANKA1

MEM_CS_1L_L0

MEM_RASA_L

MEM_BANKA0

MEM_WEA_L

MEM_CS_1L_L1

MEM_ADDA12

MEM_ADDA11

MEM_ADDA0

MEM_ADDA8

MEM_ADDA9

MEM_ADDA1

MEM_ADDA13

MEM_ADDA4

MEM_ADDA7

MEM_ADDA5

MEM_ADDA6

MEM_ADDA2

MEM_ADDA3

MEM_ADDA10

MEM_BANKB0

MEM_RASB_L

MEM_ADDB4

MEM_BANKB1

MEM_ADDB8MEM_CS_1H_L0

MEM_ADDB3

MEM_ADDB6

MEM_ADDB2

MEM_ADDB9

MEM_CASB_L

MEM_ADDB11

MEM_ADDB1

MEM_ADDB7

MEM_ADDB12

MEM_ADDB5

MEM_ADDB10

MEM_ADDB0

MEM_WEB_L

MEM_CKEC

MEM_ADDB13

MEM_CS_1H_L1


MEM_DATA119MEM_DQS_UP6

MEM_CHECK_UP3MEM_BANKB1 MEM_DATA126

MEM_DQS_UP7


MEM_DM_UP3MEM_ADDB4



MEM_DM_UP1MEM_DQS_UP1

MEM_CHECK_UP5MEM_ADDB1

MEM_DM_LO5MEM_DQS_LO5

MEM_DM_UP6MEM_DATA118


MEM_BANKB07,10

MEM_DQS_UP[8..0]7,10

MEM_BANKB17,10

MEM_ADDB[13..0]7,10

MEM_CKEC7,10

MEM_DATA[127..64]7,10

MEM_RASB_L7,10

MEM_CS_1H_L17,10

MEM_CHECK_UP[7..0]7,10

MEM_DM_UP[8..0]7,10

MEM_CS_1H_L07,10

MEM_WEB_L7,10MEM_CASB_L7,10

MEM_DATA[63..0]7,10

MEM_DQS_LO[8..0]7,10

MEM_CKEA7,10

MEM_DM_LO[8..0]7,10

MEM_CASA_L7,10

MEM_CS_1L_L07,10

MEM_ADDA[13..0]7,10

MEM_BANKA17,10

MEM_CHECK_LO[7..0]7,10

MEM_RASA_L7,10

MEM_BANKA07,10

MEM_CS_1L_L17,10

MEM_WEA_L7,10

DDR_VTT DDR_VTTDDR_VTT DDR_VTTDDR_VTT

DDR_VTTDDR_VTT DDR_VTTDDR_VTTDDR_VTT

DDR_VTT

DDR_VTT

VCC2.5V_SUS

RN38

SRN47-10402

1234 5

678

C382 SC22P

(R)1 2

C479

SCD1U

1 2

C370 SC22P

(R)1 2

RN65

SRN47-10402

12345

678

C474

SCD1U

1 2

RN17

SRN47-10402

1234 5

678

RN31

SRN47-10402

1234 5

678

C485

SCD1U

1 2

C376 SC22P

(R)1 2

C347

(R)

SC22P1 2

C330 SC22P

(R)1 2

C334 SC22P

(R)1 2

C480

SCD1U

1 2

C362 SC22P

(R)1 2

C463

SCD1U

1 2

C332 SC22P

(R)1 2

C478

SCD1U

1 2

C378 SC22P

(R)1 2

C429

SCD1U

1 2

C491

SCD1U

1 2

C379 SC22P

(R)1 2

C453

SCD1U

1 2

C461

SCD1U

1 2

TC65

E220U10VM-2(R)

1 2

C374 SC22P

(R)1 2

RN57

SRN47-10402

12345

678

C381 SC22P

(R)1 2

RN59

SRN47-10402

12345

678

C333 SC22P

(R)1 2

C489

SCD1U

1 2

C440

SCD1U

1 2

C386 SC22P

(R)1 2

RN26

SRN47-10402

1234 5

678

C342 SC22P

(R)1 2

C442

SCD1U

1 2

RN20

SRN47-10402

1234 5

678

C431

SCD1U

1 2

C454

SCD1U

1 2

RN64

SRN47-10402

12345

678

RN72

SRN47-10402

12345

678

RN42

SRN47-10402

1234 5

678

RN27

SRN47-10402

1234 5

678

RN19

SRN47-10402

1234 5

678

C329 SC22P

(R)1 2

RN41

SRN47-10402

1234 5

678

C459

SCD1U

1 2

C346 SC22P

(R)1 2

RN50

SRN47-10402

12345

678

RN54

SRN47-10402

12345

678

C471

SCD1U

1 2

C439

SCD1U

1 2

RN69

SRN47-10402

12345

678

RN70

SRN47-10402

12345

678

C498

SCD1U

1 2

C339 SC22P

(R)1 2

RN36

SRN47-10402

1234 5

678

RN40

SRN47-10402

1234 5

678

C372 SC22P

(R)1 2

C450

SCD1U

1 2

RN71

SRN47-10402

12345

678

RN32

SRN47-10402

1234 5

678

C477

SCD1U

1 2

C476

SCD1U

1 2

RN46

SRN47-10402

12345

678

RN30

SRN47-10402

1234 5

678

RN58

SRN47-10402

12345

678

C488SC10U10V5KX

12

RN52

SRN47-10402

12345

678

C499

SCD1U

1 2

C341 SC22P

(R)1 2

C464

SCD1U

1 2

C371 SC22P

(R)1 2

RN63

SRN47-10402

12345

678

C384 SC22P

(R)1 2

RN47

SRN47-10402

12345

678

RN21

SRN47-10402

1234 5

678

C456

SCD1U

1 2

RN29

SRN47-10402

1234 5

678

C481

SCD1U

1 2

C343 SC22P

(R)1 2

RN28

SRN47-10402

1234 5

678

RN35

SRN47-10402

1234 5

678

C472

SCD1U

1 2

C441

SCD1U

1 2

C338 SC22P

(R)1 2

C483

SCD1U

1 2

C389 SC22P

(R)1 2

C388 SC22P

(R)1 2

RN43

SRN47-10402

1234 5

678

C486

SCD1U

1 2

C490

SCD1U

1 2

RN68

SRN47-10402

12345

678

C444

SCD1U

1 2

C496

SCD1U

1 2

C375 SC22P

(R)1 2

C500SC10U10V5KX

12

C437

SCD1U

1 2

C438

SCD1U

1 2

C380 SC22P

(R)1 2

C331 SC22P

(R)1 2

C335 SC22P

(R)1 2

C447

SCD1U

1 2

RN61

SRN47-10402

12345

678

RN67

SRN47-10402

12345

678

RN44

SRN47-10402

12345

678

C345 SC22P

(R)1 2

C445

SCD1U

1 2

RN56

SRN47-10402

12345

678

C451

SCD1U

1 2

C377 SC22P

(R)1 2

C462

SCD1U

1 2

RN22

SRN47-10402

1234 5

678

C344 SC22P

(R)1 2

RN33

SRN47-10402

1234 5

678

C492

SCD1U

1 2

C364 SC22P

(R)1 2

C373 SC22P

(R)1 2

C449

SCD1U

1 2

C452

SCD1U

1 2

C337 SC22P

(R)1 2

C487

SCD1U

1 2

RN55

SRN47-10402

12345

678

C457

SCD1U

1 2

C473

SCD1U

1 2

C460

SCD1U

1 2

C501SC10U10V5KX

12

C448

SCD1U

1 2

RN45

SRN47-10402

12345

678

RN39

SRN47-10402

1234 5

678

C475

SCD1U

1 2

RN34

SRN47-10402

1234 5

678

C495

SCD1U

1 2

RN62

SRN47-10402

12345

678

RN37

SRN47-10402

1234 5

678

C484

SCD1U

1 2

C458

SCD1U

1 2C383 SC22P

(R)1 2

C494

SCD1U

1 2

RN15

SRN47-10402

1234 5

678

C340 SC22P

(R)1 2

C369

(R)

SC22P1 2

C363 SC22P

(R)1 2

C351 SC22P

(R)1 2

RN23

SRN47-10402

1234 5

678

C336 SC22P

(R)1 2

C443

SCD1U

1 2

RN60

SRN47-10402

12345

678

C455

SCD1U

1 2

RN25

SRN47-10402

1234 5

678

RN24

SRN47-10402

1234 5

678

RN18

SRN47-10402

1234 5

678

RN51

SRN47-10402

12345

678

C497

SCD1U

1 2

RN49

SRN47-10402

12345

678

RN48

SRN47-10402

12345

678

RN66

SRN47-10402

12345

678

C390 SC22P

(R)1 2

RN16

SRN47-10402

1234 5

678

RN53

SRN47-10402

12345

678

C482

SCD1U

1 2

C385 SC22P

(R)1 2

C493

SCD1U

1 2

C446

SCD1U

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NB/RS482M HT IF & DVO Bus

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Dedicated for DAC POWER

DAC Bandgap Reference Voltage

POWER for PLL

POWER for HT I/F PLL

3.3V I/O Power

PCIE 16X diff CLK

A-Link diff CLK

HT 66MHz Ref Clk

NOTE: Provide access to STRAP_DATA and I2C_SCL pinsis MANDATORY.

For LVDS PLL

For LVDS Analog power

NB/RS482M DAC/LVDS/CLK/PM

10/10/10

Guard Trace for TV-outand RGB signals

20/5/7/5/20

For LVDS Digital power

HW Strapping SettingDFT_GPIO1(LOAD_ROM_STRAPS#): High-not connected EEPROM (Default)

Low-load strap values from EEPROMDFT_GPIO2(HT_Width_Override): High-8 bit link (default)

Low-for testing onlyDFT_GPIO[4..3](Overrides HT Freq): 11-200MHz(Default)

DFT_GPIO5(LOAD_MEM_STRAPS#): 0-capture DVO pins for debug bus straps.1-Use Default Values

Internal pull high

Modify 0506

J361Y RS482+M1573 1A

RS482M-DAC/LVDS/MIS/CLK/PM


Custom


Title


Date: Sheet of

AVSSQ

DAC_RSET

AVDDQ

NB_DDC_CLKNB_DDC_DATA

PLLVDDPLLVSS

HTPVDDHTPVSS

PLLVDD

HTPVSS

VDDR3

NB_OSCOUT

LOAD_ROM_STRAPS#

BMREQb

DFT_GPIO3

I2C_SCLI2C_SDA

I2C_SCL

I2C_SDA

NB_THRMDANB_THRMDC

STRP_DATA

I2C_SCLSTRP_DATA

LPVDD

LPVDD

LVDDR18ALVDDR18A

LVDDR18A

AVSSN

AVDD

VDDR3

TMDS_HPD

PLLVSS

HTPVDD

AVSSDI

LOAD_MEM_STRAPS#

LVDDR18D

LPVSSLVDDR18D

LPVSS

AVDDDI

NB_DDC_CLKNB_DDC_DATA

AVDD

AVSSN

AVDDQ

AVSSQ

TVCLKIN

Y_OUT18

GOUT19

COMP_OUT18

DAC_HSYNC19

BOUT19

DAC_VSYNC19

ROUT19

C_OUT18

NB_DDC_DATA19NB_DDC_CLK19

RS482_RST#20NB_PWRGD16,47

LDTSTOP_L8,47ALLOW_LDTSTOP20

NB_OSCIN24

BMREQ#21

DFT_GPIO3 18

I2C_SCL17,18I2C_SDA18

DDC_DATA 17

GFX_CLKN 24GFX_CLKP 24

SB_CLKN 24SB_CLKP 24

HTREFCLK 24

LVDS_TXU2N 16

LVDS_TXL1N 16

LVDS_TXU0N 16

LVDS_TXUCKP 16LVDS_TXUCKN 16

LVDS_TXU3N 16

LVDS_TXU1N 16

LVDS_TXL2P 16

LVDS_TXL3N 16

LVDS_TXLCKP 16

LVDS_TXL1P 16LVDS_TXL0N 16

LVDS_TXL3P 16LVDS_TXL2N 16

LVDS_TXU2P 16

LVDS_TXU1P 16

LVDS_TXL0P 16

LVDS_TXU3P 16

LVDS_TXU0P 16

LVDS_TXLCKN 16

LVDS_DIGON 16LVDS_BLON 16LVDS_BLEN

DVO_HTPLG 17

DFT_GPIO218

TVCLKIN18

NB_THRMDA28NB_THRMDC28

VCC3_3

VDD18

VCC3_3

VCC3_3

VCC3_3

VCC18_RUN

VCC18_RUN

VCC18_RUN

VCC18_RUN

VCC18_RUN

VCC18_RUN

VCC3_3

R240 33R3SSPC

1 2

C544

SC

1U10

V3Z

Y 12

R204 10KR3(R) 1 2

G10

COPPER-CLOSE

1 2

U22

AT24C04N-10SC(R)

1234 5

678A0

A1A2GND SDA

SCLWP

VCC

C150

SCD1U

12

L80

MLB-201209-9-GP1 2

C136

SC

D01

U25

V2K

X1

2

L31

MLB-201209-9-GP1 2

C540

SC

D01

U25

V2K

X1

2

C134

SCD1U

12

R225 4K7R31 2

R237 3KR3

(R)1 2

C553

SCD1U

12

G7

COPPER-CLOSE

1 2

C560

SC

1U10

V3Z

Y 12

R608 4K7R31 2

C135

SC

1U10

V3Z

Y 12

L24

MLB-201209-9-GP1 2

C167

SC

2D2U

10V

3ZY 1

2

G6

COPPER-CLOSE

1 2

R661 0R3-U(R)

1 2

R239 10KR3(R)

1 2G15

COPPER-CLOSE

1 2

R665 10KR31 2

R216 2KR31 2

C153

SC

D01

U25

V2K

X1

2

R238 3KR3(R)

1 2

C689

SC

10U

10V

5ZY 1

2

L79

MLB-201209-9-GP1 2

L19

MLB-201209-9-GP1 2

TP32TPAD28

G8

COPPER-CLOSE

1 2

C690

SC

10U

10V

5ZY 1

2

L27

MLB-201209-9-GP1 2

R609 4K7R31 2

L30

MLB-201209-9-GP1 2

R654 715R3F1 2

R223 2KR3(R) 1 2

C570

SC

1U10

V3Z

Y 12

L20

MLB-201209-9-GP1 2

PART 4 OF 6

PM

CLOCKs

LVD

S

CR

T/TV

OU

TPL

LPW

R

MIS.

U28D

RS482M(L/71.RS482.D0U,S/71.RS482.E0U)

B27C27D26D25C24B24

E24D24

B25A25A24

C25A26B26

A11B11C26E11F11

A14B14

M23L23

D14B15B12C12AH4

H13H12

A13B13

B9

F12E13D13

F10C10C11AF4AE4

D18C18B19A19D19C19D20C20

B16A16D16C16B17A17E17D17

B20A20B18C17

E18F17E19G20H20

G19E20F20H18G18F19H19F18

E14F14F13

B8A8

P23N23

E8E7

C13C14C15

A10

E10

B10

E12

AVDD1AVDD2AVSSN1AVSSN2AVDDDIAVSSDI

AVDDQAVSSQ

CYCOMP

REDGREENBLUE

DAC_VSYNCDAC_HSYNCRSETDAC_SCLDAC_SDA

PLLVDDPLLVSS

HTPVDDHTPVSS

SYSRESET#POWERGOODLDTSTOP#ALLOW_LDTSTOPNC

VDDR3_1VDDR3_2

OSCINOSCOUT

TVCLKIN

DFT_GPIO0DFT_GPIO1DFT_GPIO2

BMREQ#I2C_CLKI2C_DATATHERMALDIODE_PTHERMALDIODE_N

TXOUT_U0PTXOUT_U0NTXOUT_U1PTXOUT_U1NTXOUT_U2PTXOUT_U2NTXOUT_U3PTXOUT_U3N

TXOUT_L0PTXOUT_L0NTXOUT_L1PTXOUT_L1NTXOUT_L2PTXOUT_L2NTXOUT_L3PTXOUT_L3N

TXCLK_UPTXCLK_UNTXCLK_LPTXCLK_LN

LPVDDLPVSS

LVDDR18DLVDDR18A_1LVDDR18A_2

LVSSR1LVSSR2LVSSR3LVSSR4LVSSR5LVSSR6LVSSR7LVSSR8

LVDS_DIGONLVDS_BLONLVDS_BLEN

GFX_CLKPGFX_CLKN

HTTSTCLKHTREFCLK

SB_CLKPSB_CLKN

DFT_GPIO3DFT_GPIO4DFT_GPIO5

TMDS_HPD

STRP_DATA

DDC_DATA

TESTMODER236 4K7R31 2

R224 4K7R31 2

C161

SC

1U10

V3Z

Y 12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Modify 0422

J361Y RS482+M1573 1A

RS482M-DAC/LVDS/MIS/CLK/PM


Custom


Title


Date: Sheet of

A_RX_P2A_RX_N2

A_RX_P3A_RX_N3

A_RX_P0A_RX_N0

A_RX_P1A_RX_N1

A_NB_TX_P2A_NB_TX_N2




PCE_ISETPCE_TXISET

PCE_PCALPCE_NCAL

A_RX_N2A_RX_P2

A_RX_P3A_RX_N3

A_RX_N0

A_RX_N1

A_RX_P0

A_RX_P1

A_TX_P0 20

A_TX_P1 20

A_TX_P2 20

A_TX_P3 20

A_TX_N0 20

A_TX_N1 20

A_TX_N2 20

A_TX_N3 20

A_RX_P020

A_RX_P120

A_RX_P220

A_RX_P320

A_RX_N020

A_RX_N120

A_RX_N220

A_RX_N320

VDDA12

TP10TPAD28

C232 SCD1U16V3KX1 2

TP12TPAD28

TP14TPAD28

TP8TPAD28

C201 SCD1U16V3KX (R)1 2

C219 SCD1U16V3KX1 2

TP16TPAD28

PART 2 OF 6

PC

IEI/F

TOV

IDE

O

PCIE I/F TO SB

PCIE I/F TO SLOT

U28B

RS482M(L/71.RS482.D0U,S/71.RS482.E0U)

D8D7D5D4E4F4G5G4H4J4H5H6G1G2K5K4L4M4N5N4P4R4P5P6P2R2T5T4U4V4

W1W2

AE1AE2

AB2AC2

AB5AB4

Y4AA4

AG1AH1

AC5AC6

AH3AJ3

AH2AJ2

AF2AG2

AC4AD4

AD2AD1

AA1AB1

Y5Y6

W5W4

A7B7B6B5A5A4B3B2C1D1D2E2F2F1H2J2J1K1K2L2M2M1N1N2R1T1T2U2V2V1Y2AA2

GFX_RX0PGFX_RX0NGFX_RX1PGFX_RX1NGFX_RX2PGFX_RX2NGFX_RX3PGFX_RX3NGFX_RX4PGFX_RX4NGFX_RX5PGFX_RX5NGFX_RX6PGFX_RX6NGFX_RX7PGFX_RX7NGFX_RX8PGFX_RX8NGFX_RX9PGFX_RX9NGFX_RX10PGFX_RX10NGFX_RX11PGFX_RX11NGFX_RX12PGFX_RX12NGFX_RX13PGFX_RX13NGFX_RX14PGFX_RX14NGFX_RX15PGFX_RX15N

GPP_RX0P/SB_RX2PGPP_RX0N/SB_RX2N

GPP_RX1P/SB_RX3PGPP_RX1N/SB_RX3N

GPP_RX2PGPP_RX2N

GPP_RX3PGPP_RX3N

SB_RX0PSB_RX0N

SB_RX1PSB_RX1N

PCE_ISETPCE_TXISET

PCE_PCALPCE_NCAL

SB_TX0PSB_TX0N

SB_TX1PSB_TX1N

GPP_TX0P/SB_TX2PGPP_TX0N/SB_TX2N

GPP_TX1P/SB_TX3PGPP_TX1N/SB_TX3N

GPP_TX2PGPP_TX2N

GPP_TX3PGPP_TX3N

GFX_TX0PGFX_TX0NGFX_TX1PGFX_TX1NGFX_TX2PGFX_TX2NGFX_TX3PGFX_TX3NGFX_TX4PGFX_TX4NGFX_TX5PGFX_TX5NGFX_TX6PGFX_TX6NGFX_TX7PGFX_TX7NGFX_TX8PGFX_TX8NGFX_TX9PGFX_TX9N

GFX_TX10PGFX_TX10NGFX_TX11PGFX_TX11NGFX_TX12PGFX_TX12NGFX_TX13PGFX_TX13NGFX_TX14PGFX_TX14NGFX_TX15PGFX_TX15N

TP7TPAD28

C197 SCD1U16V3KX (R)1 2

C215 SCD1U16V3KX1 2

TP3TPAD28

R373 10KR31 2

C208 SCD1U16V3KX (R)1 2

R351 150R3F1 2

TP4TPAD28

C210 SCD1U16V3KX (R)1 2

R374 8K25R3F1 2

R363 82D5R2F1 2

C222 SCD1U16V3KX1 2

WWW.AliSaler.Com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OFF

OFF

OFF

THE CAPS SHOULD PLACE UNDER NB, ALLGND USE COPPER FLOOD TOGETHER, ANDNB POWER VIA TREAT AS SAME.

ON

OFF

ON

ON

OFF

AVDD

S1

OFF

OFF

ON

VDDC

OFF

ON OFF

ON

ON

ON

AVDDDI

VDDR3

OFF

ON

OFF

VDDA12

ON

OFF

OFF

ON

ON

ON OFF

VDDHT

OFF

ON

OFF

NB RS482M POWER STATES

ON

ON

OFF

VDD18

ON

ON

OFF

ON

OFF

OFF

OFF

OFF

ON

OFF

Power Signal

ON

VDDR,VDDRCK

ON

OFF

OFF

VDDA18

LVDDR18D

ON

OFF

S4/S5

OFF

OFF

OFF

G3

ON

ON

LPVDD

PUT DECOUPLING CAPS ON THE TOP,CLOSE TO BALLS.CONNECT VSSA22,VSSA59, VSS30,VSS89 to the ground.

OFFOFF

ON

HTPVDD

OFF

ON

OFF

ON

OFF

S3

OFF

S0

OFF

LVDDR18A

ON

OFF

OFF

OFF

OFFPLLVDD

OFF

I/O Transform Power for CPU and GPIO

Imin 1A(NB+CPU)

NB Heat Sink Clip

RS482A11

RS482A12 and later

L43

L42

DNI

DNIMount

Mount

Modify 0422

Modify 0504

J361Y RS482+M1573 1A

RS482M-POWER & GND


Custom


Title


Date: Sheet of

VS

S30

VDD_HT30

VDDA12_13

VDDA18_13

VDD_DVO

VSS30

VDDA18_13VDDA18

VSSA59

VSS89

VDDA12

VS

S89

VDD_HT31

VDD_HT31

VDD_CORE_NB

VS

SA

22

VS

SA

59

VDD_HT30

VSSA22

VDDA12_13

VCC12_RUN

VDDA18

VCC18_RUN

VDD18

VCC18_RUN

VCC12_RUN

VLDT

VCC12_RUN

VDDA12

VCC18_RUN

VCC3_3

VDD_DVO

C599

SCD1U

12

POW

ER

PART 5 OF 6U28E

RS482M

N27U27V27G27V24H27K24

AB24P27J27

AA27K27P24

AB27AB23

V23G23E23

W23K23J23H23U23

AA23D23F23C23B23A23A29

AC30

AK23AK28AK11AK4

AE30AC14AD12AC18AC20AD10AD14AD15AD20AC10AD18AC12AD22AC22AH15

H15AC17AC15

B21C21A22B22C22F21F22E21G21

H9AA7G9U8N7N8U7F9AA8G8G7J8J7B1AG4R8AC8AC7AF6AE6L8W8W7L7R7AF5AK2N16M13M15W16N18P19N12P15N14M17T19G22R12P13R14V19R18U16U12T13U14T17U18E22R16V13T15P17W18D22W12V15W14V17M19H22H21D21

VDD_HT1VDD_HT2VDD_HT3VDD_HT4VDD_HT5VDD_HT6VDD_HT7VDD_HT8VDD_HT9VDD_HT10VDD_HT11VDD_HT12VDD_HT13VDD_HT14VDD_HT15VDD_HT16VDD_HT17VDD_HT18VDD_HT19VDD_HT20VDD_HT21VDD_HT22VDD_HT23VDD_HT24VDD_HT25VDD_HT26VDD_HT27VDD_HT28VDD_HT29VDD_HT30VDD_HT31

VDD_DVO_1VDD_DVO_2VDD_DVO_3VDD_DVO_4VDD_DVO_5VDD_DVO_6VDD_DVO_7VDD_DVO_8VDD_DVO_9VDD_DVO_10VDD_DVO_11VDD_DVO_12VDD_DVO_13VDD_DVO_14VDD_DVO_15VDD_DVO_16VDD_DVO_17VDD_DVO_18VDD_DVO_19

VDD_18_1VDD_18_2VDD_18_3

VDD_CORE47VDD_CORE46VDD_CORE45VDD_CORE44VDD_CORE43VDD_CORE42VDD_CORE41VDD_CORE40VDD_CORE39

VDDA_12_14VDDA_12_1VDDA_12_2VDDA_12_3VDDA_12_4VDDA_12_5VDDA_12_6VDDA_12_7VDDA_12_8VDDA_12_9

VDDA_12_10VDDA_12_11VDDA_12_12VDDA_12_13VDDA_18_1

VDDA_18PLL_1VDDA_18_2VDDA_18_3VDDA_18_4VDDA_18_5

VDDA_18PLL_2VDDA_18PLL_3

VDDA_18_6VDDA_18_7VDDA_18_8VDDA_18_9

VDDA_18_10VDD_CORE1VDD_CORE2VDD_CORE3VDD_CORE4VDD_CORE5VDD_CORE6VDD_CORE7VDD_CORE8VDD_CORE9

VDD_CORE10VDD_CORE11VDD_CORE12VDD_CORE13VDD_CORE14VDD_CORE15VDD_CORE16VDD_CORE17VDD_CORE18VDD_CORE19VDD_CORE20VDD_CORE21VDD_CORE22VDD_CORE23VDD_CORE24VDD_CORE25VDD_CORE26VDD_CORE27VDD_CORE28VDD_CORE29VDD_CORE30VDD_CORE31VDD_CORE32VDD_CORE33VDD_CORE34VDD_CORE35VDD_CORE36VDD_CORE37VDD_CORE38

C591

SCD1U

12

L34

MLB-201209-8-GP1 2

C256

SC10U10V5KX

12

C615

SCD1U

12

C598

SCD1U

12

CN20

FOX-CON2-5

12

C602

SCD1U

12

C626

SCD1U

12

C539

SC

10U

10V

5KX

12

C186

SC

10U

10V

5ZY

12

C572

SCD1U

12

C593

SCD1U

12

CN30

FOX-CON2-5

12

C634

SC

10U

10V

5KX

12

C565

SCD1U

12

C600

SCD1U

12

C585

SCD1U

12

C577

SCD1U

12

C162

SC4D7U10V5ZY

12

CN31

FOX-CON2-5

(R)12

C251

SCD1U

12

L43

MLB-201209-9-GP1 2

GROUND

PAR

6O

F6

U28F

RS482M

G10

G12

AD

29A

D27

AC

27G

15G

14Y

2 4G

1 3E

9D

15D

9A

D9

G11

F16

G30

AB

28A

B2 5

D12

AD

24A

A28

G1 7

Y2 3

AC

9R

1 9Y

27C

2 8G

16F

25B

3 0T

24F

2 6W

27D

11H

1 1A

D25

H1 7

H10

H16

H1 4

E16

D1 0

E15

F15

U1 5

V14

R15

T1 4

N15

V1 2

N13

P14

U1 7

T16

R17

P12

T1 2

R13

W13

W17

P18

V1 8

M1 8

U13

N17

W1 5

V16

T18

M14

M1 2

M16

P16

U19

AC

16A

G18

AC

23A

D8

AD

11A

D13

AD

16A

D19

AD

23A

G5

AG

6A

G21

AD

17A

G15

AG

12A

F30

AG

24A

G9

AC

19A

G27

AC

11A

D7

AJ3

0A

C21

AK

5A

K10

AC

13A

D21

AK

2 2A

K29

W19

AE

26A

E2 7

T27

R27

AD

28F

24F

27G

28

R5

AE

5V

5N

3F

7F

5R

3A

A6

T3

M6

C5

F8

M8

Y8

V3

C3

W3

K8

D3

C6

AA

3A

2A

B3

P8

J6 C8

AD

3V

8F

3A

E3

AF

3M

5A

B7

G3

B4

P7

AA

5C

9C

7J5 R

6J3 A

D5

D6

C4

K3

AB

8T

7Y

7A

D6

K7

H7

M3

V6

H8

C2

AG

3L6 A

J 1M

7V

7F

6E

6U

5U

6E

5L5 T

8

F28

H28

M24

J28

N19

K28

T23

L27

M27

H24

N2 8

P2 5

P28

E26

K25

U2 8

V25

V28

R23

VS

S1

VS

S2

VS

S3

VS

S4

VS

S5

VS

S6

VS

S7

VS

S8

VS

S9

VS

S10

VS

S11

VS

S12

VS

S13

VS

S14

VS

S15

VS

S16

VS

S17

VS

S18

VS

S19

VS

S20

VS

S21

VS

S22

VS

S23

VS

S24

VS

S25

VS

S26

VS

S27

VS

S28

VS

S29

VS

S30

VS

S31

VS

S32

VS

S33

VS

S34

VS

S35

VS

S36

VS

S37

VS

S38

VS

S39

VS

S40

VS

S41

VS

S42

VS

S43

VS

S44

VS

S45

VS

S46

VS

S47

VS

S48

VS

S49

VS

S50

VS

S51

VS

S52

VS

S53

VS

S54

VS

S55

VS

S56

VS

S57

VS

S58

VS

S59

VS

S60

VS

S61

VS

S62

VS

S63

VS

S64

VS

S65

VS

S66

VS

S67

VS

S68

VS

S69

VS

S70

VS

S71

VS

S72

VS

S73

VS

S74

VS

S75

VS

S76

VS

S77

VS

S78

VS

S79

VS

S80

VS

S81

VS

S82

VS

S83

VS

S84

VS

S85

VS

S86

VS

S87

VS

S88

VS

S89

VS

S90

VS

S91

VS

S92

VS

S93

VS

S94

VS

S95

VS

S96

VS

S97

VS

S98

VS

S99

VS

S10

0V

SS

101

VS

S10

2V

SS

103

VS

S1 0

4V

SS

105

VS

S10

6

VS

S10

7V

SS

108

VS

S10

9V

SS

110

VS

S11

1V

SS

112

VS

SA

1V

SS

A2

VS

SA

3V

SS

A4

VS

SA

5V

SS

A6

VS

SA

7V

SS

A8

VS

SA

9V

SS

A10

VS

SA

11V

SS

A12

VS

SA

13V

SS

A14

VS

SA

15V

SS

A16

VS

SA

17V

SS

A18

VS

SA

19V

SS

A20

VS

SA

21V

SS

A22

VS

SA

23V

SS

A24

VS

SA

25V

SS

A26

VS

SA

27V

SS

A28

VS

SA

29V

SS

A30

VS

SA

31V

SS

A32

VS

SA

33V

SS

A34

VS

SA

35V

SS

A36

VS

SA

37V

SS

A38

VS

SA

39V

SS

A40

VS

SA

41V

SS

A42

VS

SA

43V

SS

A44

VS

SA

45V

SS

A46

VS

SA

47V

SS

A48

VS

SA

49V

SS

A50

VS

SA

51V

SS

A52

VS

SA

53V

SS

A54

VS

SA

55V

SS

A56

VS

SA

57V

SS

A58

VS

SA

59V

SS

A60

VS

SA

61V

SS

A62

VS

SA

63V

SS

A64

VS

SA

65V

SS

A66

VS

SA

67V

SS

A68

VS

S11

3V

SS

114

VS

S11

5V

SS

116

VS

S11

7V

SS

118

VS

S11

9V

SS

120

VS

S12

2V

SS

123

VS

S12

4V

SS

125

VS

S12

6V

SS

127

VS

S12

8V

SS

129

VS

S13

0V

SS

131

VS

S13

2

C250

SC4D7U10V5ZY

12

C588

SCD1U

12

L26

MLB-201209-8-GP1 2

C155

SC10U10V5KX

12

C603

SCD1U

12

C169

SC4D7U10V5ZY

12C576

SCD1U

12

C233

SCD1U

12

C253

SCD1U

12

C562

SCD1U

12

L42

MLB-201209-9-GP(R)

1 2

C589

SCD1U

12

C166

SCD1U

12

C238

SC4D7U10V5ZY

12

C584

SCD1U1

2

L39

MLB-201209-8-GP1 2

C578

SCD1U

12

C590

SCD1U

12

C160

SCD1U

12

C620

SCD1U

12

C557

SCD1U

12

C601

SCD1U

12

C255

SCD1U

12

C575

SCD1U

12

CN19

FOX-CON2-5

(R)12

C552

SCD1U

12

L38

MLB-201209-9-GP1 2

C582

SCD1U

12

C254

SC

10U

10V

5KX

12

C227

SCD1U

12

TC35E220U16VM-L6-GP

12

C189

SC

1U10

V3Z

Y 12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LCD_VDD Power EnableLCD_ENAVDD : High- Enable VCC12_LCD,VCC3_3_LCD, VCC5_LCD

LVDS header(LCDPCOnly)

LVDS_DIGON: active High

LCD_ENAVDD : Low- disableVCC12_LCD, VCC3_3_LCD,VCC5_LCD

12*12V/2.7K=0.053W

Modify 0517/J361Y Tracking (Item other -071)

6/9

J361Y RS482+M1573 1A

Wistron Incorporated21F, 88, Hsin Tai WuRdHsichih, Taipei

Custom16 50Thursday, June 16, 2005

LVDS conn

Title


Date: Sheet of

LVDS_TXL1P

VCC5_LCD

LVDS_TXL3P

VCC12_LCD

VCC5_LCD

LVDS_TXLCKN

VCC3_3_LCD

LVDS_TXUCKN

LVDS_TXL3N

LVDS_TXLCKP

VCC3_3_LCD

VCC5_LCD

VCC12_LCDVCC5_LCD

LVDS_TXUCKP

LVDS_TXL1N

LVDS_TXU2N

LCD_VID2

VCC5_LCD

VCC5_LCD

VCC3_3_LCD

VCC12_LCD

LVDS_TXL2N

LVDS_TXU2P

LVDS_TXU1N

VCC12_LCD

LVDS_TXL0P

LCD_ENAVDD

LVDS_TXL0N

LVDS_TXU3P

VCC12_LCD

LVDS_TXU0PLVDS_TXU1P

LCD_VID1

LVDS_TXU3N

LVDS_TXU0N

LCD_ENAVDD_GATE1

LVDS_TXL2P

NB_PWRGD_5V

LCD_VID0

LCD_ENAVDD_GATE2

NB_PWRGD_5V

LCD_ENAVDD_GATE3

LVDS_TXU3P 13LVDS_TXU3N13

LVDS_TXL0N13

LVDS_TXLCKP 13

LVDS_TXU0P 13

LVDS_TXLCKN13

LVDS_TXL2N13

LVDS_TXU2P 13

LVDS_BLON_Header 40

LVDS_TXU1P 13

LVDS_TXUCKN13 LVDS_TXUCKP 13

LVDS_TXL0P 13

LVDS_DIGON13

NB_PWRGD13,47

LVDS_TXL2P 13

LVDS_TXL3P 13

LVDS_TXU2N13

LVDS_TXL3N13

LVDS_TXL1N13

LVDS_BLON13

LVDS_TXU1N13

LVDS_TXL1P 13

LVDS_TXU0N13

CRT_TMDS_DISJ,21,40

LCD_VID022LCD_VID122LCD_VID222

VCC5VCC3_3

VCC5

VCC3_3

VCC12

VCC12VCC12

VCC5

VCC3_3

VCC12

G

SD

Q36SI3456DV-U1

2

3

1

65 4

R165

220R3

12

RA2

150KR3J-L-GP

1 2

R127

2KR3

12

R110

1KR3

12

TC15

E10

0U16

VM

-L11

-GP

12

R140

2KR3

12

R10110KR3

12

G

S

D

Q29

2N7002-L1

1

23

C94

SC1U25V5ZY

12

R160

2K7R3

12

R161100KR3

12

C67SCD1U25V3KX

12

R107

1KR3

12

U11

NC7SZ08M5X-NL-GP

123 4

5ABGND Y

VCC

C91

SC1U25V5ZY

12

G

D

S

Q37SI3443DV

3

4

1256

G

S

D

Q23

2N7002-L11

23

G

S

D

Q38

2N7002-L11

23

C95

SC

1U16

V3K

X1

2

G

S

D

Q22

2N7002-L11

23

C56

SC1U25V5ZY

12

G

SD

Q30 2N7002-L1

1

23

R12822KR3

12

R114

220R3

12

R121

10KR3

1 2

G

S

D

Q21

2N7002-L1

1

23

Q25

2N39

06-L

-U2

32

1

Q20

2N3904-L1-U3

1

2

CN16

JST-CONN50A-U

52

511

3579

1113151719212325272931333537394143454749

2

468101214161820222426283032343638404244464850

G

SD

Q26SI3456DV-U1

2

3

1

65 4

TC17

E10

0U25

VM

-L1

12

G

S

D

Q42

2N7002-L11

23

G

SD

Q24 2N7002-L1

1

23

WWW.AliSaler.Com

3

3

2

2

1

1

C C

B B

A A

TMDS Conn & PS conn (6 pins)

The VREF pin inputs areference voltage ofDVDDV/2.

Overlap

TMDS Transmiter &Conn (SSPC Only)

Hot Plug detect circuit

Modify 0427

Modify

0427

Modify 0427

Modify 0427

Modify 0510/J361Y_Tracking (Itemother-064)

6/10

J361Y RS482+M1573 1A

Wistron Incorporated21F, 88, Hsin Tai WuRdHsichih, Taipei

Custom


TMDS Transmitter & conn

Title


Date: Sheet of

TMDS_HPDET

TMDS_TX1-

TMDS_TXC-

TMDS_TX2-

TMDS_TX2+

TMDS_TX0-

+5VLCDDDCPBTNJ_LCD

TMDS_HPDET

VCC5SBTMDS

G_DVIDATA_LCDG_DVICLK_LCD

SLP_S5*_CON

TMDS_TX1+

TMDS_TXC+ TMDS_TX0+

DVDDV_7301

TMDS_TX1+

DVO_VDD

TMDS_TX2-

DVO_D6

TMDS_TX2+

DVO_D4

DVO_VREF

DVO_TVDD

DVO_D2

TMDS_TX0-

DVO_D8

PCIRST#_DVO

DVO_SWING

DVO_DVDD

TMDS_TX1-

DVO_D7

DVO_HTPLG

DVO_D0

DVO_D5

DVO_AVDD

TMDS_TXC+

DVO_ISET

DVO_AS

DVO_D9

DVO_D3

TMDS_TX0+

DVO_AGND

TMDS_TXC-

DVO_D10DVO_D11

DVO_D1

VCC5SBTMDSPW20_15_TMDS

SLP_S5*_CON

DVDDV_7301

TMDS_HPDET

+5VLCDDDC

G_DVIDATA_LCD

G_DVICLK_LCD

DV

O_A

GN

D

DVO_AGND

DVO_TVDD

DVO_DVDD

DVO_VDD

DVO_AVDD

G_DVICLK_LCD

G_DVIDATA_LCD

USB1N_EXT23,26USB1P_EXT23,26PBTNJ_LCD41

SP_OUT_L_CON40

SP_OUT_R_CON 40

DVO_IDCKN12

DDC_DATA13

DVO_VSYNC12

DVO_IDCKP12

PCIRST#_DVO47

DVO_D[0..11]12

DVO_DE12

I2C_SCL13,18

DVO_HSYNC12

OFFPWRS4_S5#23,28

DDC_DATA13

I2C_SCL13,18

DVO_HTPLG 13

CRT_TMDS_DISJ16,19,21,40

VCC12VL

VCC5

VCC12VL

VCC3_3

VCC3_3

VCC5SB

VCC5SBVCC3_3SB

VDD_DVO

VCC3_3

VCC5

VCC3_3

VCC3_3

VCC3_3

VCC3_3

VCC3_3

C45SCD1U

12

CN10

AOM-

5 4 J361Y-SB Rev V3.06(06/16/2005) 91.3H801.001 Sheet Sheet 1 · 2020. 3. 1. · J361Y RS482+M1573...

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Transcript of 5 4 J361Y-SB Rev V3.06(06/16/2005) 91.3H801.001 Sheet Sheet 1 · 2020. 3. 1. · J361Y RS482+M1573...