400G-PSM4: Design and Specification Exercises

18
www.luxtera.com 400G-PSM4: Design and Specification Exercises Brian Welch

Transcript of 400G-PSM4: Design and Specification Exercises

Page 1: 400G-PSM4: Design and Specification Exercises

www.luxtera.com

400G-PSM4: Design and Specification Exercises

Brian Welch

Page 2: 400G-PSM4: Design and Specification Exercises

• Bharat Tailor – Semetech

• Will Bliss – Broadcom

• Vasu Parthasarathy – Broadcom

• Tom Palkert – Luxtera

• Tom Issenhuth – Microsoft

• Brad Booth - Microsoft

Supporters

IEEE 802.3BS Task Force September 2014 2

Page 3: 400G-PSM4: Design and Specification Exercises

• This presentation is an investigation into design and spec development for a 400G-PSM4 solution.

• This presentation represents work in progress, not finished designs nor specifications.

• This presentation is not a specification proposal.

Caveats and Disclaimers

IEEE 802.3BS Task Force September 2014 3

Page 4: 400G-PSM4: Design and Specification Exercises

• Design Evolution

− Design changes moving from 25GBD-NRZ lanes to 50GBD-PAM4 Lanes

o Transmitter Encoder

o TIA linearity

o Receiver Decoder

− Investigating simple solutions

• Spec evolution

− Spec changes moving from 100G-PSM4 to 400G-PSM4 o Receiver impairments due to bandwidth and linearity requirements

o Transmitter impairments due to PAM4 encoding

Overview

IEEE 802.3BS Task Force September 2014 4

Page 5: 400G-PSM4: Design and Specification Exercises

Design Evolution – 25Gbps to 100 Gbps

CTLE CDR

MZI TIA CDR Output Driver

CTLE CDR MZI TIA λ

CTLE CDR

CTLE CDR

CTLE CDR

MU

X

MU

X

λ

DFF DFF

CLK

Selector

DFF DFF

CDR

CLK

DEM

UX

D

EMU

X

Output Driver

Output Driver

Output Driver

Output Driver

Level Shifters

25 Gbps Slice (25GBD-NRZ)

100 Gbps Slice (50GBD-PAM4)

Unchanged Element Faster Element New Element

IEEE 802.3BS Task Force September 2014 5

Page 6: 400G-PSM4: Design and Specification Exercises

Design Evolution – Optical Transmitter/Encoder

CW Laser

Input

MZ

I P

hase

C

ali

bra

tion

PA

M4

M

od

ula

ted

Li

ght

50G

50G

CW Laser

Input

MZ

I P

ha

se

Ca

lib

rati

on

NR

Z M

odul

ated

Li

ght

1x25G

25G

bp

s N

RZ

10

0G

bp

s PA

M4

IEEE 802.3BS Task Force September 2014 9/3/2014

Page 6

Page 7: 400G-PSM4: Design and Specification Exercises

DC Offset Cancellation

TIA

Voltage Regulator

PD Limiting Amplifier

RL CC

RL CC

CDR

PSGC

NR

Z Mo

du

lated

Lig

ht

Design Evolution – Optical Receiver/Decoder

DC Offset Cancellation

TIA

LS Bias & Control

PD

RL CC

RL CC

PSGC

PAM

4 M

odulated

Light

CDR

DFF DFF

Variable Optical

Attenuator

DFF DFF Sele

ctor

25Gbps NRZ

100Gbps PAM4

IEEE 802.3BS Task Force September 2014 7

Page 8: 400G-PSM4: Design and Specification Exercises

Optical Transmitter

• Break multi-segment MZI into two input device – Does PAM4 encoding optically

from dual NRZ inputs

– Does not require linear drivers or DAC

• Increase MZI baud rate

– Higher bandwidth CMOS and/or reduced CMOS fanout required.

Optical Receiver

• Increase TIA bandwidth

– Design and technology scaling

• Move to linear TIA with AGC

– Here accomplished optically

• High baud rate CDR

– CMOS scaling

• Analog PAM4 decoder

– Level shifters create offset copies on PAM4 signal

– Redundant signal paths from CDR, sharing common clock signal

– Selector for conversion back to binary sinaling

Design Evolution

IEEE 802.3BS Task Force September 2014 8

Page 9: 400G-PSM4: Design and Specification Exercises

Design Simulation – 100 Gbps PAM4 link

CTLE CDR MZI TIA λ

CTLE CDR

CTLE CDR

CTLE CDR

MU

X

MU

X

DFF DFF

CLK

Sele

ctor

DFF DFF

CDR

CLK

DEM

UX

D

EMU

X

Output Driver

Output Driver

Output Driver

Output Driver

IEEE 802.3BS Task Force September 2014 9

TX Out

TIA Out

Multi-Level

CDR Out

Binary Out

Page 10: 400G-PSM4: Design and Specification Exercises

Specification Evolution

100G-PSM4 to 400G-PSM4

IEEE 802.3BS Task Force September 2014 10

Page 11: 400G-PSM4: Design and Specification Exercises

• Use 100G-PSM4 as a baseline − Assume same uncorrected BER of 5e-5 o For ease of comparison to 100G

o Actually may be lower to account for 1e-13 corrected BER requirements

• Begin with receiver sensitivity relaxations − Approximately 1.5 dB of TIA noise penalty due to increase TIA

bandwidth

− Approximately 0.5 dB of TIA penalty due to linearity/AGC requirements

• 400G-PSM4 vs. 100G-PSM4 − Slightly narrower total optical bandwidth (26nm vs. 30nm)

− 2.1 dB of relaxation at bandwidth extremes o Most challenging portion of curves for 100G PSM4

− 1.4 dB of relaxation at center bandwidth

400G-PSM4 Spec Evolution - Receiver

IEEE 802.3BS Task Force September 2014 11

Page 12: 400G-PSM4: Design and Specification Exercises

400G-PSM4 and 100G-PSM4 : Receiver Sensitivity

-12

-11

-10

-9

-8

-7

1295 1300 1305 1310 1315 1320 1325

Op

tica

l Po

we

r (d

Bm

)

Wavelength (nm)

100G-PSM4 RX Sensitivity 400G-PSM4 RX Sensitivity

2.1 dB

1.4 dB

IEEE 802.3BS Task Force September 2014 12

Page 13: 400G-PSM4: Design and Specification Exercises

• Working back from receiver sensitivity specs

• 400G-PSM4 vs. 100G-PSM4 − 4.77 dB link penalty due to PAM4 encoding

− 0.7 dB of excess penalty due to MPI, Rin, and Level Accuracy o Assuming -35 dB connector reflectance, Rin ~ -142 dB/Hz

− Jitter Anti-Penalty ~ 0.5 dB o Non Dual Dirac Jitter

o Value subject to further investigation

• 400G-PSM4 vs. 100G-PSM4 − 5 dB greater link margin (measured to OMA11-00)

− 6.3 dB OMA increase in center band o 5 dB increase average power increase, with min ER increasing from 3.5 dB to

5 dB

o Roughly consistent optical power per unit throughput as 100G

400G Spec Evolution - Transmitter

IEEE 802.3BS Task Force September 2014 13

Page 14: 400G-PSM4: Design and Specification Exercises

400G-PSM4 and 100G-PSM4 : Transmitter OMA

-8

-7

-6

-5

-4

-3

-2

-1

0

1

2

3

4

1295 1300 1305 1310 1315 1320 1325

Op

tica

l Po

we

r (d

Bm

)

Wavelength (nm)

100G-PSM4 TX OMA 400G-PSM4 TX OMA

7 dB

6.3 dB

IEEE 802.3BS Task Force September 2014 14

Page 15: 400G-PSM4: Design and Specification Exercises

400G-PSM4 and 100G-PSM4

-13

-12

-11

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

0

1

2

3

4

1295 1300 1305 1310 1315 1320 1325

Op

tica

l Po

we

r (d

Bm

)

Wavelength (nm)

100G-PSM4 TX OMA 400G-PSM4 TX OMA 100G-PSM4 RX Sensitivity 400G-PSM4 RX Sensitivity

IEEE 802.3BS Task Force September 2014 15

Page 16: 400G-PSM4: Design and Specification Exercises

• Design evolution from 100G-PSM4 to 400G-PSM4 can be relatively simple − Baud rate scaling from 25G to 50G

− Moderate revisions to transmitter architecture

− Moderate revisions to TIA

− Multi-path slicers in CDR and selector for PAM4 decoding to 2xNRZ signaling

• Spec evolution from 100G-PSM4 to 400G-PSM4 allows for − Reasonable relaxation of optical receiver sensitivity

− Moderate scaling of transmitter OMA requirements o Optical power scales linearly vs. net throughput from 100G

− No optical Mux/Demux elements required

Summary

IEEE 802.3BS Task Force September 2014 16

Page 17: 400G-PSM4: Design and Specification Exercises

• Build out link simulation to:

− Refine noise models

− Refine jitter ‘Anti-Penalties’

− Refine transmitter OMA requirements

• Investigate duplex solutions

− Apply four wavelength WDM to 400G-PSM4 slice design

− CWDM? (2km reaches?)

− LWDM? (10km reaches?)

Next Steps

IEEE 802.3BS Task Force September 2014 17

Page 18: 400G-PSM4: Design and Specification Exercises

Thank You

IEEE 802.3BS Task Force September 2014 18