400G Optical Transceivers - IEEE 802 · 1. 400G PMD Requirements for Broad Market Potential ......

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400G Optical Transceivers

Economic Comparisons in Silicon Photonics Brian Welch

1. 400G PMD Requirements for Broad Market Potential − http://www.ieee802.org/3/400GSG/public/13_07/palkert_400_01_0713.pdf

2. An Economic Comparison of PSM4, PAM, and LR4 − http://www.ieee802.org/3/bm/public/jan13/welch_01b_0113_optx.pdf

3. SMF Link Costs over Time − http://www.ieee802.org/3/bm/public/jul13/welch_01_0713_optx.pdf

Background Materials

IEEE 802.3 400 Gb/s Ethernet Study Group - November 2013

2

http://www.ieee802.org/3/400GSG/public/13_07/palkert_400_01_0713.pdf

http://www.ieee802.org/3/bm/public/jan13/welch_01b_0113_optx.pdf

http://www.ieee802.org/3/bm/public/jul13/welch_01_0713_optx.pdf

• This presentation is an economic comparison of potential 400G optical transceivers

• This presentation is not a technical comparison

of potential 400G optical transceivers

400G Optical Transceivers: Economic Comparisons


3

• Compares: Module and Link Costs (vs. Distance) − Using a material basis [2]

• Assumes all solutions are equally technically feasible. − No parametric yield impairments for ‘harder’ solutions

• Assumes all solutions are shipping in the same volume • Does not include amortization of development cost in cost

comparisons • Doesn’t look at all potential solutions − Tries to cover the ‘space’, from simple to complex

400G Optical Transceivers: Economic Comparisons


4

First Generation

• PSM16 – Electrical: 16x25 Gbps – Optical: 16x25 Gbps

• 4xPAM4 – Electrical: 16x25 Gbps – Optical: 4x100G (PAM4)

• 4λ-PAM4 – Electrical: 16x25 Gbps – Optical: 1x400G

• 4λ LWDM • PAM4

Second Generation

• PSM8 – Electrical: 8x50 Gbps – Optical: 8x50 Gbps

• 4xPAM4 – Electrical: 8x50 Gbps – Optical: 4x100G (PAM4)

• 4λ-PAM4 – Electrical: 8x50 Gbps – Optical: 1x400G

• 4λ LWDM • PAM4

Potential Solutions under Comparison

Comparison Baseline: 100G – PSM4


5

Only PSM8 is an envisioned optical spec revision between First and Second Generations

Module Costs


6

Area / Count per Wafer

Silicon Photonics Area 68 mm2 880

CMOS Area 17 mm2 3576

Light Source(s) 1 3000

PSM4 – From Welch_01b_0113_optx

7 IEEE 802.3 400 Gb/s Ethernet Study Group - November 2013

PSM16 – Gen 1 PSM8 – Gen 2

PSM16 and PSM8


8

4 RX

TIA / LA(x=850u)

VREG / iPhoto(x=390u)

Offset C

ancel

Rou

ting

/ Loo

p

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p

Digital

(550^2 min,

550x700 with

large rom)

Lase

r Driv

er x

2(2

.6m

m x

350

u)

1keFuse

4 RX

TIA / LA(x=850u)


Offset C

ancel

Rou

ting

/ Loo

p

Bandgap

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p4 RX

TIA / LA(x=850u)


Offset C

ancel

Rou

ting

/ Loo

p

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p

Digital

(550^2 min,

550x700 with

large rom)

Lase

r Driv

er x

2(2

.6m

m x

350

u)

1keFuse

4 RX

TIA / LA(x=850u)


Offset C

ancel

Rou

ting

/ Loo

p

Bandgap

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p




Light Source(s) 1 2400-3000





4 RX

TIA / LA(x=850u)


Offset C

ancel

Rou

ting

/ Loo

p

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p

Digital

(550^2 min,

550x700 with

large rom)

Lase

r Driv

er x

2(2

.6m

m x

350

u)

1keFuse

Bandgap

4 RX

TIA / LA(x=850u)


Offset C

ancel

Rou

ting

/ Loo

p

Pin CTL(x=570u)

MZI Driver(x=900u)

4 TX

Rou

ting

/ Loo

p

Digital

(550^2 min,

550x700 with

large rom)

Lase

r Driv

er x

2(2

.6m

m x

350

u)

1keFuse

Bandgap

4xPAM4 – Gen 1 4xPAM4 – Gen 2

4xPAM4


9








Light Source(s) 1 2400-3000 D

igital(550^2 m

in, 550x700 w

ith large rom

)

CW

Las

er D

river

1keFuse

Bandgap

4 RX

Rou

ting

/ Loo

p

Pin C

TL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

MU

X

PLL

AD

C

AD

C F

ront

End

4 RX

Rou

ting

/ Loo

p

Pin C

TL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

MU

X

PLL

AD

C

AD

C F

ront

End

4 RX

Rou

ting

/ Loo

p

Pin C

TL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

MU

X

PLL

AD

C

AD

C F

ront

End

4 RX

Rou

ting

/ Loo

p

Pin C

TL(x=570u)

PA

M M

ZI4 TX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

MU

X

PLL

AD

C

AD

C F

ront

End

Digital

(550^2 min,

550x700 with

large rom)

CW

Las

er D

river

1keFuse

Bandgap

Digital

(550^2 min,

550x700 with

large rom)

CW

Las

er D

river

1keFuse

Bandgap

4 RX

Rou

ting

/ Loo

p

4 TX

Rou

ting

/ Loo

p

PLL

AD

C

AD

C F

ront

End

4 RX

Rou

ting

/ Loo

p

Pin CTL(x=570u)

PAM MZI

4 TX

Rou

ting

/ Loo

p

TIA / LA(x=850u)


Offset C

ancel

Digital

(550^2 min,

550x700 with

large rom)

CW

Las

er D

river

1keFuse

Bandgap

PLL

PLL

PLL

AD

C

AD

C F

ront

End

AD

C

AD

C F

ront

End

AD

C

AD

C F

ront

End

PAM MZI

Pin CTL(x=570u)

TIA / LA(x=850u)


Offset C

ancel

TIA / LA(x=850u)


Offset C

ancel

TIA / LA(x=850u)


Offset C

ancel

Pin CTL(x=570u)

PAM MZI

PAM MZI

Pin CTL(x=570u)

4λxPAM4 – Gen 1 4λxPAM4 – Gen 2

4λxPAM4


10

Digital

(550^2 min,

550x700 with

large rom)

Bandgap

Pin CTL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

MU

X

PLL

4 RX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

AD

C

AD

C F

ront

End

Pin CTL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

MU

X

PLL

4 RXR

outin

g / L

oop

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

AD

C

AD

C F

ront

End

CW

Las

er D

river

1keFuse

WD

M C

ON

TRO

LER

WD

M C

ON

TRO

LER

CW

Las

er D

river

CW

Las

er D

river

1keFuse

4 RX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

AD

C

AD

C F

ront

End 4 RX

Rou

ting

/ Loo

p

TIA / LA

(x=850u)V

RE

G / iP

hoto(x=390u)

Offset Cancel

AD

C

AD

C F

ront

End

CW

Las

er D

river

Pin CTL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

MU

X

PLL

Pin CTL(x=570u)

PA

M M

ZI

4 TX

Rou

ting

/ Loo

p

MU

X

PLL

Digital

(550^2 min,

550x700 with

large rom)

Bandgap









Digital

(550^2 min,

550x700 with

large rom)

Bandgap4 TX

Rou

ting

/ Loo

p

4 RX

Rou

ting

/ Loo

p

CW

Las

er D

river

1keFuse

WD

M C

ON

TRO

LER

WD

M C

ON

TRO

LER

CW

Las

er D

river

CW

Las

er D

river

1keFuse

4 RX

Rou

ting

/ Loo

p

CW

Las

er D

river

4 TX

Rou

ting

/ Loo

p

Digital

(550^2 min,

550x700 with

large rom)

Bandgap

PLL

TIA / LA(x=850u)


Offset C

ancel

PLL

AD

C

AD

C F

ront

End

AD

C

AD

C F

ront

End

TIA / LA(x=850u)


Offset C

ancel

Pin CTL(x=570u)

PAM MZI

PAM MZI

Pin CTL(x=570u)

PLL

PLL

Pin CTL(x=570u)

PAM MZI

PAM MZI

Pin CTL(x=570u)

TIA / LA(x=850u)


Offset C

ancel

AD

C

AD

C F

ront

End

AD

C

AD

C F

ront

End

TIA / LA(x=850u)


Offset C

ancel

DPW PSM4 PSM16 4xPAM4-G1 4λxPAM4-G1 PSM8 4xPAM4-G2 4λxPAM4-G2

Silicon Photonics IC

880 408 453 306 553 552 370

CMOS IC 3576 1020 1052 975 1827 1509 1314

Light Source(s) 3000 2400 2400 600 2400 2400 600

Chipset BOM Comparison

Relative Cost PSM4 PSM16 4xPAM4-G1 4λxPAM4-G1 PSM8 4xPAM4-G2 4λxPAM4-G2

Silicon Photonics IC†

0.67 1.45 1.30 1.93 1.07 1.07 1.59

CMOS IC 0.33 1.16 1.12 1.21 0.65 0.78 0.89

CMOS Total Area

1.00 2.61 2.42 3.14 1.72 1.85 2.48

Light Source(s) 1† 1 1 4 1 1 4

11 IEEE 802.3 400 Gb/s Ethernet Study Group - November 2013

† May use lower power light source

Module Comparison - BOM


12

Components PSM4 PSM16 4xPAM4-G1 4λxPAM4-G1 PSM8 4xPAM4-G2 4λxPAM4-G2

CMOS Total 1.00 2.61 2.42 3.14 1.72 1.85 2.48

Light Source(s) 1 1 1 4 1 1 4

TEC(s) 0 0 0 4 0 0 4

Optical Coupler 8 Fiber 32 Fiber 8 Fiber 2 Fiber 16 Fiber 8 Fiber 2 Fiber

Optical Connector

8 Fiber 32 Fiber 8 Fiber 2 Fiber 16 Fiber 8 Fiber 2 Fiber

PCB 1 1 1 1 1 1 1

Housing 1 1 1 1 1 1 1

Module Cost PSM4 PSM16 4xPAM4-G1 4λxPAM4-G1 PSM8 4xPAM4-G2 4λxPAM4-G2

Chipset 2 4.11 3.92 11.14 3.22 3.35 10.48

Normalized Module (Un-Yielded)†

1 2.05 1.96 6.6 1.61 1.66 5.27

† With Packaging and Transformation Costs Applied

90%

77%

0%

10%

20%

30%

40%

50%

60%

70%

80%

90%

100%

110%

89% 90% 91% 92% 93% 94% 95% 96% 97% 98% 99% 100%

Tota

l Ass

embl

y Yi

eld

Yield Per Optical Attach

Module Assembly Comparison - Yield

PSM/PAM

LWDM


13

First Generation Second Generation

Yielded Module Cost


14

0.00

1.00

2.00

3.00

4.00

5.00

6.00

7.00

8.00

9.00

10.00

90% 91% 92% 93% 94% 95% 96% 97% 98% 99%100%

Mod

ule

Cost

Yield per Attachment

PSM4 PSM16 4xPAM4-G1 4LxPAM4-G1

0.00

1.00

2.00

3.00

4.00

5.00

6.00

7.00

8.00

9.00

10.00

90% 91% 92% 93% 94% 95% 96% 97% 98% 99% 100%M

odul

e Co

st

Yield per Attachment

PSM4 PSM8 4xPAM4-G2 4LxPAM4-G2

Module Cost PSM4 PSM16 4xPAM4-G1 4λxPAM4-G1 PSM8 4xPAM4-G2 4λxPAM4-G2

@ 95% Yield 1 2.05 1.96 8.53 1.61 1.66 6.81

Link Costs


15

• Uses link architectures from kolesar_02_0313_optx.pdf

Link Costs


16

• Prior Modeling Methodologies: − Summation Model (2xModule Cost + Fiber Plant Cost) o Pros: Simple o Cons: Does not account for different lifetimes of modules and fiber plant

− NPV Model o Pros: Accounts for the different lifetimes of modules and fiber plant o Cons: Requires assumptions about future module costs

• New Modeling Methodology: − Depreciation Model (2xModule Cost + Depreciated Value of fiber

plant) o Pros:

» Accounts for different lifetime of modules and fiber » Does not require any assumptions on future module costs

• Other Updates: − Revised materials costing on fiber and connectors

Link Cost Methodology


17

• Uses MACRS depreciation table to derive ‘value used’ of a fiber plant. – Years 0 and 10 are ½ years

• Assumes 10 year average life of fiber plant

• Assumes 3.5 year average life of module

• ‘Depreciated value’ over said time is: – 0.1+0.18+0.144+0.115 = 0.539 – 53.9% of Fiber plant value

consumed in first generation

Depreciation Model

Year Depreciation 0 0.1 1 0.18 2 0.144 3 0.115 4 0.092 5 0.074 6 0.066 7 0.066 8 0.065 9 0.065

10 0.033


18


Link Costs – 25m to 500m


19

-

2

4

6

8

10

12

14

16

18

20

25 100 175 250 325 400 475

Rela

tive

Link

Cos

t

Link Distance

PSM4 PSM16 4xPAM4 4LxPAM4

-

2

4

6

8

10

12

14

16

18

20

25 125 225 325 425

Rela

tive

Link

Cos

t

Link Distance

PSM4 PSM8 4xPAM4- Gen2 4LxPAM4 - Gen2


Link Costs – 500m to 2,000m


20

-

2

4

6

8

10

12

14

16

18

20

500 750 1000 1250 1500 1750 2000

Rela

tive

Link

Cos

t

Link Distance


-

2

4

6

8

10

12

14

16

18

20

500 750 1000 1250 1500 1750 2000

Rela

tive

Link

Cos

t

Link Distance



Link Costs – 2,000m to 10,000m


21

-

10

20

30

40

50

60

70

2 3 4 5 6 7 8 9 10

Rela

tive

Link

Cos

t

Link Distance


-

10

20

30

40

50

60

70

2 3 4 5 6 7 8 9 10

Rela

tive

Link

Cos

t

Link Distance


Example: 400G to 4x100G Breakout Links


22

-

2.00

4.00

6.00

8.00

10.00

12.00

14.00

16.00

18.00

20.00

0 50 100 150 200 250 300 350 400 450 500

Rela

tive

Link

Cos

t

Link Distance

4xPSM4 PSM16 PSM4 to PSM16 PSM16 to PSM4

Aggregated at 400G End (4x100G Fiber Plants) Aggregated at 4x100G End (400G Fiber Plants)

Other Costs and Considerations


23

• Development Costs and Amortization − Some solutions may have higher development costs than others − Amortization of development costs can have a significant impact on

product COGS o Especially at low volumes and/or slow deployment growth rates

• Time to Market − Differing levels of development complexity can lead to very different

product availability dates • Price elasticity of demand − Higher cost solutions can drive down volumes, begetting even further cost

increases • Availability of ports − Highest volume port type is typically that deployed for short reach

interconnects − Enabling a common port for SMF interconnects can enable a larger TAM,

subsequently attracting more investment in cost optimized solutions

Other Costs and Considerations


24

Summary and Conclusions


25

• There are economically viable 400G solutions.

• Cost can be a strong function of objective definition − Objectives optimizing for 10km reaches unlikely to yield cost

optimized solutions for sub 500m reaches.

• Parallel SMF will be vital to the 500m objectives and

market.

Summary and Conclusions


26

400G Optical Transceivers - IEEE 802 · 1. 400G PMD Requirements for Broad Market Potential ......

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Transcript of 400G Optical Transceivers - IEEE 802 · 1. 400G PMD Requirements for Broad Market Potential ......