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3D Packaging: A Key Enabler for Further Integration and Performance at European 3D Summit in...
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From Technologies to Markets 3D Packaging: A Key Enabler for Further Integration and Performance European 3D Summit Thibault Buisson Business Unit Manager - [email protected] Grenoble | France – January 23 - 25 th , 2017
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Transcript of 3D Packaging: A Key Enabler for Further Integration and Performance at European 3D Summit in...
From Technologies to Markets
3D Packaging: A Key Enabler
for Further Integration
and PerformanceEuropean 3D Summit
Thibault Buisson
Business Unit Manager - [email protected]
Grenoble | France – January 23-25th, 2017
2
QUICK OUTLINE
oWhat IS and WILL be driving 3D Packaging?
oA closer look…on 3D Packaging Technology
oPackaging Trends
oKey Messages
4
WHAT IS AND WILL BE DRIVING ADVANCED PACKAGING & 3D PACKAGING?
Smartphones
Tablets
…
IoT, Wearables, …
AR/VR handsets
Automotive
Connected cars
Autonomous vehicles…
Datacenters,Networking,
HPC, Photonics
Deep learning
Graphics…Artificial Intelligence
…
5
WHAT IS AND WILL BE DRIVING ADVANCED PACKAGING & 3D PACKAGING?
Smartphones
Tablets
IoT, Wearables, …
AR/VR handsets
Automotive
Connected cars
Autonomous vehicles…
Datacenters,Networking,
HPC
Deep learning
GraphicsArtificial Intelligence
Key Drivers:
Form
Factor
Increase
FunctionnalitesPerformance
ReducedCost
6
GLOBAL TECHNOLOGY ROADMAP
Moore and beyond: from information to interaction and transformation
@2015 | www.yole.fr | Sensors and Data Management for Autonomous Vehicles
1980 2010 2030
Moore More than Moore Beyond Moore
LaptopPersonal computers
Smartphones
Autonomous
vehicles
Robotic
servants
Quantified
self
Drones
Acceleration
SensingInteraction age
ProcessingInformation age
ActuatingTransformation age
Tablets
Smart
homes
2040
Telekinesis
Space travel
Yole Développement © August2015
Technology x
Market
Development
MEMS & sensors enable key
functionalities…
…which are the industry’s current
battleground
7
Sound
Interface
Security
Communi-cation
Motion
Environmental
Optical
MEMS AND SENSORS IN MOBILE DEVICES
Security, sound and
3D Imaging,the next
value propositions
of smartphones
…
@2017 | www.yole.fr | 3D Summit
Capacitive MEMS
Microphone
Piezoelectric MEMS
Microphone
CIS (Front, Rear, Multi, 3D)
Spectral sensing (IR, multispectral)
Autofocus (VCM, liquid
lens, MEMS, piezo)
Particle, gas sensor
Temp. / Humidity sensor
Accelerometer
Gyroscope
Magnetometer
Combos (IMU, eCompass, 9DOF)
Pressure sensor
Antenna tuner, filters, …
MEMS oscillator
Face/Eye/Iris
recognition
Fingerprint
sensor
Laser ranger
3D Touch
ALS, proximity, RGB
Laser ranger
8
LANDSCAPE OF SENSORS USED IN SMARTPHONE MARKET
2007 - 2014
Since the advent of smartphones and tablets, the landscape of sensors integrated has really changed…
@2017 | www.yole.fr | 3D Summit
2007 2014
Accelerometer
Accelerometer
Gyroscope
Magnetometer
3 sensors 12 sensors
Microphone x1
CIS x1
Microphone x2
Pressure
Fingerprint
HRM
CIS x2
ALS
Proximity
2-in-1 (6A-IMU)
2-in-1
9
LANDSCAPE OF SENSORS USED IN SMARTPHONE MARKET
2014 - 2021
With a profusion of sensors
@2017 | www.yole.fr | 3D Summit
2014 2021
Accelerometer
Gyroscope
Magnetometer
12 sensors 20 sensors
ALS
Proximity
RGB
CIS x4
Laser ranger
IR sensor
Fingerprint
HRM
Pressure
Microphone x3
Gas sensor
Accelerometer
Gyroscope
Magnetometer
Microphone x2
Pressure
ALS
Proximity
Fingerprint
HRM
CIS x2
3-in-1
2-in-1 (6A-IMU)2-in-1 (6A-IMU)
2-in-1
10©2016 | www.yole.fr | 3D TSV & 2.5D Interconnect - Business Update Report 2016
MORE FUNCTIONALITIES NEED PERFORMANCE
Vertical integration is the current (huge) battle
Manage all the chain is
a key advantage
…that’s why all OEMs develop
their own APU
APUApple
A10
Samsung
Exynos 8
Qualcomm
Snapdragon 820
HiSilicon Kirin
955
MediaTek Helio
X25
Package type InFO 1178-ball PoP BGA1027-ball PoP BGA
MCePPoP PoP
Process 14nm FinFET (e) 14nm LPP 14nm LPP 16nm FF+ 20nm
CPU4x or 6x Cortex
A72 @2GHz (e)
4x A53 + 4x Exynos
M1 @2.3GHz
4x Kryo
@2GHz
8x Cortex A72/53
@2.5GHz
10x Cortex A72/53
@2.5GHz
Size (mm) 15x15x1 (e) 15.4x14.5x1 15.3x16x1 / /
Pin pitch (mm) 0.4 0.4 0.4 0.4 /
Foundry TSMC (e) Samsung Samsung/Shinko TSMC ? TSMC ?
Co-processor (for Sensor fusion)
M10 (e) / / / ARM Cortex M4
12©2016 | www.yole.fr
DIFFERENT ARCHITECTURES OF ACCELEROMETER USING 3D APPROACH
2013 20142012 2015 - 2016
LGA package LGA package LGA packageWLCSP WLCSP
Source: mCube
13©2016 | www.yole.fr
3-AXIS ACCELEROMETER PACKAGE SIZE – SIZE REDUCTION
Surface: SST= 4mm²
Package thickness:
TST= 1mm
Surface: SmCube= 4mm²
Package thickness:
TmCube= 0.9mm
Surface: SBosch= 1.8mm²
Package thickness:
TBosch= 0.8mm
2013 20142012 2015 2016 2017
Surface: SmCube= 4mm²
Package thickness:
TmCube= 0.9mm
Surface: SmCube= 2,56mm²
Package thickness:
TmCube= 0.94mm
Surface: SmCube= 1,21mm²
Package thickness:
TmCube= 0.74mm
LGA package LGA package LGA packageWLCSP WLCSPLGA package
o Driven by IoT WLP will be one of the next key trend for MEMS and Sensors devices!
Source: mCube
70% reduction in package size enabled by 3D TSV and WLP
14©2016 | www.yole.fr
FILM BULK ACOUSTIC RESONATOR (FBAR) - BAW FILTER FROM AVAGO
2015 2016
LGA packageo 2 MEMS
o 4 layers organic substrate
System in Package (SiP)o Multi-dies (SAW, FBAR, Swith…)
o 7 layers coreless substrate
o Extracted from Iphone 6S
2013
System in Package (SiP)o Multi-dies (BAW, Switches…)
o 7 layers coreless substrate
o Extracted from Samsung S7
o TSV is used to connect the
membrane of the FBAR
o Thickness of the cap has been
reduced and therefore TSV depth as
well
o Used of coreless substrate to enable
multi dies integration
15©2016 | www.yole.fr
OTHER MEMS & SENSORS 3D PACKAGING
ALS
(Ambiant Light Sensor)
Finger Print SensorIMU
6-Axis Accelerometer
2015 2015 2015Oscillator 2010
And much more
to come!
LGA package WLCSP WLCSP
16©2016 | www.yole.fr
CMOS IMAGE SENSOR 3D STACKINGPix
el A
rray
circ
uit
(BSI
)
Logi
c
circ
uit
TSV Generation 1 TSV Generation 2 Cu-Cu Hybrid Bonding
Low temperature Oxide Oxide bonding with TSV or hybrid bonding without TSV
What is next?
Muti stacked
wafers
17©2016 | www.yole.fr
LAST FLAGSHIP – APE 3D PACKAGING COMPARISON
1,14
1 1
0,73
FC PoP FC PoP MCeP inFO
Kirin 955 Exynos 8 Snapdragon 820 A10
Package On Package Thickness [µm]
1mm>
0
PoP thickness
APE Package thickness
~0,5mm
o Thinner is better!
o Clear trend to reduce APE package
thickness
o TSMC with inFO technology as
reached a very thin package size
that leads to better performance.
o The Fan Out penetration in the APE
segment has a direct impact on the
advanced substrate makers. Loss
estimated to be few hundreds of M$
o So…What could be next?
~0,4mm
18©2016 | www.yole.fr
FAN-OUT APPLICATIONS
Different applications with different needs and characteristics (Density, package size)
Codec
DC-DC
Wifi
BB
PMU/PMIC
RF
Application
Processors (APE)
+ BB
APE+DRAM
GPU, CPU + Memory
(Wide IO, etc…)
High Bandwidth
Memories
FPGA
Processors + Memories
IO density (IO/mm/layer)
200
100
1
2x2 5x5 10x10 15x15 20x20 >20x20 >>20x20 Package size
(mmxmm)
MEMS
CMOS Image Sensors
Display Drivers
10
>>200
19©2016 | www.yole.fr
MEMS
CMOS Image Sensors
Display Drivers
Codec
DC-DC
Wifi
BB
PMU/PMIC
RF
Application
Processors
(APE) + BB
APE+DRAM
GPU,CPU+Memory
(Wide IO, etc…)
High Bandwith Memories
FPGA
Processors+Memories
FAN-OUT APPLICATIONS
Potential applications for Fan-Out: Where does Fan-Out fit and how?
Single Chip FOWLP
Multi-Chip
FO PoP withTMV
FO SiP
Multi-Chip
FO PoP with TMV
IO count10000
1000
100
2x2 5x5 10x10 15x15 20x20 >20x20 >>20x20
Package
size
(mmxmm)
20©2016 | www.yole.fr
LAST FLAGSHIP – APE 3D PACKAGING COMPARISON
What we can expect :
o The substrate manufacturers will strike back
o Strong developpement to reduce L/S and substrate thickness
o Alternative technologies such as embedded die could be used (such as MCeP type…)
o Advanced PoP (HB-PoP) to be used
o Several options for Fan Out Packaging and alternatives across different players (mainly
OSATs)o Other products or players to use Fan Out Packaging
o New generation inFO
o Package thickness continues to reduces (Fan out used for top dies i.e: memories)
o Chip last approach to compete with Chip first.
o Fan Out to spread in High End Segments (High I/O) such as networking (High End
Applications…)
o Panel level Packaging developpement to reduce cost of processing
22
RDL/Metal LAYERS INCREASING WITH NEEDS FOR HIGHER PERFORMANCE
RDL/
Metal
layers
Increased Performance enabled by integration, higher I/Os, Reduced Pitch Size
Xilinx/TSMC CoWoS (FPGA)
• 12 substrate build-up layers (6-2-6)
are not able to support below FPGAs
– interposer needed
• Passive TSV interposer
2 RDL Layers:
Package total thickness
(without balls) - 0.29mm• Top Protective layer
thickness: 0.024mm
• Silicon Substrate thickness:
0.230mm
• Metal layers + RDL thickness:
0.040mm
HiSilicon AudioDecoder
in Huawei Ascend Mate 7
M
6
(
A
l)
RDL (Copper,
4.7µm)
UBM
(Copper,
6µm)
Solder
Ball
(SAC)
Die Passivation
(SiO2+SiN)
Polyimide
Passivation (5µm)
Polyimide
Passivation
(6µm)
Polyimide
Passivation
(3µm)RDL (Copper,
4.7µm)
Si
Substrate
M
5
(
C
u
)
M
6
(
A
l
)RDL (Copper,
4µm)
UBM
(Copper,
4µm)
Solde
r Ball
(SAC)
Die Passivation
(SiO2+SiN)
Polyimide
Passivation
(6µm)
Polyimide
Passivation
(5.5µm)
1 RDL Layer:
Package total thickness
(without balls): 0.34mm• Top Protective layer thickness:
0.024mm
• Silicon Substrate thickness:
0.295mm
• Metal layers + RDL thickness:
0.024mm
Qualcomm Transceiver in
Apple iPhone 6+
WLCSP
WLCSP
Mobile LogicHigher I/Os
2 RDL Layers:
Package total thickness -
0.33mm
Fan-Out WLP
Renesas Microcontroler
(MCU)
14 RDL Layers:
• 4/2/4 FC substrate and 3 Cu damascene
layers + 1 Al layer in Si interposer
• Package total thickness - 2.32 mm
2.5D Interposer
Front End Module:
Qorvo in Apple iPhone 6+
7 RDL Layers:
Package total thickness -
0.9mm
Coreless FC SiP
WLP (Fan in & Out)
SiP 2.5D / 3D TSV Technology
24
TO CONCLUDE
o Scaling of transistors is getting more and more complex. To enable solutions, focus is thereforeon Advanced Packaging throught different platforms and mainly on 3D Packaging Platforms.
o Fan Out Packaging has penetrated the middle end market for application processor. It is foreseento expand in that segment and possibly for high end market. Several solutions are being proposed bymany players to gain market share.
o Fan Out Packaging may impact the flip chip technology and mainly advanced substrates makers. Wedo expect the substrate makers to come-up with more advanced technical specifications.
o Moving to Fan Out Packaging is a strategic decision. Some fabless makers may take their time toswitch to this technology.
o High End market pushed by more demand in performance will continue to see advanced Packagingtechnologies emerging.
@2017 | www.yole.fr | 3D Summit
26©2016 | www.yole.fr | About Yole Développement
FIELDS OF EXPERTISE
Yole Développement’s 45 analysts operate in the following areas
MEMS & Sensors
LED
Compound
Semi.
Imaging
Photonics
MedTech
Manufacturing
Advanced
Packaging
Batteries / Energy
Management
Power
Electronics
Displays
RF
27©2016 | www.yole.fr | About Yole Développement
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