1 Introduction

The frequency band from millimeter wave(30 to 300 GHz) to sub-millimeter wave (300GHz to 3 THz) is presently underutilized, par-ticularly in comparison with the commonlyused optical waves and microwaves below andabove this band. Nevertheless, this frequencyregion will prove critical in the future realiza-tion of ultra-high-speed wireless and opticalcommunications networks. Effective utiliza-tion of this frequency range will require thedevelopment of ultra-high-speed transistorscapable of taking full advantage of the excel-lent performance offered by the high-frequen-cy sub-millimeter frequency range. We haverecently developed a transistor with a recordhigh cutoff frequency—in excess of 500GHz—by optimizing the semiconductor crys-tal structure as well as the structure of theoverall device.

This paper describes the process technolo-gy used for the fabrication of the world’sfastest InP-based high electron mobility tran-sistors (InP-HEMTs) and discusses the specif-

ic device structure required to ensure superbhigh-frequency performance.

2 Development of the world’sfastest InP-HEMT

2.1 Fabrication of sub-50-nm gate InP-HEMT

When compared to conventional gallium-arsenide-based (GaAs) high electron mobilitytransistors (HEMTs), indium-phosphide-based(InP) HEMTs result in lower electron effectivemass in the indium gallium arsenide (InGaAs)channel layer. InP-HEMTs also feature a rela-tively large conduction band offset (approxi-mately 0.5 eV) between the channel layer andadjacent barrier layer (indium aluminumarsenide, InAlAs). Therefore, InP-HEMTs arecharacterized by high electron mobility, highelectron saturation velocity, and high electronconcentration. These characteristics areexpected to lead to a marked increase indevice speeds.

The schematic diagram in Fig. 1 shows thecross-sectional structure of an InP-HEMT.

SHINOHARA Keisuke and MATSUI Toshiaki 95

3-7 Nano-Gate Transistor — World’s Fastest InP-HEMT —

SHINOHARA Keisuke and MATSUI Toshiaki

InP-based InGaAs/InAlAs high electron mobility transistors (HEMTs) which can operate inthe sub-millimeter-wave frequency range (300 GHz – 3 THz) are key devices for future ultra-high-speed communications because of their high-frequency, low-noise performance. Wesucceeded in fabricating the world’s shortest 25-nm-gate InP-HEMTs which exhibited arecord current gain cutoff frequency (fT) of 562 GHz. Moreover, we investigated the effect ofdevice structures on their high frequency performance, and it was greatly improved by opti-mizing these structural parameters.

Keywords Nano-Gate, Indium Phosphide (InP), High Electron Mobility Transistor (HEMT), CutoffFrequency (fT), Sub-millimeter-wave frequency range

96

The governing principles behind any improve-ment in the high-speed performance of anHEMT consist of reducing the traveling dis-tance of electrons—the gate length—andincreasing the traveling speed. We used elec-tron beam (EB) lithography technology in anattempt to fabricate a T-shaped gate electrodewith a gate length of less than 50 nm. Sincethe T-shaped gate enables the reduction of gatelength while maintaining a large cross-section-al area, gate resistance can be minimized. Forthe electron beam (EB) lithography process,we used a tri-layer resist (ZEP/PMGI/ZEP)consisting of two types of electron beam (EB)resists. The top and middle layers wereexposed simultaneously at a relatively lowdose and then developed with a high-sensitivi-ty developer. The bottom layer was thenexposed at a relatively high dose and devel-oped with a low-sensitivity developer. Theresultant overhang structure is shown in Fig.2a. Since the dimensions of the ultra-fine pat-tern on the bottom layer determine the gatelength of the T-shaped gate, it is essential tofabricate, with high precision, an ultra-finepattern of less than 50 nm. By optimizing theexposure and development conditions for thebottom-layer resist, we were able to achievean ultra-fine pattern as narrow as 15 nm, andsucceeded in accurate control of dimensionsby simply adjusting the dose (Fig. 3).

Subsequently, we used a citric-acid-based

aqueous solution for etching the cap layer(InGaAs) to create a gate-recess structure. Inthe final stage, we evaporated the gate-metal(Ti/Pt/Au) and lifted-off. Figure 2b shows atransmission electron microscope (TEM)image of the cross-section of the fabricated T-shaped gate with a gate length of 30 nm and aside-recess length of 50 nm.

Journal of the National Institute of Information and Communications Technology Vol.51 Nos.1/2 2004

Structure of InP-HEMTFig.1

(a) SEM cross-sectional image of tri-layer resist immediately after develop-ment; (b) TEM cross-sectional imageof T-shaped gate

Fig.2

Dose dependency of pattern dimen-sion

Fig.3

2.2 High-frequency performance ofInP-HEMTs

Current gain cutoff frequency (fT) andmaximum oscillation frequency (fmax) are oftenused as indicators of the high-speed character-istics of transistors. Specifically, fT, which isexpressed by v/(2πLg) (v: electron velocity,Lg: gate length), reflects the velocity and trav-eling distance of electrons within the transis-tor. Figure 4 shows the frequency dependencyof the current gain (|h21|2) of an InP-HEMTwith a gate length of 25 nm. The current gainat each frequency can be obtained by convert-ing the S-parameter measured with a vectornetwork analyzer (HP8510C). The cutoff fre-quency—the point at which the gain becomeszero—is determined by extrapolation based ona slope of -20 dB/decade using the measureddata for frequencies of up to 50 GHz. Theobtained fT value of 562 GHz is the largestvalue ever reported for any transistor[1].

3 Effects of device structure onhigh-frequency performance

3.1 Gate-length dependenceFigure 5 shows the gate-length depend-

ence of the fT and transconductance (gm) of anInP-HEMT (●)with lattice-matched In0.53Ga0.47

As channel layer[2]. The fabricated InP-

HEMT featured a gate-channel distance of 13nm, and the side recess length of the gate was50 nm. This reduced gate length led to anobserved increase in fT. The value of fT was472 GHz when the gate length was 30 nm, and400 GH when the gate length was 70 nm. Thevalue of gm was 1.25 S/mm when the gatelength was 30 nm, and reached a maximum of1.5 S/mm when the gate length was 100 nm.Compared to lattice-matched InP-HEMTs(□)[3] reported by other research groups, ourHEMT’s fT and gm values reflected 30% to40% better performance. Comparison with asample (■) featuring the same gate-channeldistance but with a longer side recess length of190 nm (equivalent to conventional HEMTs)indicates that the improvement in fT and gm isattributable to reduced side recess length.

3.2 Asymmetric recess technologyAs described above, the side recess length

of the gate recess is believed to have a signifi-cant effect on the speed characteristics of thedevice. We therefore developed a processtechnology that enabled independent controlof the side recesses length on the right and leftsides of the gate electrode[4]. This simple,high-precision self-aligning process, outlinedin Fig. 6, uses a conventional tri-layer resist.

SHINOHARA Keisuke and MATSUI Toshiaki 97

Frequency dependency of currentgain of pseudomorphic-channel InP-HEMT with gate length of 25 nm

Fig.4

Gate-length dependence of cutofffrequency and transconductance ofInP-HEMT

Fig.5

The top and middle layers of this tri-layerresist are exposed and developed using con-ventional methods (a). A gate pattern and anultra-fine slit pattern next to the gate patternare then exposed and developed (b). The dis-tance between the gate pattern and the slit isexpressed by l, the slit size by a × b, and theslit pitch by c. When the InGaAs layer isetched by a citric-acid-based etchant, a gaterecess structure is formed. Since the etchingaction progresses not only through the gatepattern but also through the slit pattern, therecess shape becomes asymmetrical relative tothe gate pattern (c). By providing an InP etch-stopper layer under the InGaAs layer, the etch-ing can be stopped in the direction of depth.When the side etching length is r, the siderecess lengths on the source and drain sidescan be expressed by r, and l + a + r, respec-tively. Thus an asymmetric recess structure ofa desired shape can be realized through appro-priate setting of these parameters.

Furthermore, by reducing the slit pitch, c,to the level of r, the linearity of the etchingedge on the drain side can be improved. In thefinal process, the gate metal is evaporated anddeposited from the front side toward the back,at a tilted angle. This prevents the gate metalfrom depositing on the semiconductor surfacebelow the slit, and allows for deposition onlyon the area below the gate pattern (d). Figure7 shows a photo of a tri-layer resist immedi-ately after recess etching and the cross-sec-tional image of an asymmetric recess T-shapedgate.

3.3 Recess-length dependency of fT

To investigate the dependence of the high-speed characteristics of InP-HEMTs on siderecess length, we evaluated the high-frequen-cy performance of three types of asymmetricrecess HEMTs with gate lengths of 60 nm fab-ricated using the method described above[5].In the Type I sample, the recess length on thedrain side was fixed at 50 nm, and the recesslength on the source side was varied between50 and 260 nm. In the Type II sample, on theother hand, the recess length on the source

98 Journal of the National Institute of Information and Communications Technology Vol.51 Nos.1/2 2004

Asymmetric recess fabrication processFig.6

side was fixed at 50 nm, and the drain-siderecess length was varied between 50 and 260nm. In the Type III sample, the recess lengthson both source and drain sides were variedsimultaneously, from 50 to 260 nm. Figure 8shows the recess-length dependence of fT ineach sample. In the Type I sample, fT

decreased gradually as the recess length on thesource side became longer. By contrast, in theType II sample, fT decreased sharply as therecess length on the drain side became longer.The results for the Type III sample were simi-lar to those seen in the Type II sample, but fT

values were slightly lower, given the longerrecess length on the source side. These resultsindicate that the excellent high-speed charac-teristics of our InP-HEMTs are attributablelargely to reduced recess length on the drainside.

Figure 9 shows the calculation resultsbased on Monte Carlo simulations for twoInP-HEMT structures. Both InP-HEMTs fea-tured gate lengths of 60 nm and a fixed gate-source distance of 50 nm; however, the gate-drain distance was 50 nm in one sample and260 nm in the other. The graph shows the dis-tribution of electron velocity in the channelwith the application of a drain voltage of 0.8

V and a gate voltage of -0.4 V. A clear veloci-ty overshoot effect was observed below thegate, and peak velocity increased when thegate-drain distance was shortened. We believethat the shorter gate-drain distance increasedthe lateral electric field immediately under thegate, resulting in rapid acceleration of theelectrons.

3.4 Increasing fmax with an asymmetricrecess

Improvement of fmax, on the other hand, canbe effectively achieved through an asymmetric

SHINOHARA Keisuke and MATSUI Toshiaki 99

(a) SEM cross-sectional image of tri-layer resist immediately after recessetching, (b) SEM cross-sectionalimage of asymmetric recess T-shapedgate

Fig.7

Dependence of cutoff frequency onside recess length

Fig.8

Electron velocity distribution in InP-HEMT with gate length of 60 nm (cal-culation results based on Monte Carlosimulations)

Fig.9

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recess structure featuring a shorter recesslength on the source side and a longer recesslength on the drain side [4]. fmax can beexpressed using equivalent circuit parametersin the following equation.

As indicated by the equation, to increasefmax, it is necessary to increase fT and gm whileat the same time reducing source resistance Rs,drain conductance gd, and gate-to-drain capac-itance Cgd. Figure 10 indicates the frequencydependence of the current gain (|h21|2) andMason’s unilateral gain (Ug) of two samples.Sample (a) featured a gate length of 60 nm,with recess lengths of 50 nm on the source anddrain sides, while sample (b) had a gate lengthof 60 nm with recess lengths of 50 nm on thesource side and 140 nm on the drain side. ThefT values were 439 GHz and 395 GHz, respec-tively. The long recess length on the drainside resulted in a reduced fT value. On theother hand, the fmax values were 382 GHz and500 GHz, respectively. Unlike the fT values,fmax values showed significant improvement inthe asymmetric recess sample. This improve-ment was due to the reduction of gd and Cgd

(i.e., below the values seen in the symmetricrecess sample) while Rs was maintained at alow level.

3.5 Effects of reduction of parasiticresistance

In an ultra-high-speed HEMT with fT in

excess of 500 GHz, parasitic resistance causedby the contact resistance (Rc) of the source anddrain electrodes and by sheet resistance (Rsh)in regions on the source and drain sides of thegate cannot be neglected. Although Rs is 0.21Ωmm in conventional structures, when theintrinsic gm (gmi) is assumed to be 2 S/mm, thisvalue becomes 40% of 1/ gmi (= 0.5 Ωmm).

We introduced a cap layer featuring amulti-layer structure with the aim of reducingRs and Rd[6]. Figure 11 shows the structure ofthe HEMT thus fabricated. Using a 72-nm-thick InGaAs/InP/In0.7Ga0.3As multi-layerstructure with high Si doping level of 2 × 1019

cm－3 reduced Rsh to 22.8 Ω/sq. (compared toapprox. 80 Ω/sq. seen in conventional struc-tures). The use of a pseudomorphicIn0.7Ga0.3As layer as the top layer reduced Rc to0.007 Ωmm (compared to 0.05 Ωmm in con-ventional structures). As a result, Rs wasreduced to 0.15 Ω mm, representing adecrease of approximately 30%. Figure 12shows the high-frequency performance of thefabricated pseudomorphic-channel In0.7Ga0.3AsHEMT with a gate length of 30 nm. The fT

was 547 GHz, and the fmax was 400 GHz. Thisqualified the component as the world’s fastestHEMT, with both fT and fmax exceeding 400GHz. The circle in Fig. 5 indicates the gate-

Journal of the National Institute of Information and Communications Technology Vol.51 Nos.1/2 2004

fmax = fT /［4 gd（Rs + Ri + Rg）+2（Cgd/Cgs）（（Cgd/Cgs）

+gm（Rs + Ri））］1/2 (1)

(a) High-frequency performance ofsymmetric recess HEMT (Lrs = Lrd = 50nm), (b) high-frequency perform-ance of asymmetric recess HEMT (Lrs =50 nm, Lrd = 140 nm)

Fig.10

Structure of pseudomorphic-channelInP-HEMT featuring multi-layer capstructure

Fig.11

SHINOHARA Keisuke and MATSUI Toshiaki 101

length dependence of fT and gm in this sample.

3.6 Reduction of channel width (one-dimensional channel InP-HEMT)

When the gate length becomes less than100 nm, a phenomenon known as the “short-channel effect” becomes prominent, and thegate voltage can no longer effectively controlthe carrier. Figure 5 indicates that gm is lowerwhen the gate length is less than 100 nm. Tomitigate this effect, we proposed using a nar-rower channel and providing bi-directionalgate-voltage control of the carrier in the chan-nel[7]. Figure 13 shows a schematic diagramof the narrow-channel InP-HEMT we fabricat-ed and a TEM image of the narrow channelsection of the actual device. Due to the wavi-ness of the barrier layer thickness in the depth-wise direction of the gate, electrons remainonly in the channel layer below the thick bar-rier-layer section. This wavy structure wascreated using electron beam (EB) lithographytechnology and wet-etching technology. Elec-trons in the narrow channel are controlled bygate voltage not only in the vertical directionbut also in the lateral direction; therefore, sup-pression of the degradation of gm in a shortgate becomes possible.

The graph in Fig. 14 was produced by

plotting the values of drain current per narrowchannel of an InP-HEMT fabricated with agate length of 100 nm against the width of thenarrow channel. The graph shows that theeffective channel width varied according togate voltage, indicating that carrier control inthe lateral direction was functioning effective-ly. We expect that this structure will lead toimproved electron transport property, based onthe one-dimensional quantization of the chan-nel, while also resulting in significant reduc-tion in noise.

4 Summary

In the future, we plan to use the high-per-formance InP-HEMTs introduced in this paperto develop new millimeter-wave communica-

High-frequency performance ofpseudomorphic-channel InP-HEMTwith gate length of 30 nm and multi-layer cap structure

Fig.12

(a) Structure of narrow-channel InP-HEMT; (b) TEM cross-sectional imageof narrow channel

Fig.13

Dependence of drain current onchannel width for each narrow-channel-HEMT

Fig.14

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tions equipment technology for the 100-to-150GHz frequency range, and to promote researchand development of various practical millime-ter-wave equipment such as ultra-broadband/ultra-low-noise amplifiers.

We would like to thank Dr. TakashiMimura, Fellow at Fujitsu Laboratories; Dr.

Kohki Hikosaka; Mr. Takumi Miyashita; Dr.Kazumi Kasai; Mr. Yoshimi Yamashita; Dr.Satoshi Endo; Dr. Keiji Ikeda; Prof. SatoshiHiyamizu at Osaka University; and Dr.Takahiro Kitada for their contributions tonumerous productive discussions relating toour research.

Journal of the National Institute of Information and Communications Technology Vol.51 Nos.1/2 2004

References1 Y. Yamashita et al., IEEE Electron Device Lett., Vol. 23, No. 10, pp. 573 – 575, 2002.

2 K. Shinohara et al., Japanese Journal of Applied Physics, Vol. 41, No. 4B, pp. L437–L439, 2002.

3 T. Suemitsu et al., Proceedings of IEEE International Electron Device Meeting, pp. 223– 226, 1998.

4 K. Shinohara et al., Journal of Vacuum Science & Technology B, Vol. 20, pp. 2096– 2100, 2002.

5 K. Shinohara et al., Proceedings of 14th Indium Phosphide & Related Materials Conference, pp. 451 – 454,

2002.

6 K. Shinohara et al., Proceedings of IEEE Device Research Conference, pp. 145–146, 2003.

7 K. Shinohara et al., Proceedings of 15th Indium Phosphide & Related Materials Conference, pp. 319–322,

2003.

SHINOHARA Keisuke, Ph. D.

Researcher, Millimeter-Wave DevicesGroup, Wireless CommunicationsDepartment

Compound Semiconductor Devices

MATSUI Toshiaki

Group Leader, Millimeter-WaveDevices Group, Wireless Communica-tions Department

High Frequency Measurement, Microwaveand Millimeter-Wave Devices and Cir-cuits