2011 CARTS - Creating Customized EDA Models

©2011 ECA (Electronics Components, Assemblies & Materials Association), Arlington, VA Proceedings CARTS USA 2011, 31st Symposium for Passive Electronics, March, Jacksonville, FL

Using KEMET Spice to Create Customized EDA Models for Capacitors John Prymak, Peter Blais, Paul Staubli, Ken Lai KEMET Electronics Corporation, 2835 KEMET Way, Simpsonville, SC 29681

Abstract There are many electronic design automation (EDA) models available from several capacitor manufacturers, but usually at room ambient temperatures, and with no DC bias. It is well known that the temperature sensitivity of the dielectrics creates a known change on the capacitance or the reactive element of these devices, but it also influences the resistive element of these devices. In many cases, the impact on the resistive element is much larger than the impact on the capacitance. With the higher dielectric constant ceramic capacitors used to achieve miniature surface-mount chips, the impact of the DC bias can drive the capacitance down to 10% of the original value as well as influencing the resistive element.

The models created for these devices are also impacted by temperature and voltage. The KEMET Spice software was built to allow these models to be compensated by these conditions and models created for all capacitors at different conditions are created quickly and easily.

Initial Models for a Single Part Type The KEMET Spice program was intended to create frequency and time responses for a selected part type. The initial screen of the program allows the operator to select the desired type from among aluminum polymer and tantalum, ceramic, and film capacitors.

Figure 1: This form is used to select from among the capacitor types.

Once a capacitor type is selected, the capacitor is created in a form, as shown in the Figure 2, for building a ceramic capacitor. The style selected is “0805”, with an “X5R” dielectric, and a voltage rating of 6.3 Vdc. From the capacitance list that satisfies these requirements, the 47-µF capacitor is chosen (or the “C0805C476M9PAC”).


Figure 2: This forma allows creating ceramic capacitor by electing size, dielectric, voltage, and then capacitance.

Once the exact capacitor is selected, then next step in the program is to plot the impedance and ESR versus frequency. In this view or any frequency plot, a pull-down menu will allow the model representing this capacitor to be displayed. Since the model makes no compensation for ESR and ESR is frequency dependent, the model will use the ESR at the selected frequency, or at 1 MHz as shown in Figure 3.

Figure 3: The first plot generated is impedance and ESR versus frequency.

Using either the pull-down menu and selecting “Model Display” or using the keyboard combination of <Control> and <D>, pressed simultaneously, the circuit model will appear (Figure 4). The circuit has defined nodes and R, L, and C elements with a numeric index. A listing of each element by R, L, or C, with applicable index and connection nodes in the circuit, is created to the right of the diagram. In the column immediately to the right of the listing is the value of that component, with R specified in Ohms, C in Farads, and L in Henries. These values are normally expressed in scientific notation.


Figure 4: Here is the circuit model and elements, with element values listed for the part at 1 MHz, and at 25°C.

Once the model is created, it can be saved in full conformance to several formats to a selectable drive and path. The available formats shown in Figure 5, include Ansoft, Cadence, Mentor, Sigrity, Simplis, as well as three variations of the generic NetList. The output file can also create two-port, S-Parameter files for either Shunt or Series configurations, and Touchstone Impedance (Z) files.

Figure 5: This form selects the path and format of the saved ASCII file for the model.

The default output is a NetList type of file listing each element in the model by its assigned identity, the connecting nodes in the circuit, and its value. Borrowing a convention used in most EDA models, the first line defines the sub circuit, the part type, and the connection nodes to the external circuit. Again borrowing by convention, comment lines are preceded by an asterisk (*), allowing information pertinent to the model’s creation and source.


Figure 6: Here is the default format for the ASCII file saved for this MLC capacitor.

In Figure 6, the window on the left represents a view of the ASCII file, while a diagram of the circuit is shown on the right. The second line defines the ambient temperature, applied DC bias and the frequency point at which the element values were obtained. The third line defines a JPEG file that represents the circuit, and the version of KEMET Spice that created the model. It is possible that a description of the device and its dielectric will also be included.

EDA File Formats for Selected Part Type With the default, non-specific format, any file type can be selected, as well as allowing for unique file type declarations. Once one of the defined formats is selected, the file type is in adherence to the required format of the selection. The most generic of the EDA formats is the NetList format shown below. There are three options available when selecting this file type: one that closes with “.END” statement and saved as a “.CKT” file, one the closes with “.ENDS” statement and saved as a “.CKT” file, and one that closes with the “.ENDS” statement and saved as a “.CIR” file type.

Figure 7: Here are three NetList Files saved with slight variations.

Notice that the content of the files is the same except for the ending or closing statement.


Figure 8: There are many similarities with the Ansoft, Mentor, Sigrity, and Simplis files to NetList files.

Looking at Ansoft, Mentor, Simplis, and Sigrity files (Figure 8) reveals many similarities to the NetList format (Figure 7). The second line, or first comment line in the Simplis files define the device as a capacitor or as a polar capacitor. The remaining comment lines and element lines are duplicated in each of these files. The Ansoft, Sigrity, and Simplis files are all “.CKT” file types, while the Mentor is a “.SP” file type. Mentor also requires that the file prefix define the manufacturer prior to the device identification.

Figure 9: The S-Parameter files contain frequency listings that cover six decades.

With the S-Parameter files, each line lists a frequency then the four scattering parameters (magnitude and phase) involved with a 2-port measuring system is generated (Figure 9). There are 50 points for each frequency decade, and six decades are listed, which reflect the frequency decades involved with the original Impedance and ESR versus frequency plots. There is a choice between measurements for a series connected device and a shunt connected device. In this file type, comment lines are prefixed with an exclamation sign (!). They include a


pictorial of each parameter measurement port created as comment lines. These files are capable of displaying the results for line and load impedances of 50 Ohms and 75 Ohms.

Figure 10: The Touchstone Impedance files are another file listing, but of Impedance and Phase (degrees).

Another file listing type of data file is the Touchstone Impedance files. Again, the frequency span is six decades and reflects the frequency range of the plotted Impedance and ESR of the initial program plot. Each frequency includes a magnitude of impedance (Ohms) and phase angle (degrees). It is effectively a one-port measurement and the file type is specified as “.z1p”.

Figure 11: The Cadence model is supported by three distinct files for text, a part listing, and the defined model.

The last EDA model type is the Cadence model as in Figure 11. This model requires three separate files. A text file for the part type is created to describe the part (“.TXT”), its pin count, function, connecting nodes, rated voltage, capacitance, tolerance, and the signal model. A listing file (“.DCL”) defines the part types included, as the list file and model file may contain multiple part types in ascending order. The model file (“.DCM”) defines the elements within the model.


Figure 12: Here is an Ansoft file for a tantalum device with a more complex effective circuit.

The models defined previously were for ceramic capacitors with seven or fewer elements, but for the electrolytic capacitors, more elements are required to define the capacitance roll-off with increasing frequency (Figure 12). Using the RC-Ladder elements allows the model to continue to reflect the device as the frequency moves away from the center frequency. There are circuits with 3-RC Ladder circuits, up to circuits with 10-RC ladder circuits (very lossy) used for these devices.

Figure 13: The program has an option to create multiple EDA models for families of part types.


Figure 14: Select EDA Models

Creating EDA Models for Multiple Part Types It would be very time consuming if the models were to be created by bringing up each part type and then creating the model for that part type, but there is a function in the program to allow large scale production of all part types, by capacitor type, and by series. At the beginning of the program, the operator is allowed to choose among the major capacitor types to continue to build a specific part number. Along the bottom of the form (Figure 13), a command button titled “Create Model Lists” will bring up a form that allows quick creations of many files for a given EDA model format.

Once the create model lists button is activated, the box as appears in Figure 14, appears to allow the operator to first choose the type of EDA models to be created. Not previously discussed are the Library of NetList, and the Linear worksheet.

The Cadence and Linear worksheet will first require that the Touchstone files be created as creating these files creates another file listing the self-resonance, and the ESR, capacitance, and inductance of the part types (Touchstone.Dat) which are all required to create the Cadence files and Linear worksheet. When creating the Touchstone files, only those part types selected will have data entered in the data file, therefore it is important that all part types be included in the Touchstone creation to allow these part types to create Cadence or Linear entries. The conditions specified in creating the Touchstone data file are included in the name of the data file, and control the conditions for the Cadence or Linear models.

In Figure 14, an asterisk identifies the Ansoft, Mentor, NetList, Sigrity, and Simplis selections as these models are extremely similar, but will be stored in separate locations.

Once the EDA model type is selected, another form (Figure 15) appears allowing the operator to select what is the source of the part types to be created. The KEMET Spice program contains over 8,000 part types and this is one source (1) for the desired part types. The alternative source for part types is in an Excel file named “Part List.XLS”, which can be downloaded to the \CKTs subdirectory of the program directory. If this file is not downloaded, it will not appear as an option. The conditions (2) defaults to 25°C and 0 Vdc, but the operator can change these. The frequencies (3) are divided among MLCC of C0G dielectric, MLCC capacitors not of C0G, and Aluminum, Tantalum, and Film capacitors. The drive and directory path (4) will initially default to the model type and then “Seed” if using the program part types, or “PartList” if using the Excel file as the part types’ source. The desired path is selectable by the operator to override the defaults and new directories can be created in this form.


Figure 15: Selecting which part types and conditions are required once EDA model type is selected.

The capacitor types are checked (5) for those desired, and once these are set, the full listing of all series within these types is displayed. Use the <Control> <Click> method to select or remove until only those series required are selected (6).

Table 1: Files and times to create commercial and military MLC capacitors.

Commercial SMD Military SMD All SMD PNs Seconds PNs Seconds PNs Seconds

Ansoft 2930 16 458 3 3388 19 Cadence 2930 6 458 2 3388 8 Mentor 2930 16 458 2 3388 18 NetList(.CKT/END) 2930 16 458 3 3388 19 NetList(.CKT./.ENDS) 2930 15 458 2 3388 17 NetList(.CIR./.ENDS) 2930 15 458 2 3388 17 NetList Library 2930 18 458 3 3388 21 S-Param (Shunt) 2930 30 458 6 3388 36 S-Param (Series) 2930 30 458 6 3388 36 Sigrity 2930 15 458 2 3388 17 Simplis 2930 19 458 4 2958 23 Touchstone Z 2930 32 458 5 2958 37

The time in which the files are created is very short. In Table 1, the numbers of models created are listed as well as the time required to complete them. In the first line for Ansoft EDA models, 2,930 models were created for the commercial MLCCs in 16 seconds, while 458 models of military MLCCs were created in 3 seconds. The time to create all 3388 models of MLCCs for Ansoft was 19 seconds. The times involved in the other EDA models are also listed. Because the frequency listed S-Parameter and Touchstone files require many more lines, their times are extended.


Table 2: Files and times to create commercial and military aluminum and tantalum capacitors.

Commercial SMD Military SMD All SMD PNs Seconds PNs Seconds PNs Seconds

Ansoft 2125 13 833 5 2958 18 Cadence - - - - - - Mentor 2125 13 833 6 2958 19 NetList(.CKT/END) 2125 13 833 6 2958 19 NetList(.CKT./.ENDS) 2125 13 833 5 2958 18 NetList(.CIR./.ENDS) 2125 13 833 5 2958 17 NetList Library 2125 13 833 9 2958 22 S-Param (Shunt) 2125 31 833 11 2958 42 S-Param (Series) 2125 31 833 11 2958 42 Sigrity 2125 15 833 6 2958 21 Simplis 2125 22 833 8 2958 30 Touchstone Z 2125 27 833 10 2958 37

Because the elements in the electrolytic capacitors (aluminum and tantalum) are higher in number, comparing the times to create these files is somewhat offset as the number of files created is lower than the MLCCs. From the model count and time to create, the MLCCs are created at a rate of 183 models per second, while the electrolytic are created at a rate of 163 models per second.

Table 3: Combining commercial and military for all types for

File Size .TXT File Size

.DCL File Size

.DCM File Size

PNs mm:ss (bytes) (bytes) (bytes) (bytes) Ansoft 8518 0:48 340 Cadence 5560 0:14 ►► 320 38 to 5.4k 8.7k to 250k Mentor 8518 0:49 340 NetList(.CKT/END) 8518 0:49 340 NetList(.CKT./.ENDS) 8518 0:46 340 NetList(.CIR./.ENDS) 8518 0:45 340 NetList Library 8518 0:57 5.4k to 200k (126 Library Files) S-Param (Shunt) 8518 1:46 33k S-Param (Series) 8518 1:46 33k Sigrity 8518 0:51 340 Simplis 8518 1:14 400 Touchstone Z 8518 1:37 11k

Using all the part types available in the KEMET Spice program, and creating models for all, is shown in Table 3. There were 8,518 part types at this time and to create Ansoft files for all required 48 seconds. The average file sizes are also shown with the similar types creating model files close to 340 bytes in size, with the Touchstone Impedance files requiring about 11 Kbytes of space, and the S-Parameter files requiring about 33 Kbytes of space. It is evident that these larger files require the longest times to create 8,518 model files. The Cadence number is smaller because it would be wrong to create simplistic RLC models for the electrolytic aluminum and tantalum devices, and these devices are omitted in these models.

As mentioned earlier, an Excel file “Part List.XLS”, can be downloaded from the KEMET Spice web site that contains a trimmed down listing of part types that you can modify as your company’s entire inventory of part types. The Excel file as downloaded from the web will contain a mixture of many part types, totaling 545 in number. Using the “Part List.XLS” file as the source of all 545-part numbers required for my company’s needs, the model files could be created more quickly as shown in Table 4.


Table 4: Using 545 Part Numbers in “Part List.XLS” as source.

File Size .TXT File Size

.DCL File Size

.DCM File Size

PNs mm:ss (bytes) (bytes) (bytes) (bytes) Ansoft 545 0:07 340 Cadence 193 0:02 ►► 193 22 to 156 822 to 18k Mentor 545 0:08 340 NetList(.CKT/END) 545 0:08 340 NetList(.CKT./.ENDS) 545 0:07 340 NetList(.CIR./.ENDS) 545 0:07 340 NetList Library 545 0:12 3k to 70k (54 Library Files) S-Param (Shunt) 545 0:13 33k S-Param (Series) 545 0:12 33k Sigrity 545 0:08 340 Simplis 545 0:08 400 Touchstone Z 545 0:11 11k

Creating Multiple Temperature and Bias Condition Models

Figure 16: Creating Multiple Models for Multiple Temperatures, Multiple Bias Levels

It is possible to change the temperature and bias settings to create a unique set of models adhering to those conditions. Using Ansoft as the desired EDA model, the default path, “.\CKTs\Ansoft\Seed”, holds the models representing 25°C and 0Vdc bias, while new directories can be create to hold other temperature and bias settings. In Figure 16, directories were created for 25°C and 1.2 Vdc, -40°C with 0Vdc and 1.2 Vdc, as well as 80°C at 0Vdc and 1.2 Vdc.

Remember that the only capacitor type affected by the bias is ceramic, specifically every dielectric except C0G. Creating subdirectories for bias conditions should not include aluminum, tantalum, and film type capacitors, but these should be included for the temperature variation at 0 Vdc as they are affected by temperature.


Figure 17: Temperature and voltage settings adjusted in Touchstone, creates adjustments for Cadence and Linear.

Because the Cadence and Linear model files are created from data files generated while the Touchstone Impedance files are created, changes in temperature and voltages must be made in the Touchstone data model creation. The data file that Cadence and Linear feed from will appear in the Select Data File list box (Figure 17), each with a description of the temperature and voltage at which it was created.

Summary It is possible create EDA models for Ansoft, Cadence, Linear, Mentor, Sigrity, Simplis systems with variations accounted for voltage and temperature in a timely manner. These same variables can be used to create Touchstone Impedance and S-Parameter files adjusted for these conditions. Time to create the models will depend on the breadth of product desired, with a smaller parts list running much faster than a larger list.

Bibliography 1. KEMET Electronics Corp., KEMET Spice, version 3.7.53, December 2010,

http://kemetworld.kemet.com/kemet/web/homepage/kechome.nsf/weben/kemsoft

2. Prymak, J., P. Blais, W. Buchanan, E. Chen, K. Lai, G. Malagoli, A. Mayar, M. Niskala, A. Schmidt, P. Staubli, B. Vildaver, KEMET Electronics, “Capacitor EDA Models with Compensations for Frequency, Temperature, and DC Bias”, 2010 Capacitor and Resistor Technology Symposium Proceedings, Electronic Components Associates, Inc., New Orleans, LA, March 2010

3. Prymak, J., A. Mayar, KEMET Electronics Corp., “Errors with Capacitor EDA Models”, 2010 Cadence Energize Live Webinar, February 2010

4. Long, B., M. Prevallet, J. Prymak, “KEMET Spice – An Update”, 2004 Capacitor and Resistor Technology Symposium Proceedings, Electronic Components Associates, Inc., March 2004

5. Prymak, J., “SPICE Modeling of Capacitors”, 1995 Capacitor and Resistor Technology Symposium Proceedings, Components Technology Institute, Inc., March 1995

2011 CARTS - Creating Customized EDA Models

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