2-Port USB 3.0 Hub Reference Design

3.3 V

1.1 V

TI DesignsTIDA-00287 2-Port USB 3.0 Hub Reference Design

TI Designs Design FeaturesTI Designs provide the foundation that you need The TIDA-00287 is a fully functioning 2-port USB 3.0including methodology, testing and design files to hub:quickly evaluate and customize the system. TI Designs • Supports individual port power controlhelp you accelerate your time to market.

• ESD protection on both upstream and downstreamportsDesign Resources

• Operates as a bus-powered device (all powerIEC ESD Protection DiodesTPD6E05U06 being supplied by the upstream host or hub)

TUSB8020B 2-Port USB Hub • Supports operation as a USB 3.0 and USB 2.0TPS2553 Power Distribution Switch deviceTLV70033 LDO Linear Regulator

Featured ApplicationsLM3674 600-mA Buck Converter

• Computer systems• Docking stationsASK Our Analog Experts• MonitorsWEBENCH® Calculator Tools

• Set-top boxes

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An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and otherimportant disclaimers and information.

All trademarks are the property of their respective owners.

1TIDU428–November 2014 TIDA-00287 2-Port USB 3.0 Hub Reference DesignSubmit Documentation Feedback

Copyright © 2014, Texas Instruments Incorporated

http://www.ti.com/product/tpd6e05u06

http://www.ti.com/product/TUSB8020B

http://www.ti.com/lit/pdf/SLVS841

http://www.ti.com/lit/pdf/SLVSA00

http://www.ti.com/lit/pdf/SNVS405

http://e2e.ti.com/

http://e2e.ti.com/support/development_tools/webench_design_center/default.aspx

http://e2e.ti.com

http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=TIDU428

3.3 V

1.1 V

Circuit Description www.ti.com

1 Circuit DescriptionThe USB 3.0 Hub Design is a two-port USB 3.0 compliant hub. It provides simultaneous SuperSpeed andhigh-speed/full-speed connections on the upstream port and provides SuperSpeed, high-speed, full-speed, or low-speed connections on the downstream ports. The hub design provides power control foreach downstream port and overcurrent protection

2 Theory of OperationA block diagram of the design in Figure 1 shows a USB 3.0 Hub with a Type A plug upstream port andtwo USB 3.0 Type A downstream ports. Power for the design is shown as well as ESD protectionelements on the upstream and downstream sides of the hub. Downstream port current limiting is providedby two TPS2553 (Adjustable Current-Limited Power-Distribution Switch) devices.

Figure 1. TIDA-00287 Functional Block Diagram

2.1 TUSB8020BThe TUSB8020B is a two port USB 3.0-compliant hub device. It provides SuperSpeed and high/full speedconnections on the upstream port. It also supports SuperSpeed, high/full speed or low-speed connectionson the downstream ports. When the upstream port is connected to an environment that supports onlyhigh-speed or full-speed/low-speed connections, SuperSpeed is disabled on the downstream ports. Whenthe upstream port is connected to an environment that supports only full-speed/low-speed connections,SuperSpeed and high-speed are both disabled on the downstream ports.

The hub supports overcurrent protection and battery charging as well as either ganged switching or perport power switching.

The USB 3.0 hub is configured with the de-assertion of RESET. Refer to Table 1 for the default values.

Table 1. TUSB8020B Power-on Reset Settings

TUSB8020B Function StatusDownstream port power management EnabledPower control signal polarity Signals are active highPower port control Ganged Power control supported

2 TIDA-00287 2-Port USB 3.0 Hub Reference Design TIDU428–November 2014Submit Documentation Feedback


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ACTIVE HIGH ENABLE:

THIS SETS THE CURRENT

LIMIT TO 901.5mA (TYP)

FLT_PORT1#EN_PORT1

VBUS_OUT_PORT_1

BOARD_5V

EN_PORT1[P3] FLT_PORT1# [P3]

VBUS_OUT_PORT_1 [P4]

C4922uF

0603

U17

TPS2553

SOT23_6

IN1

GND2

EN3

FAULT#4

ILIM5

OUT6

R2828.7K0402

C454.7uF

0402

C500.1uF

0402

R2747K0402

+3.3 V

+1.1 V

www.ti.com Theory of Operation

2.2 System PowerThe main power on the board is 5 V and is supplied by the upstream USB port. Figure 2 shows theconfiguration of the board’s power system. The 5 V coming from the upstream USB port is regulated downto 3.3 V through a TLV70033 LDO regulator. An LM3674 switching regulator is used to supply 1.1-Vpower for the core voltage to the TUSB8020B. The 5-V power is also passed to the TPS2553 current-limiting switches that supply power to the down-stream ports.

Figure 2. Power Subsystem

2.3 Downstream USB Power DeliveryUSB power for downstream ports is provided by two TPS2553 (Adjustable Current-Limited Power-Distribution Switch). These switches are controlled by the USB hub chip, and have adjustable currentlimits on the outputs. This design is set for a current limit of 901.5 mA (typical).

Figure 3. Downstream Power Delivery

3 Component SelectionAll components contained in this design are chosen to provide a low-cost solution when purchased inlarge quantities, while minimizing component count and maintaining performance to satisfy the designcriteria.

3.1 Hub SelectionThe TUSB8020B was chosen as a low cost 2 port USB 3.0 hub. It supports both USB 3.0 and USB 2.0 forboth upstream and downstream ports. Battery charging can be supported as can be per-port or gangedpower switching. An OTP ROM is included for custom 3rd party VID/PID and device configuration. Thereare no special drivers required for this hub.



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C532.2uF

0402

U22

LM3674

SOT_23_5

VIN1

GND2

EN3

FB4

SW5

BOARD_5V

C5415pF

0402

R3110K0402

C5510uF

0603

L3

[email protected]_1008

R33200K0402

R32237K0402

BOARD_1P1VBOARD_5V

1.1V @ 450mA

C570.1uF

0402

BOARD_5V

C511.0uF

0402

R3010K0402 U21

TLV70033

SC70-5

VIN1

EN3

GND2

VOUT5

NC

4

BOARD_3P3V

C521.0uF

0402

3.3V LDO - 200mA

3.3V @100mA

BOARD_5V

C560.1uF

0402

Component Selection www.ti.com

3.2 Downstream Power SwitchesThis design uses two TPS2553 current-limited power distribution switches. These parts have adjustablecurrent limits that can be set by an external resistor. Both ports have been designed to deliver ~900 mA. Itshould be noted that some USB 3.0 ports can supply far in excess of the minimum 900-mA current. If theupstream USB 3.0 port that the hub is plugged into can provide in excess of 1.8 A, then both downstreamports will support the full 900 mA of current.

3.3 ESD ComponentsESD protection for all USB ports is supplied by the TPD6E05U06 devices. This part provides ESDprotection for 3 differential pairs at data speeds of up to 6GBps and has low capacitance of 0.5 pF. EachUSB port uses one of these parts to protect the port. The package allows for straight through routing andis placed as close to the USB connector as possible. Application of ESD protection is recommended.

3.4 2-Port PowerThe main power for the board is +5 V. This is supplied from the upstream USB port only. The voltages forthe hub are generated from 2 different regulators. U21 (TLV70033) takes the BOARD_5V and regulates itdown to 3.3 V (refer to Figure 4). The TLV70033 is an LDO that is capable of supplying 200 mA. U22(LM3674) generates the 1.1-V power rail used for the TUSB8020B core voltage. Figure 5 showsschematics of the power supply circuitry for the hub. The circuit was designed using TI’s Webench DesignTool, and selected for the small PCB footprint and low component cost.

Figure 4. TUSB8020B Power Supply (TLV70033)

Figure 5. TUSB8020B Power Supply (LM3674)



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www.ti.com PCB Design

4 PCB DesignThe PCB stack-up design was chosen to accommodate the 90-Ω impedance of USB 3.0 signal traces. Atrace width of 4.4 mils and differential pair spacing of 5 mils is used with this layout. All USB 3.0 traces arerouted on the top side of the board and references a solid ground plane that is layer 2. Layer 3 is thepower layer and includes the 5- and 1.1-V supplies. The bottom side, layer 4, is where the 3.3-V supply isrouted as well as all other traces. To simplify the assembly process, all components are placed on the topside of the board. Figure 6 through Figure 11 show the layout for all 4 layers as welll as the silk screens

Figure 6. Top Layer – USB 3.0 Routes



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PCB Design www.ti.com

Figure 7. Layer 2 – Ground Plane

Figure 8. Layer 3 – Power Plane (+5 V and +1.1 V)



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www.ti.com PCB Design

Figure 9. Bottom Side - +3.3-V Power and Routing

Figure 10. Top Side Silk Screen



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PCB Design www.ti.com

Figure 11. Bottom Side Silk Screen

4.1 Layout GuidelinesAll USB 3.0 and USB 2.0 lines must be routed as controlled impedance, high-speed differential pairs.Minimize the use of vias and 90 degree corners in the routing of the high-speed lines. Assure the high-speed lines reference a solid ground plane and the plane is void of cuts and splits to prevent impedancediscontinuities. ESD connection points need to be placed in-line with the high-speed signal traces toreduce reflections caused by routing discontinuities.

4.2 PCB Stack-upFigure 12 shows the PCB stack-up used for the TIDA-00287 reference design.

Figure 12. PCB Stack-up



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www.ti.com Verification and Measured Performance

5 Verification and Measured Performance

5.1 Compliance Testing

5.1.1 USB 2.0 – Downstream Port 1

Figure 13. USB 2.0 Downstream Signal Quality Eye Diagram - Port 1

Figure 14. USB 2.0 Downstream Signal Quality Plot - Port 1



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Verification and Measured Performance www.ti.com


Figure 15. USB 2.0 Downstream Signal Quality Eye Diagram - Port 2

Figure 16. USB 2.0 Downstream Signal Quality Plot - Port 2



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5.1.3 USB 2.0 – Downstream Port 1 without ESD Protection

Figure 17. USB 2.0 Downstream Signal Quality Eye Diagram - Port 1 Without ESD Protection Device

Figure 18. USB 2.0 Downstream Signal Quality Plot - Port 1 Without ESD Protection Device



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5.1.4 USB 2.0 – Downstream Port 2 without ESD Protection

Figure 19. USB 2.0 Downstream Signal Quality Eye Diagram - Port 2 Without ESD Protection Device

Figure 20. USB 2.0 Downstream Signal Quality Plot - Port 2 Without ESD Protection Device



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Figure 21. USB 3.0 Downstream CP1 Eye Diagram - Port 1




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OSnom 0.977ILIM

23950 VI (mA)

R k

:

www.ti.com Design Options

6 Design OptionsThis section discusses different design options that were evaluated for this project to give the designerflexibility to modify the design.

6.1 ESD ProtectionWe chose the TPD6E05U06 part to provide ESD protection on this design. It was also chosen due to itssmall size, capability to provide protection of up to 3 differential pairs, and low capacitance. The packageallows for flow-through routing. Another option is using 3 single package parts for each USB connector(TPD2EUSB30). This allows more flexibility in board routing.

6.2 TUSB8020B OptionsThe TUSB8020B has an interface for an optional I2C EEPROM or SMBUS host. This can be used forstoring vendor information and other start-up parameters. An I2C EEPROM like the AT24C04 or aSMBUS host can be connected to the serial interface for this purpose, but is not a design requirement. Inthis design a 24-MHz fundamental frequency crystal was used to generate the clock (CTS FrequencyControls #445C25D24M00000). Optionally, a 24-MHz oscillator can be used and connected to XI pin (pin38). Table 2 lists the options for the TUSB8020B that are set at the rising edge of the Grst# pin (pin 11).

Table 2. Power-on Reset Options

Signal Name (Pin #) Default ConditionSMBUSz/SS_DN2 (pin 22) Pull-Up 0 = SMBbus enabled

1 = I2C enabledFPMGT/SMBA1/SS_UP (pin 36) Pull-Up 0 = downstream power switching supported

1 = downstream power switch not supportedPWRCTL_POL/SS_DN1 (pin 21) Pull-Down 0 = PWRCTL polarity is active high

1 = PWRCTL polarity is active lowGANGED/SMBA2/HS_UP (pin 35) Pull-Up 0 = Individual port power control supported

1 = Ganged power control supportedPWRCTL/BATEN(pins 4 and 6) Pull-Down 0 = Battery charging not supported

1 = Battery charging supported

6.3 Power Delivery OptionsTI has many options for providing power to downstream USB ports. In the reference design, the TPS2553is used to reduce component count. This part has an adjustable current limit that is controlled by anexternal resistor. R28 is used to set the current limit on downstream port 1, and R25 for port 2. Theequation used to calculate the current limit is as follows:

(1)

6.4 Power OptionsThe TUSB8020B requires 1.1 V for core logic and 3.3 V for I/O logic. The current requirements can beseen in the datasheet (SLLSEF6), and TI has many power solutions. Since 3.3 V has a low-powerrequirement, a low-cost, low-component-count LDO was used to step down the BOARD_5V to 3.3 V. The1.1-V power rail is generated by an LM3674 – step down switching regulator.



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http://www.ti.com/product/TUSB8020B


USB3.0 TUSB8020B

VBUS_IN

VBUS_IN

REGULATORS

PORT 1

PORT 2

5V VBUS_OUT_1

VBUS_OUT_1

VBUS_OUT_2

TUSB8020B BLOCK DIAGRAM

Page 2

Page 3

Page 4

Page 4

Page 5

Page 6

UPSTREAMUSB PORT

DOWNSTREAMPORT 1

DOWNSTREAMPORT 2

TPS2553

TPS25535V VBUS_OUT_2

Page 5

Schematic www.ti.com

7 SchematicFigure 25 through Figure 30 illustrate the electrical schematics for the TUSB8020B.

Figure 25. Schematic (1 of 6)



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USB 3.0 TYPE-A PLUG CONNECTOR

(RIGHT ANGLE)

USB3.0 TYPE-A UPSTREAM CONNECTOR

ROUTE THESE LINES ON THE TOP SIDE ONLY

KEEP CAPS CLOSE TO CONNECTOR

VBUS_PUP_FB

SSTXM_PUPSSTXP_PUP

BOARD_5V

DM_UP [P3]

DP_UP [P3]

SSTXM_UP [P3]

SSTXP_UP [P3]

SSRXM_UP [P3]

SSRXP_UP [P3]

C10.1uF

0402

U16

TPD6E05U06

UQFN_14_142X57_20

D1

+1

4

D1

-1

3

D2

+1

2

D2

-11

D3

+9

D3

-8

GN

D5

5

GN

D1

01

0

NC

11

NC

22

NC

33

NC

44

NC

66

NC

77

C2 0.1uF0201RND

J1

USB3_PLUG

CON_SMRT_USB3A_M

VBUS1

DM2

DP3

GND4

SSTXN5

SSTXP6

GND17

SSRXN8

SSRXP9

SHIELD010

SHIELD111

C3 0.1uF

0201RND

FB1

220 @ 100MHZ, 2A0603

www.ti.com Schematic




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TUSB 2 PORT USB3.0 HUB

UPSTREAM PORT

DOWNSTREAM PORTS

XIXOGRST#

SSTXP_UPSSTXM_UPSSRXP_UPSSRXM_UPDP_UPDM_UP

USB_VBUS_UP

SSTXP_DN1SSTXM_DN1SSRXP_DN1SSRXM_DN1DP_DN1DM_DN1EN_PORT1FLT_PORT1#

SSTXP_DN2SSTXM_DN2SSRXP_DN2SSRXM_DN2DP_DN2DM_DN2EN_PORT2FLT_PORT2#

PWRCTL_POLGANGED

USB_R1

I2C_SDAI2C_SCL

PWR_MGMT_EN#

TEST

BOARD_1P1V

BOARD_3P3V

BOARD_1P1V BOARD_3P3V

BOARD_3P3V

BOARD_5V

SSTXP_UP[P2]SSTXM_UP[P2]

DP_UP[P2]DM_UP[P2]

SSRXP_DN1 [P4]SSRXM_DN1 [P4]

FLT_PORT1# [P5]

SSTXP_DN1 [P4]SSTXM_DN1 [P4]

EN_PORT1 [P5]DM_DN1 [P4]DP_DN1 [P4]

SSTXP_DN2 [P4]SSTXM_DN2 [P4]

SSRXP_DN2 [P4]SSRXM_DN2 [P4]DP_DN2 [P4]DM_DN2 [P4]

FLT_PORT2# [P5]

EN_PORT2 [P5]

SSRXP_UP[P2]SSRXM_UP[P2]

C418pF0402

C7.01uF

0402

R84.7K0402

C80.1uF

0402

R94.7K0402

R1DNI0402

R69.53K0402

C90.1uF

0402

U1-2

TUSB8020B

QFP_48_284X284_20_THMPAD

VDD11

VDD212

VDD318

VDD430

VDD534

VDD645

VDD33_17

VDD33_213

VDD33_323

VDD33_425

PAD49

VDD33_533

VDD33_637

VDD33_740

VDD33_848

C518pF0402

C100.1uF

0402

R24DNI0402

R34.7K0402

C13.01uF

0402

C19.01uF

0402

C600.1uF

0402

C14.01uF

0402

C11.01uF

0402

C63.01uF

0402

Y1

24MHz

XTAL_2_SM_197X126

C61uF0402

R2 DNI,1M0402

C150.1uF

0402

C1210uF

0402

U1-1

TUSB8020B QFP_48_284X284_20_THMPAD

XI38

XO39

GRST#11

USB_SSTXP_UP29

USB_SSTXM_UP28

USB_SSRXP_UP32

USB_SSRXM_UP31

USB_DP_UP26

USB_DM_UP27

USB_R124

USB_VBUS9

USB_SSTXP_DN143

USB_SSTXM_DN144

USB_SSRXP_DN146

USB_SSRXM_DN147

USB_DP_DN141

USB_DM_DN142

PWRCTL1/BATEN14

OVERCURZ15

USB_SSTXP_DN216

USB_SSTXM_DN217

USB_SSRXP_DN219

USB_SSRXM_DN220

USB_DP_DN214

USB_DM_DN215

PWRCTL2/BATEN26

OVERCURZ28

SCL/SMBCLK2

SDA/SMBDAT3

SMBUSz/SS_DN222

FPMGT/SMBA1/SS_UP36

PWRCTL_POL/SS_DN121

GANGED/SMBA2/HS_UP35

TEST10

C610.1uF

0402

C640.1uF

0402

R590.9K0402

C160.1uF

0402

C1710uF

0402

C62.01uF

0402

C650.1uF

0402

R44.7K0402

R710K0402

C18.01uF

0402





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SINGLE USB 3.0 CONNECTOR



SINGLE USB 3.0 CONNECTOR

DOWNSTREAM USB PORTS 1&2

PORT 1

PORT 2

VBUS_P1_FB

SSRXM_DN1SSRXP_DN1

HUB_SSTXP_P1

HUB_SSTXM_P1

VBUS_P2_FB

SSRXM_DN2SSRXP_DN2

HUB_SSTXP_P2

HUB_SSTXM_P2


DM_DN1 [P3]

DP_DN1 [P3]

SSTXM_DN1 [P3]

SSTXP_DN1 [P3]


DM_DN2 [P3]

DP_DN2 [P3]

SSTXM_DN2 [P3]

SSTXP_DN2 [P3]

SSRXM_DN1 [P3]

SSRXP_DN1 [P3]

SSRXM_DN2 [P3]

SSRXP_DN2 [P3]

FB5

220 @ 100MHZ,2A0603

FB4

220 @ 100MHZ,2A0603

C44 0.1uF0201RND

C40 0.1uF0201RND

U19

TPD6E05U06

UQFN_14_142X57_20

D1

+1

4

D1

-1

3

D2

+1

2

D2

-11

D3

+9

D3

-8

GN

D5

5

GN

D1

01

0

NC

11

NC

22

NC

33

NC

44

NC

66

NC

77

J5

USB3_TYPEA_CONNECTER

CON_THRT_USB3A_F3

VBUS1

DM2

DP3

GND4

SSRXN5

SSRXP6

GND7

SSTXN8

SSTXP9

SHIELD010

SHIELD111SHLD2

12

SHLD313

U20

TPD6E05U06

UQFN_14_142X57_20

D1

+1

4

D1

-1

3

D2

+1

2

D2

-11

D3

+9

D3

-8

GN

D5

5

GN

D1

01

0

NC

11

NC

22

NC

33

NC

44

NC

66

NC

77

J4

USB3_TYPEA_CONNECTER

CON_THRT_USB3A_F3

VBUS1

DM2

DP3

GND4

SSRXN5

SSRXP6

GND7

SSTXN8

SSTXP9

SHIELD010

SHIELD111SHLD2

12

SHLD313

C32 0.1uF

0201RND

C42 0.1uF

0201RND

C430.1uF

0402

C340.1uF

0402





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ACTIVE HIGH ENABLE:

USB POWER DELIVERY



ACTIVE HIGH ENABLE:



FLT_PORT1#EN_PORT1

FLT_PORT2#EN_PORT2

VBUS_OUT_PORT_1

VBUS_OUT_PORT_2

BOARD_5V

BOARD_5V





R2528.7K0402

C4922uF

0603

C464.7uF

0402

C4722uF

0603

C454.7uF

0402

R2747K0402

U18

TPS2553

SOT23_6

IN1

GND2

EN3

FAULT#4

ILIM5

OUT6

C500.1uF

0402

U17

TPS2553

SOT23_6

IN1

GND2

EN3

FAULT#4

ILIM5

OUT6

R2828.7K0402

R1947K0402

C480.1uF

0402





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Vf=3.3V@20mA

3.3V LDO - 200mA

3.3V @100mA

1.1V @ 450mA

BOARD_5V LED

BOARD_5V

BOARD_5V BOARD_3P3VBOARD_5V

BOARD_5V BOARD_1P1VBOARD_5V

C5415pF

0402C5510uF

0603

R3110K0402

U21TLV70033

SC70-5

VIN1

EN3

GND2

VOUT5

NC

4

C560.1uF

0402

C570.1uF

0402

L3

[email protected]_1008

C521.0uF

0402

D4LEDBlue0603

R291800402

R32237K0402

C532.2uF

0402

R33200K0402

U22

LM3674

SOT_23_5

VIN1

GND2

EN3

FB4

SW5

R3010K0402

C511.0uF

0402





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Bill of Materials www.ti.com

8 Bill of MaterialsTable 3 lists the BOM for this reference design.

Table 3. Bill of MaterialsItem Qty Reference Value Part Description Manufacturer Manufacturer Part Number PCB Footprint

1 16 C1,C8,C9,C10,C15,C16,C34,C43,C 0.1uF cap 0402, 0.1uF, +/- 10%, X7R, 16V TDK Corporation C1005X7R1C104K 040248,C50,C56,C57,C60,C61,C64,C65

2 6 C2,C3,C32,C40,C42,C44 0.1uF cap 0201, 0.1uF, +/- 20%, X5R, 6.3V TDK Corporation C0603X5R0J104M030BC 0201RND

3 2 C4,C5 18pF cap 0402, 18pF, +/- 5%, COG (NPO), 50V Murata Electronics North America GRM1555C1H180JZ01D 0402

4 3 C6,C51,C52 1uF cap 0402, 1uF, +/- 10%, X5R, 10V Taiyo Yuden LMK105BJ105KV-F 0402

5 8 C7,C11,C13,C14,C18,C19C62,C63 .01uF cap 0402, 0.1uF, +/- 10%, X7R, 50V Murata Electronics North America GRM155R71H103KA88D 0402

6 2 C12,C17 10uF cap 0402, 10uF, +/- 20%, X5R, 6.3V Samsung CL05A106MQ5NUNC 0402

7 2 C45,C46 4.7uF cap 0402, 4.7uF, +/- 10%, X5R, 6.3V TDK Corporation C1005X5R0J475K 0402

8 2 C47,C49 22uF cap 0603, 22uF, +/- 20%, X5R, 6.3V TDK Corporation C1608X5R0J226M 0603

10 1 C53 2.2uF cap 0402, 2.2uF, +/- 20%, X5R, 6.3V TDK Corporation C1005X5R0J225M 0402

11 1 C54 15pF cap 0402, 15pF, +/- 5%, COG, 50V Venkel C0402COG500-150JNE 0402

12 1 C55 10uF cap 0603, 10uF, +/- 20%, X5R, 6.3.V TDK Corporation C1608X5R0J106M080AB 0603

13 1 D4 LED - Blue LED BLUE, 0805, 104MCD, 20mA Lite-On Inc. LTST-C170TBK 0805

15 3 FB1,FB4,FB5 220 @ 100MHZ,2A EMI Filter Beads, 220 Ohms, 25% MuRata BLM18EG221SN1D 0603

16 1 J1 USB3_PLUG USB 3.0 - A Type R/A Assmann A-USB/3-A-LP/SMT-R CON_SMRT_USB3A_M

17 2 J4,J5 USB3_TYPEA_CONNECTOR Connectors USB 3.0, Super Speed USB - A, FCI 10117835-002LF USB - A, ReceptacleReceptacle

18 1 L3 [email protected] INDUCTOR 2.2UH 20% 1.3A 1008 Murata LQM2HPN2R2MG0L IND_1008

19 2 R1,R24 DNI DNI DNI DNI 0402

20 1 R2 DNI,1M DNI DNI DNI 0402

21 3 R7,R30,R31 10K RES 0402, 10K, +/- 1%, 1/10W Panasonic Electronic Components ERJ-2RKF1002 0402

22 4 R3,R4,R8,R9 4.7K RES 0402, 4.7K, +/- 1%, 1/16w Vishay Dale CRCW04024K70FKED 0402

23 1 R5 90.9K RES 0402, 90.9K, +/- 1%, 1/16W Yageo RC0402FR-0790K9L 0402

24 1 R6 9.53K RES 0402, 9.53K, +/- 1%, 1/16w Vishay Dale CRCW04029K53FKED 0402

25 2 R19,R27 47K RES 0402, +/- 1%, 1/10W Panasonic Electronic Components ERJ-2RKF4702X 0402

26 2 R25,R28 28.7K RES 0402, 28.7k, +/- 1%, 1/16w Venkel CR0402-16W-2872FT 0402

27 1 R29 180 RES 0402, 180, +/- 1%, 1/16W Panasonic Electronic Components ERJ-2RKF1800X 0402

28 1 R32 237K RES 0402, 237K, +/- 1%, 1/10W Panasonic Electronic Components ERJ-2RKF2373X 0402

29 1 R33 200K RES 0402, 200K, +/- 1%, 1/16W Panasonic Electronic Components ERJ-2RKF2003X 0402

30 1 U1 TUSB8020B Two-Port USB Hub TEXAS INSTRUMENTS TUSB8020B QFP_48_284X284_20_THMPAD

31 3 U16,U19,U20 TPD6E05U06 IEC ESD protection diodes TEXAS INSTRUMENTS TPD6E05U06RVZ UQFN_14_142X57_20

32 2 U17,U18 TPS2553 Power Distribution Switch TEXAS INSTRUMENTS TPS2553DBV SOT23_6

33 1 U21 TLV70033 LDO linear regulator TEXAS INSTRUMENTS TLV70033DCK SC70-5

34 1 U22 LM3674 600 mA Buck Converter TEXAS INSTRUMENTS LM3674MF-ADJ/NOPBTR-ND SOT_23_5

35 1 Y1 24MHz 24 MHz Crystal CTS Freq Controls 445C25D24M00000 XTAL_2_SM_197X126



http://www.ti.com


www.ti.com Acknowledge and References

9 Acknowledge and References1. USB 3.0 Electrical Compliance Test Specification2. Agilent DSA91304A USB 3.0 Receiver Testing



http://www.ti.com

http://www.usb.org/developers/compliance/ssusb_testing/PHY_ComplianceTest_Spec09RC5_11_11_2009.pdf

http://www.home.agilent.com/en/pd-1789429-pn-N4903B/usb3-receiver-testing?&cc=US&lc=eng


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2-Port USB 3.0 Hub Reference Design

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