1642 - Technical Handbook

3AL 97156 AAAA Ed.01 TQCVA

Technical Handbook

Alcatel 1642 Edge Multiplexer

STM 1 Multi-Service Edge Multiplexer for Customer Premises

1642 Edge Multiplexer Rel.2.1

01 04/08/25 Chang HaiYan

Lennart Priester 1642EM Hardware Team

Zhu Hong

ED DATE CHANGE NOTE APPRAISAL AUTHORITY ORIGINATOR

Rel 2.1 1642 EDGE MULTIPLEXER TECHNICAL HANDBOOK

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3AL 97156 AAAA TQCVA 1/114

ALCATEL 1642 EDGE MULTIPLEXER

TECHNICAL HANDBOOK

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TABLE OF CONTENTS

1 GENERAL ..................................................................................................................................... 6 1.1 Introduction to the equipment ...................................................................................................... 6 1.2 Access network .......................................................................................................................... 8 1.3 Equipment configuration examples .............................................................................................. 9 1.4 Equipment application examples .................................................................................................11 1.5 Equipment power feeding ...........................................................................................................15

2 PHYSICAL CONFIGURATION.......................................................................................................16 2.1 The equipment view ...................................................................................................................16 2.2 Equipment parts list ...................................................................................................................17 2.3 Connection layout ......................................................................................................................24 2.4 Units panel view ........................................................................................................................25

2.4.1 AC220B power supply interface board ................................................................................25 2.4.2 DC48B power supply interface board ..................................................................................26 2.4.3 FB fan board .....................................................................................................................27 2.4.4 MB main board ..................................................................................................................28 2.4.5 OT1B1 155Mb/s optical interface board...............................................................................29 2.4.6 ET1B1 155Mb/s electrical interface board ...........................................................................30 2.4.7 DE1B28/SDE1B28 E1 interface board ................................................................................31 2.4.8 DE1B8/SDE1B8 E1 interface board ....................................................................................32 2.4.9 E1B28/SE1B28 E1 interface board .....................................................................................33 2.4.10 E1B8/SE1B8 E1 interface board.........................................................................................34 2.4.11 DE1B32 E1 interface board ................................................................................................35 2.4.12 E1RCB8 E1 interface board ...............................................................................................36 2.4.13 DS3B1 interface board .......................................................................................................37 2.4.14 DS3B1 interface board .......................................................................................................38 2.4.15 FEB6 Ethernet interface board ( 6 port ) ..............................................................................39 2.4.16 ISA-ES1 8FE Ethernet interface board ( 8 port )...................................................................40 2.4.17 ISA-ES1 3FE Ethernet interface board ( 3 port )...................................................................41

3 SDH TECHNOLOGY.....................................................................................................................42 3.1 SDH frame structure ..................................................................................................................42 3.2 Overhead description.................................................................................................................43

3.2.1 Section overhead (SOH) ....................................................................................................43 3.2.2 VC POH ............................................................................................................................44

3.3 SDH system multiplexing and mapping path................................................................................47

4 FUNCTIONAL DESCRIPTION .......................................................................................................48 4.1 System description ....................................................................................................................48

4.1.1 General .............................................................................................................................48 4.1.2 Service interface subsystem...............................................................................................51 4.1.3 Timing subsystem..............................................................................................................54 4.1.4 Cross connection subsystem ..............................................................................................57 4.1.5 Protection switching subsystem ..........................................................................................61 4.1.6 Sub-network connection protection .....................................................................................63 4.1.7 Control subsystem .............................................................................................................63 4.1.8 Network management interface ..........................................................................................65 4.1.9 Auxiliary channel and DCC subsystem................................................................................67 4.1.10 Power supply subsystem....................................................................................................69 4.1.11 Remote Inventory subsystem .............................................................................................69

4.2 Units description........................................................................................................................71 4.2.1 MB main board ..................................................................................................................71 4.2.2 ECM enhanced clock module .............................................................................................74 4.2.3 SCM standard clock module...............................................................................................76 4.2.4 EOWM engineering order wire module................................................................................77

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4.2.5 OT1M1 155Mb/s optical interface module ...........................................................................79 4.2.6 OT1M1L11 optical interface module....................................................................................80 4.2.7 OT1M1L12 optical interface module....................................................................................81 4.2.8 ET1M1 155Mb/s electrical interface module ........................................................................81 4.2.9 OT1B1 155Mb/s optical interface board ..............................................................................81 4.2.10 ET1B1 155Mb/s electrical interface board ...........................................................................82 4.2.11 E3B1 interface board .........................................................................................................82 4.2.12 DS3B1 interface board.......................................................................................................84 4.2.13 E1RCB8 board..................................................................................................................87 4.2.14 E1B28 board.....................................................................................................................88 4.2.15 DE1B28 board...................................................................................................................89 4.2.16 E1B8 board .......................................................................................................................89 4.2.17 DE1B8 board ....................................................................................................................90 4.2.18 SE1B28 board...................................................................................................................90 4.2.19 SE1B8 board.....................................................................................................................90 4.2.20 SDE1B28 board ................................................................................................................90 4.2.21 SDE1B8 board ..................................................................................................................90 4.2.22 DE1B32 board...................................................................................................................90 4.2.23 FEB6 Ethernet interface board ( 6 port )..............................................................................90 4.2.24 ISA-ES1 8FE Ethernet interface board ( 8 port ) ..................................................................92 4.2.25 ISA-ES1 3FE Ethernet interface board ( 3 port ) ..................................................................94 4.2.26 DC48B power supply interface board ..................................................................................95 4.2.27 AC220B power supply interface board ................................................................................97 4.2.28 PBP48 power supply panel ................................................................................................98 4.2.29 PBP24 power supply panel ................................................................................................99 4.2.30 FB fan board ................................................................................................................... 100 4.2.31 SFB fan board ................................................................................................................. 101 4.2.32 Backboard ...................................................................................................................... 102

5 TECHNICAL SPECIFICATIONS .................................................................................................. 104 5.1 General specifications.............................................................................................................. 104

5.1.1 Optical safety .................................................................................................................. 105 5.1.2 Electric safety.................................................................................................................. 107

5.2 Main specifications of optical interfaces..................................................................................... 107 5.3 Main specifications of electric interfaces .................................................................................... 108

5.3.1 Characteristics of 2.048Mbit/s electric interface................................................................. 108 5.3.2 Characteristics of 34.368Mbit/s electric interface ............................................................... 108 5.3.3 Characteristics of 44.736Mbit/s electric interface ............................................................... 108 5.3.4 Characteristics of 155.520Mbit/s electric interface.............................................................. 109 5.3.5 Characteristics of 10/100Base-T Ethernet interface ........................................................... 109 5.3.6 Interface specifications of auxiliary channel ....................................................................... 109

5.4 Power specifications ................................................................................................................ 109 5.5 Alarm specifications ................................................................................................................. 110 5.6 Mechanical specifications......................................................................................................... 110 5.7 Environmental conditions ......................................................................................................... 111

5.7.1 Climatic for operating conditions ....................................................................................... 111 5.7.2 Storage........................................................................................................................... 112 5.7.3 Transportation ................................................................................................................. 113

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LIST OF TABLES AND FIGURES

Tables

Table 2-1: Main board configuration part list ............................................................................................17 Table 2-2: Unit part list ...........................................................................................................................20 Table 2-3: Accessories part list ...............................................................................................................21 Table 2-4: Explanatory notes ..................................................................................................................22 Table 3-1: V5 byte bit distribution ............................................................................................................44 Table 3-2: the code meaning of C2 byte..................................................................................................46 Table 4-1: The coding description of synchronous status massage (SSM).................................................56 Table 4-2: Cross capacity table...............................................................................................................58 Table 4-3: cross connection configuration information table ......................................................................61 Table 4-4: For Release 1.0.....................................................................................................................64 Table 4-5: For Release 2.0.....................................................................................................................64 Table 5-1: hazard level classification of optical interfaces .......................................................................105 Table 5-2: STM-1 optical interface parameters .......................................................................................107 Table 5-3: power supply specifications ..................................................................................................109 Table 5-4: Transportation climatic .........................................................................................................113

Figures Figure 1-1: Physical view of 1642EM equipment ....................................................................................... 7 Figure 1-2: Typical interface configuration I .............................................................................................. 9 Figure 1-3: Typical interface configuration II ............................................................................................10 Figure 1-4: Typical interface configuration III............................................................................................10 Figure 1-5: Basic application connection diagram.....................................................................................11 Figure 1-6: The chain network topology structure .....................................................................................11 Figure 1-7: The ring network topology structure .......................................................................................12 Figure 1-8: The star network topology structure .......................................................................................12 Figure 1-9: The ring-with-chain network topology structure .......................................................................12 Figure 1-10: The ring-tangent-ring network topology structure...................................................................13 Figure 1-11: The dual nodes cross-connected ring network topology structure ...........................................14 Figure 2-1: 3D rear view of 1642EM equipment .......................................................................................16 Figure 2-2: 3D front view of 1642EM equipment.......................................................................................16 Figure 2-3: The slot layout of the 1642EM equipment rack........................................................................24 Figure 2-4: AC220B board, panel view ....................................................................................................25 Figure 2-5: DC48B board, panel view ......................................................................................................26 Figure 2-6: FB board, panel view ............................................................................................................27 Figure 2-7: MB board, panel view............................................................................................................28 Figure 2-8: OT1B1 board, panel view......................................................................................................29 Figure 2-9: OT1B1 board, panel view......................................................................................................30 Figure 2-10: DE1B28/SDE1B28 board, panel view...................................................................................31 Figure 2-11: DE1B8/SDE1B8 board, panel view ......................................................................................32 Figure 2-12: E1B28/SE1B28 board, panel view .......................................................................................33 Figure 2-13: E1B8/SE1B8 board, panel view ...........................................................................................34 Figure 2-14: DE1B32 board, panel view ..................................................................................................35 Figure 2-15: E1RCB8 board, panel view..................................................................................................36 Figure 2-16: DS3B1 board, panel view ....................................................................................................37 Figure 2-17: E3B1 board, panel view.......................................................................................................38 Figure 2-18: FEB6 board, panel view ......................................................................................................39 Figure 2-19: ISA-ES1 8FE board, panel view ...........................................................................................40 Figure 2-20: ISA-ES1 3FE board, panel view ...........................................................................................41 Figure 3-1: SDH frame structure .............................................................................................................42 Figure 3-2: The STM-1 section overhead layout .......................................................................................43

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Figure 3-3: SDH system multiplexing and mapping path...........................................................................47 Figure 4-1: The functional block diagram of 1642EM system ....................................................................48 Figure 4-2: Layout the bus of backboard .................................................................................................49 Figure 4-3: Block diagram of service interface subsystem ........................................................................53 Figure 4-4: 1642EM SDH multiplexing and mapping structure ..................................................................53 Figure 4-5: the functional structure of SDH equipment clock.....................................................................54 Figure 4-6: Schematic diagram of PDH 2Mbit/s tributary retiming..............................................................57 Figure 4-7: View of cross connection subsystem......................................................................................58 Figure 4-8: through mode.......................................................................................................................59 Figure 4-9: Add-drop mode ....................................................................................................................59 Figure 4-10: Broadcasting mode.............................................................................................................59 Figure 4-11: branching mode..................................................................................................................60 Figure 4-12: loop-back mode..................................................................................................................60 Figure 4-13: View of the protection switching subsystem..........................................................................61 Figure 4-14: View of sub-network connection protection ...........................................................................63 Figure 4-15: Functional block diagram of the control subsystem ...............................................................65 Figure 4-16: View of network management architecture ...........................................................................66 Figure 4-17: Connection between 1642EM and network management (through gateway) ..........................67 Figure 4-18: Auxiliary channel and DCC subsystem.................................................................................68 Figure 4-19: power supply subsystem.....................................................................................................69 Figure 4-20: Remote inventory subsystem ..............................................................................................70 Figure 4-21: block diagram of the main board ..........................................................................................71 Figure 4-22: Functional block diagram of optical interface ........................................................................72 Figure 4-23: Block diagram of management and control function ..............................................................73 Figure 4-24: Functional block diagram of cross connection.......................................................................73 Figure 4-25: View of the locations of the clock modules on the main board ................................................75 Figure 4-26: Functional block diagram of ECM ........................................................................................76 Figure 4-27: Functional block diagram of SCM ........................................................................................77 Figure 4-28: Functional block diagram of EOWM.....................................................................................78 Figure 4-29: Functional block diagram of OT1M1 module .........................................................................80 Figure 4-30: Functional block diagram of OT1B1 board............................................................................82 Figure 4-31: Functional block diagram of E3B1 board ..............................................................................84 Figure 4-32: Functional block diagram of DS3B1 board............................................................................86 Figure 4-33: Functional block diagram of E1RCB8 board .........................................................................88 Figure 4-34: Functional block diagram of E1R28 board ............................................................................89 Figure 4-35: Functional block diagram of FEB6 board..............................................................................92 Figure 4-36: The constitution of ISA-ES1 8FE board ................................................................................92 Figure 4-37: Functional block diagram of ISA-ES1 8FE board ..................................................................94 Figure 4-38: Functional block diagram of ISA-ES1 3FE board ..................................................................95 Figure 4-39: Functional block diagram of DC48B power supply interface board .........................................96 Figure 4-40: Functional block diagram of SPA80PFC AC power supply interface board .............................98 Figure 4-41: Functional block diagram of PBP48 power supply panel........................................................99 Figure 4-42: Functional block diagram of PBP24 power supply panel...................................................... 100 Figure 4-43: : Functional block diagram of FB fan board......................................................................... 101 Figure 4-44: Functional block diagram of SFB fan board. ....................................................................... 102 Figure 4-45: Connection layout of the backboard ................................................................................... 103 Figure 5-1: Climatogram for Class 3.2: partly temperature controlled locations ........................................ 112 Figure 5-2: Climatogram for Class 1.2: not temperature controlled storage location.................................. 113

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1 General

1.1 Introduction to the equipment

1642EM is the compact 155Mb/s SDH optical transmission equipment. The equipment is designed according to the Chinese national standard, ITU-T recommendations as well as relevant standards and requirements of the CCSA (Chinese Communication Standard Association). All the technical specifications of the equipment satisfied with relevant standards and comply with the criterion for SDH equipment access network. The newest designed components are used for the core part of the system to ensure stability and reliability of the system. The ASIC chips, which are independently developed, are used as fully as possible to replace the special chips and to minimize the product costs. 1642EM equipment can form a standard transmission network with any other SDH transmission equipment, such as 622M, 2.5G, 10G, through SDH interface. It can also form various telecommunication networks with telephone exchange, Ethernet switch, various access network equipment, mobile base stations and switch equipment via PDH and Ethernet interface. 1642EM characteristics: Ø Flexible networking topology 1642EM is an integrated STM -1 compact equipment of SDH optical transmission series, with flexible networking capability. It is suitable for various on-site networking and supports point-to-point, link, ring, star and other network topology structures as well as multiple complex network topology structures, such as ring-tangent-ring and ring-with-link, etc. Ø Flexible system configuration STM-1 interface: uses different optical or electrical modules, which can provide different optical interfaces such as S1.1, L1.1 and L1.2, or an electrical interface. E1 interface: uses different 2M interface boards, which can provide 8 or 28 channels, 75 Ohm or 120 Ohm E1 interfaces to meet different requirements. E3/DS3 and Ethernet interfaces can also be provided in the same equipment. Ø Complete and rapid protection mechanism When the system is operating in a ring network structure, path protection method can be used to protect every E1 tributary. That means the system provides the function of SNCP sub-network connection protection. Ø Provide 378X378 VC12 low order cross connect capacity The cross connect unit can achieve the service cross connect between any accessed units, and can support through mode, branching mode and broadcasting mode for service configuration. Ø Reliable clock synchronization performance Two kinds of modules are optional for the clock module in the equipment ECM (Enhanced Clock Module) can provide multiple clocks such as 2M, 19M, 38M and 77M, etc. and three clock operation modes are available: tracking synchronization mode, synchronization maintaining mode and internal free oscillation mode to ensure high quality of the equipment clock and to provide optimal synchronization for the network. All the specifications comply with the ITU-T G.813 recommendations. SCM standard clock module can provide 2M and 19M clocks. The equipment also has the function of multi-clock selection. Intrinsic oscillation can serve as the system clock through the network management configuration and the equipment can also be synchronous with the transmission line clock or 2Mbit/s external input clock. If E1 interface board with 2Mbit/s re-timing function is used, the clock can be directly obtained from E1 service as the system clock after being processed by the clock module. It can also provide the clock output of 2Mbit/s. Ø Abundant and flexibly configured paths for network management data and customer data

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The system uses RSOH and MSOH overhead bytes in the SDH frame structure to manage and maintain the equipment in compliance with the ITU-T recommendations. Each network element provides 4 ECC network management channels and D1-D3 or D4-D12 or F2 data communication byte can be selected through the network management configuration as the data channels for network management. The network management PC can perform network management and configuration through F interface. E1 byte is used for EOW telephones and E2 and F1 bytes are used for providing customers with transparent data transmission paths. The maximum data transmission rate is 19.2 Kbit/s. F3 byte can also be used for transmission of EOW telephones through network management configuration. Ø Complete network management system The network management system is able to manage the equipment configuration, failure performance and end-to-end line management of the network element in multiple sub-networks within one area. The management and maintenance of the network management mainly include alarm report, status monitor, configuration of software and equipment, configuration and connection of network elements, service configuration, performance management and download management of software, etc. The system also conveniently supports the software upgrading remotely and locally. The internal alarm of each network element and the alarm of each single board can be displayed via the alarm indicating lamp on the panel and the alarm of every single board can be inquired through the network management. Ø Small volume, light, high cost-efficiency and easy installation and maintenance. The system is of 19-inch compact structure, 2U height and the overall dimension is 88mm×295mm×443mm. The system mainly consists of the main control board (the first layer) and service unit (the second and the third layers). The equipment provides two power supply modes: -24V/48VDC and 220VAC, and double input power supply protection mechanism can be used for DC power supply input. The single boards support hot plugging for easy installation and maintenance.

Figure 1-1: Physical view of 1642EM equipment As shown in Fig. 1-1, the equipment consists of three layer structures, the upper two layers are for 4 service slots and the drop layer is for main control unit slot. The fan board slot is on the left side and the power supply interface board slot is on the right. The equipment can provide the protection function for DC power supply by using different fan boards and power supply interface boards. The service access unit uses modular design, and the service boards in the service slot support hot plugging. The power-on and power-off setting can be performed separately on the single board at every service slot through the network management. The equipment can provide multiple different services simultaneously by inserting different types of service boards in the service slots through the network management configuration. The accessible services include PDH signals and Ethernet services.

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The types of service interface board mainly include: • E1RCB8: 8-channel E1 (2.048 Mb/s) coaxial interface board (75 Ohm), with 2M clock re-timing function. • E1B8: 8-channel E1 (2.048 Mb/s) 2mm pin interface board (75 Ohm) • E1B28: 28-channel E1 (2.048 Mb/s) 2mm pin interface board (75 Ohm) • SE1B8: 8-channel E1 (2.048 Mb/s) 2mm pin interface board (75 Ohm), 2M interface with no protection

of lightening strike. • SE1B28: 28-channel E1 (2.048 Mb/s) 2mm pin interface board (75 Ohm), 2M interface with no

protection of lightening strike. • DE1B8: 8-channel E1 (2.048 Mb/s) 2mm pin interface board (120Ohm) • DE1B28: 28-channel E1 (2.048 Mb/s) 2mm pin interface board (120Ohm), • SDE1B8: 8-channel E1 (2.048 Mb/s) 2mm pin interface board (120Ohm), 2M interface with no

protection of lightening strike. • SDE1B28: 28-channel E1 (2.048 Mb/s) 2mm pin interface board (120Ohm), 2M interfaces with no

protection of lightening strike. • DE1B32: 32-channel E1 (2.048 Mb/s) 2mm pin interface board (120Ohm), 2M interfaces with no

protection of lightening strike. • E3B1: 1 port E3 (34Mb/s) interface board. • DS3B1: 1 port DS3 (45Mb/s) interface board. • FEB6: 6 ports 10M/100M Ethernet electrical interface board. • ISA-ES1 8FE: 8 ports 10M/100M Ethernet electrical interface board. • ISA-ES1 3FE: 3 ports 10M/100M Ethernet interface board （ 1*FX+2*TX）. • OT1B1: One STM-1 optical interface board. • ET1B1: One STM -1 electrical interface board. Maximum of 4*E1 service boards can be configured in each network element (taking DE1B32 as an example), i.e. 128-channel E1 services(120Ohm) at the maximum. Maximum of 4*STM-1 optical interfaces can also be configured for the optical interface. The whole external interfaces of the equipment are as follows: • STM1 optical interface • STM1 electrical interface • 2Mb/s balanced (75Ohm) and unbalanced (120Ohm) interface • 1X34 Mb/s or 1X45 Mb/s interface • 1/2/6/8 port 10M/100M Ethernet electrical interfaces. • 1 port 100M Ethernet optical interfaces • F interface (DB9): Locally-connected PC is used for the network management of the whole system. • Q interface (RJ45): use 10M/100M Ethernet protocol to provide high-speed communication channel. • Alarm input interface (DB25): provide three alarm input for the external equipment. • Alarm output interface (DB25): provide three alarm output interface. • E2/F1 transparent channel interface (DB25): provide two transparent channels for each STM1 optical

interface direction. • OW service interface: for the service telephones in the ring network and link network. • 2Mbit/s external clock input/output interface • Debug interface • -24V/-48V DC or 230V AC power supply interface.

Please refer to Chapter Two for the description of the overall structure and external interfaces of the equipment. Please refer to Chapter Four for detailed description of the parts of the system.

1.2 Access network

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1642EM is optical synchronous transmission equipment complying with the ITU-T recommendations as one of the Alcatel products. Some of the functional units in the equipment have been extensively used in other Alcatel SDH communication equipment. 1642EM provides abundant service interfaces and the accessible services include multiple PDH signals and Ethernet services, and it also supports the mixed transmission of multiple PDH signals and Ethernet services in the same equipment. 1642EM can form a standard transmission network with other standard SDH transmission equipment through SDH interfaces and can also form a communication network with access network equipment, GSM mobile cellular base stations, ETS radio access base stations and router through SDH interfaces to realize multiple network structures such as chain, ring, star and mesh topology, etc. and it provides complete protection functions.

1.3 Equipment configuration examples

The four service slots of 1642EM can be inserted with different service boards and each network element has abundant service interface types because of multiple types of service boards. 3 different configuration modes are given below: • E1 interface configuration Insert four 32-channel E1 service interface boards into the four service slots (taking DE1B 32 as the example), and it can provide a maximum of 128 2M interfaces(120Ohm) as shown in the following Figure 1-2. Note: PBX is the private branch exchange.

Figure 1-2: Typical interface configuration I

• Configuration of E1 interface and STM-1 optical tributary interface As shown in Figure 1-3 below, insert two 28-channel E1 service boards (taking E1B28 as an example) and two STM1 interface (OT1B1 or ET1B1) boards into the four service slots respectively. Maximum 56 2M interfaces(75Ohm) and 4 STM-1 interfaces can be provided in the maximum and multiple network topology structures such as ring-tangent -ring, ring-with-chain or star topology can be configured.

Auxiliary interface

2M interface

2M interface

F interface

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Figure 1-3: Typical interface configuration II • Multi-service interface configuration As shown in Figure 1-4, insert one 32-channel E1 service interface board (taking DE1B32 as an example), one Ethernet interface board(taking ISA-ES1 8FE as an example), one STM1 interface (OT1B1 or ET1B1) and one E3/DS3 board into the four service slots. 32 2M interfaces(120Ohm), 3 STM-1 (optical or electrical ) interfaces (including two interfaces on the main board), 8 Ethernet interfaces and one 34M interface can be provided to form the ring-with-chain network topology structure, and multiple different services can be provided on the network element.

Figure 1-4: Typical interface configuration III

Auxiliary interface

2M interface

F interface

2M interface

Auxiliary interface

2M interface

2M interface

34M/45M interface Ethernet

interface

F interface

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1.4 Equipment application examples

Note: SDH N.E. refers to SDH network element, which can be either the other vender’s SDH equipment or 1642EM equipment. If other Alcatel SDH is used, the network management system can manage each network element management system. • Connection between SDH system and PDH system

As shown in Figure 1-5

Figure 1-5: Basic application connection diagram • The SDH system chain network topology structure

As indicated in Figure 1-6

Figure 1-6: The chain network topology structure • The SDH system ring network topology structure


PDH interface

2M interface

34M/45M interface

2M interface

F interface

PDH interface

Auxiliary interface

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Figure 1-7: The ring network topology structure • The SDH system star network topology structure

As indicated in Fig. 1-8

Figure 1-8: The star network topology structure • The SDH system ring-with-chain network topology structure


Figure 1-9: The ring-with-chain network topology structure

1642 EM

STM－1Optical STM－1

Optical SDHN.E.

SDHN.E.

SDHN.E.

SDHN.E.

STM－1Optical

1642EM

STM－1Optical

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• The SDH system ring-tangent-ring network topology structure


Figure 1-10: The ring-tangent-ring network topology structure

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• The SDH system dual nodes cross-connected ring network topology structure


Figure 1-11: The dual nodes cross-connected ring network topology structure

1642 EM 1642 EM

1642 EM 1642 EM

1642 EM 1642 EM

STM-1Optical

STM-1Optical

STM-1Optical

STM-1Optical

STM-1Optical

STM-1OpticalSTM-1

Optical

1642 EM 1642 EM

STM-1Optical

STM-1Optical

1642 EM

STM-1Optical

1642 EM

STM-1Optical

STM-1Optical

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1.5 Equipment power feeding

1642EM has three power feeding modes: -24V/48VDC or 220VAC. As shown in Figure 1-1, according to customers’ requirements, different power supply interface boards are inserted on the right side of the equipment to provide three different feeding modes. –24V/48VDC power supply interface board and 220VAC power supply interface board have over-voltage and over-current protection devices. As indicated in Figure 1-1, -24V/48V power supply interface is also provided on the fan board on the left side of the equipment as standby. N.B. Only the 24V box （3AL97081ADAA） can support –24V power supply. N.B. The 24V box （3AL97081ADAA）can not support AC220B power supply.

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2 Physical configuration

2.1 The equipment view

The 3D front view of 1642EM is shown in Figure 2-1 and the back view is shown in Figure 2-2 (taking one OT1B1 board, one FEB6 board, one E1RCB8 board and one E1B28 board that are inserted with service board as examples).

Figure 2-1: 3D rear view of 1642EM equipment

Figure 2-2: 3D front view of 1642EM equipment

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2.2 Equipment parts list

In the following tables are listed all the items of the equipment Such tables report the following information: ITEM DESCRIPTION——Name of part ITEM CODE——ASB factory Part Nos. (Such as 411.xxx.xxx x) of item MODULE——Name of the module in item CODE——ASB factory Part number of module QTY——quantity Max QTY——Maximum quantity

Table 2-1: Main board configuration part list

ITEM DESCRIPTION ITEM CODE MODULE CODE QTY Note

COMMON PART SSY-TDM MB ST.C(1*S1.1) 3AL97080BAAA

PBA-Mainboard 3AL97006ABAA 1

PBA-ECSC 3AL97004AAAA 1

PBA-SCM 3AL97010AAAA 1

MA-MB (S) complete panel 3AL97049BAAA 1

PBA-OT1M1 3AL97012BAAA 1 SSY-TDM MB ST.C(1*L1.1) 3AL97080BBAA

PBA-Mainboard 3AL97006ABAA 1


PBA-SCM 3AL97010AAAA 1

MA-MB(S) complete panel 3AL97049BAAA 1

PBA-PBA-OT1M1(L1.1) 3AL97012BBAA 1 SSY-TDM MB ST.C(1*L1.2) 3AL97080BCAA

PBA-Mainboard 3AL97006ABAA 1 3

PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB(S) complete panel 3AL97049BBAA 1 PBA-PBA-OT1M1(L1.2) 3AL97012BCAA 1 SSY-ADM MB ST.C(2*S1.1) 3AL97080BDAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 2 SSY-ADM MB ST.C(2*L1.1) 3AL97080BEAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 2 SSY-ADM MB ST.C(2*L1.2) 3AL97080BFAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1

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PBA-OT1M1(L1.2) 3AL97012BCAA 2 SSY-ADM MB ST.C S1.1L1.1 3AL97080BGAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 1 SSY-ADM MB ST.C S1.1L1.2 3AL97080BHAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 1 SSY-ADM MB ST.C L1.1L1.2 3AL97080BJAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 1 SSY-TDM MB EN.C (1*S1.1) 3AL97080BKAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB(S) complete panel 3AL97049BBAA 1 PBA-OT1M1 3AL97012BAAA 1 SSY-TDM MB EN.C (1*L1.1) 3AL97080BLAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB(S) complete panel 3AL97049BBAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 1 SSY-TDM MB EN.C (1*L1.2) 3AL97080BMAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB(S) complete panel 3AL97049BBAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 1 SSY-ADM MB EN.C (2*S1.1) 3AL97080BNAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 2 SSY-ADM MB EN.C (2*L1.1) 3AL97080BPAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 2 SSY-ADM MB EN.C (2*L1.2) 3AL97080BQAA



ED 01


PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 2 SSY-ADM MB EN.C S1.1L1.1 3AL97080BRAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 1 SSY-ADM MB EN.C S1.1L1.2 3AL97080BSAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1 3AL97012BAAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 1 SSY-ADM MB EN.C L1.1L1.2 3AL97080BTAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-OT1M1(L1.1) 3AL97012BBAA 1 PBA-OT1M1(L1.2) 3AL97012BCAA 1 TDM MB ST.CLOCK (1*ESTM1) 3AL97080BUAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-ET1M1 3AL97012ADAA 1 ADM MB ST.CLOCK (2*ESTM1) 3AL97080BVAA


PBA-ECSC 3AL97004AAAA 1 PBA-SCM 3AL97010AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-ET1M1 3AL97012ADAA 2 TDM MB EN.CLOCK (1*ESTM1) 3AL97080BWAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-ET1M1 3AL97012ADAA 1 TDM MB EN.CLOCK (2*ESTM1) 3AL97080B XAA


PBA-ECSC 3AL97004AAAA 1 PBA-ECM 3AL97008AAAA 1 MA-MB complete panel 3AL97049BAAA 1 PBA-ET1M1 3AL97012ADAA 2

ED 01


Table 2-2: Unit part list

ITEM DESCRIPTION ITEM CODE MODULE CODE MaxQTY

Note

COMMON PART SSY-XXX MB 1 23 SSY-STM1 MOPT UNIT S1.1 3AL97083BAAA

PBA-OT1B1 3AL97014AAAA 2

PBA-OT1M1 3AL97012BAAA 2

MA-OT1B1 complete panel 3AL97051AAAA 2

SSY-STM1 MOPT UNIT L1.1 3AL97083BBAA


PBA-OT1M1(L1.1) 3AL97012BBAA 2


SSY-STM1 MOPT UNIT L1.2 3AL97083BCAA


PBA-OT1M1(L1.2) 3AL97012BCAA 2


SSY-STM1 ELECTRICAL UNIT 3AL97083ADAA


PBA-ET1M1 3AL97012ADAA 2 MA-ET1B1 complete panel 3AL97051BAAA 2 SSY-E1RCB8 3AL97045AAAA PBA-E1RCB8 3AL97035AAAA 4

MA-E1RCB8 complete panel 3AL97050AAAA 4

SSY-E1B28 3AL97078AAAA PBA-E1B28 3AL97060AAAA 4

MA-E1B28 Complete panel 3AL97055AAAA 4

SSY-E1B8 3AL97078ABAA PBA-E1B8 3AL97060ABAA 4 MA-E1B8 Complete panel 3AL97055ACAA 4 SSY-DE1B28 3AL97079AAAA PBA-DE1B28 3AL97062AAAA 4

MA-DE1B28 Complete panel 3AL97055ABAA 4

SSY-DE1B8 3AL97079ABAA PBA-DE1B8 3AL97062ABAA 4

MA-DE1B8 Complete panel 3AL97055ADAA 4

SSY-SE1B28 3AL97078ACAA PBA-SE1B28 3AL97060ACAA 4

MA-E1B28 Complete panel 3AL97055AEAA 4

SSY-SE1B8 3AL97078ADAA PBA-SE1B8 3AL97060ADAA 4 MA-E1B8 Complete panel 3AL97055AGAA 4 SSY-SDE1B28 3AL97079ACAA PBA-SDE1B28 3AL97062ACAA 4

MA-DE1B28 Complete panel 3AL97055AFAA 4

SSY-SDE1B8 3AL97079ADAA PBA-SDE1B8 3AL97062ADAA 4

MA-DE1B8 Complete panel 3AL97055AHAA 4 PBA-DE1B32 3AL97197ABAA 4

SSY-DE1B32

3AL97198AAAA

MA-DE1B32 Complete panel 3AL97204AAAA 4

SSY-E3B1 3AL97086AAAA PBA-E3B1 3AL97085AAAA 4 MA-E3B1 complete panel 3AL97120AAAA 4

ED 01


SSY-DS3B1 3AL97086ABAA PBA-DS3B1 3AL97085ABAA 4

MA-DS3B1 complete panel 3AL97120ABAA 4

SSY-FEB6 3AL97044AAAA PBA-FEB6 3AL97032AAAA 4 MA-FEB6 complete panel 3AL97052AAAA 4 SSY-ISA-ES1 8FE 3AL97165AAAA PBA-ISA-ES1 8FE 3AL97164AAAA 2

MA-ISA-ES1 8FE complete panel 3AL97174AAAA 2

SSY-ISA-ES1 3FE 3AL97194AAAA PBA-ISA-ES1 3FE 3AL97193AAAA 2

MA-ISA-ES1 3FE complete panel 3AL97195AAAA 2

SSY-DC48B 3AL97042ABAA PBA-DC48B 3AL97016ABAA 1

MA-DC48B complete panel 3AL97054AAAA 1

SSY-AC220B 3AL97077AAAB PBA-AC220B 3AL97058AAAA 1

MA-AC220B complete panel 3AL97056AAAA 1

SSY-FB 3AL97043ACAA PBA-FB 3AL97047ACAA 1 MA-FB complete panel 3AL97053AAAA 1 SSY-SFB 3AL97043ADAA PBA-SFB 3AL97047ADAA 1 MA-SFB complete panel 3AL97053ABAA 1 SSY-Main Unit 48 3AL97081ACAA BPA-Backplane 3AL97028AAAA 1

MA-1642EM Mechanical Box 3AL97048AAAA 1

PBA-PBP48 3AL97030ACAA 1 SSY-Main Unit 24 3AL97081ADAA BPA-Backplane 3AL97028AAAA 1

MA-1642EM Mechanical Box 3AL97048AAAA 1

PBA-PBP24 3AL97030ADAA 1

Table 2-3: Accessories part list

ITEM DESCRIPTION ITEM CODE NOTE

COMMON PART

CA-Power cable.DC48V.3M 3AL97109AAAA

CA-Power cable.DC48V.5M 3AL97109ABAA

CA-Power cable.DC48V.10M 3AL97109ACAA

CA-Power cable.DC48V.20M 3AL97109ADAA CA-Powersupply AC220V 3AL97087AAAA CA-Power.EMC.DC48V.3M 3AL97147AAAA 24 CA-Power.EMC.DC48V.5M 3AL97147ABAA 24 CA-Power.EMC.DC48V.10M 3AL97147ACAA 24 CA-Power.EMC.DC48V.20M 3AL97147ADAA 24 KIT-Installation 21inch 3AL97102AAAA KIT-Installation 19inch 3AL97102ABAA KIT-Installation wall 3AL97102ACAA KIT-Installation package 3AL97127AAAA

19" RACK S3510107AAAA MA-2U SUBRACK FOR S1240 3AL97110AAAA RSA-21inch Rack 3AL97126AAAA SC-FC FIBER (5M) S3520304AFAA SC-FC FIBER (10M) S3510308BAAA

ED 01


SC-FC FIBER(30M) S3510308DAAA SC-SC FIBER(5M) S3520309AFAA SC-SC FIBER(15M) S3520309BFAA SC-LC FIBER (5M) 1AB182540005 SC-LC FIBER (10M) 1AB182540006 MA-Dummy Plate 3AL97082AAAA CA-HM 2MM 8*2M*75ohm*5M 3AL97093AAAA CA-HM 2MM 8*2M*75ohm*10M 3AL97093ABAA CA-HM 2MM 8*2M*75ohm*20M 3AL97093ACAA CA-HM 2MM 8*2M*75ohm*30M 3AL97093ADAA CA-HM 2MM 8*2M*75ohm*40M 3AL97093AQAA CA-HM 2MM 8*2M*120ohm*5M 3AL97093AEAA CA-HM2MM 8*2M*120ohm*10M 3AL97093AFAA CA-HM2MM 8*2M*120ohm*20M 3AL97093AGAA CA-HM2MM 8*2M*120ohm*30M 3AL97093AHAA CA-HM 2MM 8*2M*120ohm*40M 3AL97093ARAA CA-coax 1*34M/45M/155m*75ohm*5M 3AL97144AAAA CA-coax 1*34M/45M/155m*75ohm**10M 3AL97144ABAA CA-coax 1*34M/45M/155m*75ohm**20M 3AL97144ACAA CA-coax 1*34M/45M/155m*75ohm**30M 3AL97144ADAA CA-coax 1*2M*75ohm*5M 3AL97092AAAA CA-coax 1*2M*75ohm*10M 3AL97092ABAA CA-coax 1*2M*75ohm*20M 3AL97092ACAA CA-coax 1*2M*75ohm*30M 3AL97092ADAA RJ45～RJ45,30M,TNMS THROUGH CABLE S3520301DAAA RJ45～RJ45,30M,TNMS CROSSOVER CABLE S3510323DAAA RJ45～RJ45,5M,TNMS CROSSOVER CABLE S3510323AFAA FEMALE~7*2M*75OHM*5M CABLE 3AL98086AAAA FEMALE~7*2M*75OHM*10M CABLE 3AL98086ABAA FEMALE~7*2M*75OHM*20M CABLE 3AL98086ACAA FEMALE~7*2M*75OHM*30M CABLE 3AL98086ADAA CA-F interface Cable 3AL97090AAAA CA-Terminal Cable 3AL97089AAAA

DOC-BROCHURE 1642EM 3AL97094AAAA

DOC-1642EM TECH.DES.EN 3AL97038AAAA

DOC-1642EM 2.1 T.HDBK E 3AL97156AAAA

DOC-1642EM 2.1 I.HDBK E 3AL97156ABAA

DOC-1642EM 2.1 C.HDBK E 3AL97156ACAA

DOC-1642EM 2.1 O.HDBK E 3AL97156ADAA

DOC-1642EM 2.1 T.HDBK C 3AL97156AEAA

DOC-1642EM 2.1 I.HDBK C 3AL97156AFAA

DOC-1642EM 2.1 C.HDBK C 3AL97156AGAA

DOC-1642EM 2.1 O.HDBK C 3AL97156AHAA

DCP-1642EM 2.1 CD-ROM EN 3AL97157AAAA

Table 2-4: Explanatory notes Note Description

1 Insert one S1.1 optical module on the main control board as TM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

2 Insert one L1.1 optical module on the main control board as TM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

ED 01


3 Insert one L1.2 optical module on the main control board as TM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

4 Insert two S1.1 optical modules on the main control board as ADM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

5 Insert two L1.1 optical modules on the main control board as ADM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

6 Insert two L1.2 optical modules on the main control board as ADM network element. The clock uses SCM module (standard clock module) and CPU uses ECSC module

7 Insert one S1.1 optical module and one L1.1 optical module on the main control board as ADM network elements. The clock uses SCM module (standard clock module) and CPU uses ECSC module

8 Insert one S1.1 optical module and one L1.2 optical module on the main control board as ADM network elements. The clock uses SCM module (standard clock module) and CPU uses ECSC module

9 Insert one L1.1 optical module and one L1.2 optical module on the main control board as ADM network elements. The clock uses SCM module (standard clock module) and CPU uses ECSC module

10 Insert one S1.1 optical module on the main control board as TM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

11 Insert one L1.1 optical module on the main control board as TM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

12 Insert one L1.2 optical module on the main control board as TM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

13 Insert two S1.1 optical modules on the main control board as ADM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

14 Insert two L1.1 optical modules on the main control board as ADM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

15 Insert two L1.2 optical modules on the main control board as ADM network element. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

16 Insert one S1.1 optical module and one L1.1 optical module on the main control board as ADM network elements. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

17 Insert one S1.1 optical module and one L1.2 optical module on the main control board as ADM network elements. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

18 Insert one L1.1 optical module and one L1.2 optical module on the main control board as ADM network elements. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

19 Insert one ET1M1 electrical module on the main control board as TDM network elements. The clock uses SCM module (enhanced clock module) and CPU uses ECSC module

20 Insert two ET1M1 electrical module on the main control board as ADM network elements. The clock uses SCM module (enhanced clock module) and CPU uses ECSC module

21 Insert one ET1M1 electrical module on the main control board as TDM network elements. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

22 Insert two ET1M1 electrical module on the main control board as ADM network elements. The clock uses ECM module (enhanced clock module) and CPU uses ECSC module

23 Please refer to Table 1 for the configuration of the main control board 24 The double shield DC48V power cable for EMC/EMI Class B qualification

ED 01


2.3 Connection layout

There are seven slots in the 1642EM equipment. As indicated in Figure 2-3, the slot (1) is the main board slot; slots (2)-(5) are service board slots, in which different types of service boards can be inserted; slot (6) is the power supply interface board slot and slot (7) is the fan board slot.

67

Figure 2-3: The slot layout of the 1642EM equipment rack

ED 01


2.4 Units panel view

Figures 2-4 to 2-19 are the panel view and descriptions of all units of 1642EM equipment.

2.4.1 AC220B power supply interface board

Acronym Slots AC220B 6

Note: (1) Power supply switch

ON means the power supply switch is in the connected status. OFF means the power supply switch is in the disconnected status.

(2) 230V AC power supply interface, D 3-terminal connector.

Figure 2-4: AC220B board, panel view

(1)

(2)

ED 01


2.4.2 DC48B power supply interface board

Acronym Slots DC48B 6

Note: (1) Power supply switch

ON means the power supply switch is in the connected status OFF means the power supply switch is in the disconnected status

(2) –24V/48V DC power supply interface, D 3-terminal connector. (3) The voltage label on the power supply connector terminal “-24V/48V”; (4) The voltage label on the power supply connector terminal “protective grounding”; (5) The voltage label on the power supply connector terminal “GND”;

Figure 2-5: DC48B board, panel view

(1)

(3)

(4)

(5)

(2)

ED 01


2.4.3 FB fan board

Acronym Slots FB 7

Note: (1) –24V/48V DC power supply interface, D 3-terminal connector. (2) The voltage label on the power supply connector terminal “GND”; (3) The voltage label on the power supply connector terminal “protective grounding”; (4) The voltage l label on the power supply connector terminal “-24V/48V”;

Figure 2-6: FB board, panel view

(1)

(2)

(3)

(4)

ED 01


2.4.4 MB main board

Acronym Slot MB 1

Figure 2-7: MB board, panel view

(9)

(16)

(1) (2) (3)

(4)

(5)

(6)

(7)

(8)

(17)

(18)

(24)

(19)

(23)

(25)

(27)

(10) (11) (12) (13) (14) (15)

(26)

(20) (21) (22)

(1) RUN LED (2) COMMON ALARM (3) SERIAL ALARM (4) Q PORT (5) F PORT (6) Channel A E2 PORT (7) Channel A F1 PORT (8) Channel B E2 PORT (9) Channel B F1 PORT (10) Housekeeping input0 (11) Housekeeping input1 (12) Housekeeping input2 (13) Housekeeping output0 (14) Housekeeping output1 (15) Housekeeping output2 (16) Debug port (17) 2M external clock output (18) 2M external clock input (19) OWM connector (20) OWM LED (21) OTA alarm LED (22) OTB alarm LED (23) OTA input (24) OTA output (25) Reset button (26) OTB input (27) OTB output

ED 01


2.4.5 OT1B1 155Mb/s optical interface board

Acronym Slots OT1B1 2,3,4,5

Note: (1) Tricolor LED:

Green LED ON-units in operation Red LED ON-severity alarm Yellow LED ON-common alarm

(2), (3) RJ11 connector: Transparent channel F1 byte, E2 byte. (4), (5) SC/PC optical fiber connector: RX, TX.

Figure 2-8: OT1B1 board, panel view

(1) (5)(4)(3)(2)

ED 01


2.4.6 ET1B1 155Mb/s electrical interface board

Acronym Slots ET1B1 2,3,4,5

(1) (2) (3) (4) (5)



(2), (3) RJ11 connector: Transparent channel F1 byte, E2 byte. (4), (5) 1.0/2.3 coaxial connector: RX, TX. In order to get better EMC performance, additional shield box for coaxial cable is required,see following.

Figure 2-9: OT1B1 board, panel view

ED 01


2.4.7 DE1B28/SDE1B28 E1 interface board

Acronym Slots DE1B28 2,3,4,5



(2) 2M service interface. The upper is the transmitting terminal and the lower is the receiving terminal.

Figure 2-10: DE1B28/SDE1B28 board, panel view

(1) (2)

ED 01


2.4.8 DE1B8/SDE1B8 E1 interface board



Green LED ON-units in operation Red LED ON-severity alarm Yellow LED-common alarm


Figure 2-11: DE1B8/SDE1B8 board, panel view

(1) (2)

ED 01


2.4.9 E1B28/SE1B28 E1 interface board

Acronym Slots E1B28 2,3,4,5



(2) 2M service interface: The upper is the transmitting terminal and the lower is the receiving terminal.

Figure 2-12: E1B28/SE1B28 board, panel view

(1) (2)

ED 01


2.4.10 E1B8/SE1B8 E1 interface board




(2) 2M service interface: The upper is the transmitting terminal and the lower is the receiving terminal.

Figure 2-13: E1B8/SE1B8 board, panel view

(1) (2)

ED 01


2.4.11DE1B32 E1 interface board





Figure 2-14: DE1B32 board, panel view

(1) (2)

ED 01


2.4.12 E1RCB8 E1 interface board

Acronym Slots E1RCB8 2,3,4,5



(2) 2M service interface. The upper is the transmitting terminal and the lower is the receiving terminal. (3) 2M extended service interface for transmitting ECC signals. TX stands for transmitting terminal and RX

stands for receiving terminal.

Figure 2-15: E1RCB8 board, panel view

(1) (3) (2)

ED 01


2.4.13 DS3B1 interface board

Acronym Slots DS3B1 2,3,4,5

Note: (1) Tricolor LED


(2), (3) 75Ω coaxial cable interface: TX, RX.

Figure 2-16: DS3B1 board, panel view

(1) (3)(2)

ED 01


2.4.14 DS3B1 interface board




(2), (3) 75Ω coaxial cable interface: TX, RX.

Figure 2-17: E3B1 board, panel view

(1) (3)(2)

ED 01


2.4.15 FEB6 Ethernet interface board ( 6 port )

Acronym Slots FEB6 2,3,4,5

Note: (1) Tricolor LED: Green LED ON-units in operation Red LED ON-severity alarm Yellow LED ON-common alarm (2)~(7) RJ45 connector: Ethernet port 1-6. (8) Ethernet interface LINK/ACTIVE status indicating lamp: ON means LINK status; Flash means ACTIVE status. (9) Ethernet interface 10M/100M rate indicating lamp: －OFF means 10M rate －ON means 100M rate

Figure 2-18: FEB6 board, panel view

(8) (9)

(1) (2) (3) (4) (5) (6) (7)

ED 01


2.4.16 ISA-ES1 8FE Ethernet interface board ( 8 port )

Acronym Slots ISA-ES1 8FE 2,3

Note: (1) Tricolor LED: Green LED ON-units in operation Red LED ON-severity alarm Yellow LED ON-common alarm (2)~(9) RJ45 connector: Ethernet port 1-8. (10) Ethernet interface LINK/ACTIVE status indicating lamp: ON means LINK status; Flash means ACTIVE status. (11) Ethernet interface 10M/100M rate indicating lamp: －OFF means 10M rate －ON means 100M rate

Figure 2-19: ISA-ES1 8FE board, panel view

(1) (2) (3) (4) (5) (6) (7) (8) (9)

(10) (11)

ED 01



Acronym Slots ISA-ES1 3FE 2,3

Note: (1) Tricolor LED: Green LED ON-units in operation Red LED ON-severity alarm Yellow LED ON-common alarm (2) SFP optical connector: Ethernet port 1. (3)(4) RJ45 connector: Ethernet port 2~3. (5) Ethernet interface LINK/ACTIVE status indicating lamp: ON means LINK status; Flash means ACTIVE status. (6) Ethernet interface 10M/100M rate indicating lamp: －OFF means 10M rate －ON means 100M rate

Figure 2-20: ISA-ES1 3FE board, panel view

(1) (2) (3) (4)

(5) (6)

ED 01


3 SDH technology

3.1 SDH frame structure

Figure 3-1: SDH frame structure STM-N signal is 9 lines×270×N rows frame structure. N is 1, 4, 16, 64 … … , indicating it formed by N STM-1 signals through byte interleaved multiplexing. N=1 in our system. The transmission cycle is 125us, as indicated in Figure 3-1. The whole frame structure is roughly divided into 3 major areas: 1. Section overhead (SOH)

It refers to the additional bytes in STM frame structure necessary to ensure normal and flexible transmission of the payload, mainly used for network operation, management and maintenance. The first to the 9th×N of the transversal row and the first to the third and the fifth to the ninth longitudinal line in the above Figure are section overheads.

2. Administrative unit pointer (AU PTR) AU PTR is a pointer, mainly used to indicate the accurate location of the first byte of the payload in STM-N frame in order for it to be correctly divided at the receiving terminal. The first to the 9th×N transversal row and the fourth longitudinal line are AU PTR.

3. Payload (PAYLOAD) The payload is the area in the frame structure for data. The 10th×N to the 270th×N transversal row and the first to the ninth longitudinal line are section overhead, totaling 2349×N bytes.

bytes

ED 01


3.2 Overhead description

3.2.1 Section overhead (SOH)

SOH contains frame alignment information, data for maintenance and performance monitor and other operation functions. The SOH information is further classified into Regenerator Section Overhead (RSOH) which is terminated at regenerator functions and Multiplex Section Overhead (MSOH) which passes transparently through regenerators and is terminated where the AUG-Ns are assembled and disassembled The rows 1-3 of the SOH are designated as RSOH while rows 5-9 are designated to be MSOH. This is illustrated in Figure 3-2 for the case of STM-1. Location of the section overhead is shown in Figure 3-2.

A1 A1 A1 A2 A2 A2 J0 X* X*

B1 O O E1 O F1 X X RSOH

D1 O O D2 O D3

AU PTR

B2 B2 B2 K1 K2

D4 D5 D6 MSOH

D7 D8 D9

D10 D11 D12

S1 M1 E2 X X

Figure 3-2: The STM-1 section overhead layout 1) Frame alignment bytes A1 and A2

The A1 and A2 bytes in SOH can be used to identify the starting location of the frames. A1 and A2 have clear binary numbers. A1 is 11110110 and A2 is 00101000. 6 frame alignment bytes are arranged in the STM-1 frame.

2) Regenerator section trace bytes J0 J0 byte is used to repeatedly transmit “section access point indicator” so that the receiver can confirm that it is in the continually connected status with the preset transmitting terminal.

3) Data communication channel (DCC) D1-D12 DCC of the SOH is used to form the transmission link of SDH network management (SMN). The D1-D3 bytes are regenerator section DCC, used for OAM information exchange between the regenerator section terminations at the rate of 192kbit/s. While the D4-D12 bytes are multiplex section DCC for OAM data exchange between the multiplex section terminations at the rate of 576kbit/s. The above total 768kbit/s data channel provides the management and control of SDH network with powerful communication infrastructure.

4) Order wire byte E1 and E2 The two bytes are used to provide voice channels for order wire liaison. E1 belongs to RSOH and is used for local order wire channel and can be accessed in the regenerator section; E2 belongs to MSOH and is used for direct order-wire channel and can be accessed at regenerator section termination. The rate of the service channel is 64kbit/s.

5) User channel byte F1

ED 01


The byte is dedicated for the customer and mainly provides temporary data/ voice connection for specific maintenance purpose.

6) Bit interleaved parity of depth 8 (BIP8) B1 B1 byte is used for error code monitor at the regenerator section, and uses bit interleaved parity of even parity check. BIP8 code calculates all bits of the preceding STM-N frame after the code scrambling. The calculation result is placed at the B1 byte position before the code scrambling The generating process is briefed as follows: Firstly divide all the checked parts of the STM frame structure into 8-bit group, and then make rows of one 8-bit sequence. The first bit of every 8-bit code group and the first bit of BIP8 code form the first monitor group (the first line of the matrix). The second bit of every 8-bit code group and the second bit of BIP8 code form the second monitor group (the second line of the matrix), and so on. And then the first bit of BIP8 provides even parity check for the first monitor group; the second bit of BIP8 provides even parity check for the second monitor group, and so on.

7) BIP-N*24 B2 B2 byte is used for the error code monitor in multiplex section and there are three B2 bytes (totally 24 bits). B2 bytes use bit interleaved parity of depth N×24 of even parity check. The generation mode is similar to that of BIP -8 code. It calculates all bits of the preceding STM -N frame (except the first to the third lines of SOH) and the calculation result is placed at B2 byte.

8) Automatic protection switching (APS) channels K1 and K2 (b1-b5) These two bytes are used to transmit automatic protection switching (APS) signaling to guarantee automatic switching in case of equipment failure and resume the network services--self-healing for the self-healing of multiplex section protection switching.

9) Synchronization status byte S1 (b5-b8) Different bit patterns indicate different clock quality levels of ITU-T so that the equipment can determine the quality of the clock signal received based on this and decide whether to switch the clock source, i.e. switch to the clock source of higher quality. The less the value of S1 (b5-b8) is; the higher the corresponding clock quality level is.

10) Multiplex section remote block error indication (MS-REI) M1 The byte transmits the quantity of the interleaved bit blocks of the slots detected by B2 byte (0-255). For STM-16 and higher rate, the calculated value ends at 255; for STM -1/4/16/64, the calculation ranges are 0-24, 0-96, 0-255 and 0-255 respectively. Please refer to G. 707 for the specific recommendations.

11) Multiplex section remote defect indication (MS-RDI) K2 (b6-b8) The byte is used to send back an indication to the transmitting terminal to show that the receiving terminal has detected the upstream section failure or received MS-AIS. MS-RDI uses the b6, b7, b8 of the de-scrambled K2 byte as the expression of “110”.

12) Specific byte O related to the transmission medium The bytes defined in consideration of special requirements related to the transmission medium.

13) Byte X for domestic use The purpose of all bytes with no labels will be determined according to future international standards.

14) Non-scrambled byte X* for domestic use The purpose of all bytes with no labels will be determined according to future international standards.

3.2.2 VC POH

3.2.2.1 Low order VC POH (VC-1 / VC-2 POH)

Adding low order VC POH to C-12/C-2 can form VC-12 / VC-2. The main functions are VC path monitor, signals for maintenance and alarm status indication.

1) V5 byte V5 byte is the first byte of multi-frame, whose location is indicated by TU-12/TU -2 pointer. V5 byte can provide error code check, signal label and path status functions related to TU-12/TU-2 path. The bit distribution of the bytes is indicated in Table 3-1:

Table 3-1: V5 byte bit distribution

ED 01


Error code monitor (BIP-2)

Remote block error indication

(REI)

Remote failure indication

(RFI) Signal label

Remote receive failure indication

(RDI) 1 2 3 4 5 6 7 8

Error code monitor: Transmit bit interleaved parity code BIP-2: The first bit should be set in such way that the parity check of all the odd bits of all the bytes within the previous VC-12 multi-frame is even numbers. The second bit should be set in such way that the parity check of all even bits is even number.

Remote error block indication (FEBE before): BIP-2 sends 1 to the VC12 channel source when detecting error code block sends 0 if no error code is detected

Remote failure indication: Send 1 in case of failure Send 0 in case of no failure.

Signal label: Indicating load status of payload and mapping mode. 8 binary values of 3-bits 000 unequipped

with VC path 001 equipped

with VC path but not set the effective load.

010 Asynchronous float mapping

011 synchronous bit floating

100 synchronous byte floating

101 Reserved 110 O. 181 test

signal 111 VC-AIS

Remote receive failure indication (FEREF before): Send 1 in case of receiv e failure; Send 0 in case of success.

2) Path trace byte J2

J2 byte is used to repeatedly transmit low order path access point identifier (LO APId) so that the path receiver can confirm that it is in the continual connected status with the assigned transmitter. The path LO APId uses the numbering format as stipulated in G.831 and transmits APId using 16 bytes frame. The specific stipulations are the same as the 16 bytes frame of J0. 3) Network operator byte N2

The byte is used to provide the tandem connection monitor (TCM) function for the low order path. Please refer to G.707 recommendation for the complementation details.

4) Automatic protection switching (APS) channel K4 (b1-b4) These 4 bits are used to provide the APS command for low order path protection.

5) Reserved bits K4 (b5-b7) These bits are reserved bits randomly selected. If they are not used, should set as “000” or “111”. 6) Data link bits K4 (b8)

The bits are for future use and the values are not determined. The receiver is required to ignore its contents.

ED 01


3.2.2.2 Higher order VC POH (VC-3/VC-4 POH)

Adding VC-3 POH to C-3 or the combination of multiple TUG-2s will form VC-3; Adding VC-4 to C-4 or the combination of multiple TUG-3s will form VC-4. The functions of higher order VC POH include VC path performance monitor, alarm status indication, signal maintenance and multiplex structure indication, etc. The functions are described as follows:

1) POH path trace byte: J1 J1 is the first byte of VC, the location of which is indicated by the relevant pointer. The byte is used to repeatedly transmit higher order access point identifier (HO APId) so that the path receiver can confirm that it is in the continual connected status with the assigned transmitter for tracking the connected status of the path. The 16 bytes frame format of J1 is completely the same as that of JO. 2) Path BIP-8: B3

B3 byte uses BIP-8 code of even check for error code monitor. It calculates all the bits of the previous VC-3, VC-4, or VC-4-Xc and the results will be placed at the B3 byte location of VC-3, VC-4, or VC-4-Xc. 3) Signal label byte: C2

C2 byte is used to indicate the groups or the maintenance status of VC-3, VC-4, or VC-4-Xc. Table 3-2 lists the hexadecimal coded characters corresponding to the 8 bits of the byte and its meanings.

Table 3-2: the code meaning of C2 byte C2 byte Hexadecimal code Meaning

00000000 00 Unloaded signal or monitored unloaded signal 00000001 01 Loaded non-specific net load 00000010 02 TUG structure 00000011 03 Locked U

00000100 04 34.368Mbit/s and 44.736 Mbit/s signals are asynchronously mapped in C-3

00010010 12 193.246 Mbit/s signals are asynchronously mapped in C-4

00010011 13 ATM mapping 00010100 14 MAN (DQDB) mapping 00010101 15 FDDI 11111110 FE 0.181 test signal mapping 11111111 FF VC-AIS (only for tandem connection)

4) Path status byte G1

G1 byte is used to send back the path terminal status and performance detected by the path sink end to VC-4/VC-3 path source end. b1-b4 sends back the quantity of the error blocks of VC4 path detected by B3 (BIP-8) to the transmitting terminal, i.e. the HP-REI. When the receiving terminal receives AIS, error code threshold crossing, J1 and C2 mismatch, one HP-RDI (higher order path remote degrade indication) is sent back by the fifth bit of G1 byte to the transmitting terminal to enable the transmitting terminal to understand the corresponding VC4 receiving status at the receiving terminal, so as to identify and locate the failure timely. The b6 and b8 of G1 byte are temporarily not used. 5) The channel bytes F2 and F3 of the path customer

The two bytes are used for the communication liaison between the path units and are related to the payload. 6) Location indicating byte H4

The byte provides the payload with general location indication and it can also be used to indicate special payload location, for example, it can be used for the indication of the multi-frame location of VC-12/VC-2. 7) Automatic protection switching (APS) channel K3 (b1-b4)

These bits are used as the APS commands for higher order path protection. 8) Network operator byte N1

The byte provides the tandem connection monitor (TCM) function for higher order paths. Tandem connection refers to the application that one group of VC can transmit one or several tandem connected circuit systems together while still can keep the payload. The tandem layer is between the multiplex layer and the path layer and is used for inter-exchange communications. By using the TCM function provided by NI byte, each company could know how many errors it has received and how many errors it has transmitted to the next network operation company. 9) Equipment bit K3 (b5-b8)

ED 01


These bits are reserved for future use and the values have not been set yet. The receiver should neglect these bits.

3.3 SDH system multiplexing and mapping path

Figure 3-3: SDH system multiplexing and mapping path

ED 01


4 Functional description

4.1 System description

4.1.1 General

The functional block diagram of 1642EM is shown in Figure 4-1. The main board mainly completes the control function, cross connection function, clock selection function and other auxiliary functions of the whole equipment; the cross connection section of the MB board provides 378×378 TU-12 space division cross connection and complete the flexible operation of E1. The cross connection section provides VC4 bus at six directions, among which two buses are connected to the two STM-1 interfaces on the main board and the rest four are connected to the back board and sent respectively to the 4 service slots on the second and third layers, as shown in Figure 4-2. Different service boards can be connected into the service slots, including E1 interface board, Ethernet interface board, E3 interface board, DS3 interface board and STM-1 ( optical or electrical ) interface board. It is important to note, STM-1 ( optical or electrical ) interface board should be inserted on the second layer (Slots 2 and 3) of the equipment. If it is inserted on the third layer (Slots 4 and 5), the network management will be unable to manage and configure the remote equipment connected with this interface.

Figure 4-1: The functional block diagram of 1642EM system

VC MATRIX

CARD 1

OTM-1

TELCOMBUS

OTM-1

SEC

InternalOscillator

ORDERWIRE

telphone

6 ExternalTimingSources

EC&SC ALL INONE PROCESSOR

SystemClock

CARD 1 CARD 1 CARD 1

TELCOMBUS

TELCOMBUS

TELCOMBUS

TELCOMBUS

TELCOMBUS P

OWER

INTERFACE

BACKPLANE

FAN

STM-1Interface

STM-1InterfaceExternal

2Mbpsinterface

E1 BYTEQecc

ADD/DROPMICROBUS

F Q3

MAINBORAD

OH ADD/DROP

RS232Rmt AlarmsHouskeeping

MultiInterface

MultiInterface

MultiInterface

MultiInterface

POWER SUPPLY FACEPLATE

OH

FROM/TO 4 CARDAND 2 OTM

ED 01


Figure 4-2: Layout the bus of backboard MB board provides one VC-4 bus for each slot on the second layer and the third layer, the bus engages in the cross connection matrix of TU-12 on the first layer of the MB board. The modules and service boards are listed below. Modules on the main control board: • ECSC module

CPU control part of 1642EM system, the module using Motorola bus mode controls all the service slots and other units on the main board.

• CLOCK module The module provides the system a clock, with three operation modes: tracking synchronization mode, synchronization holding mode and free run mode, ensuring high quality of the equipment clock and providing the network with the best synchronization performance. Two types of module are available: Ø SCM: Standard Clock Module Ø ECM: Enhanced Clock Module

• OT1M1 interface module It provides STM -1 optical interface, uses different optical modules can provide S1.1, L1.1 and L1.2 optical interfaces. A maximum of two OT1M1 optical interface modules can be inserted into the main board. The service board OT1B1 inserted with different OT1M1 modules can also provide different optical interfaces.

• ET1M1 interface module It provides STM -1 optical interface, A maximum of two OT1M1 optical interface modules can be inserted into the main board.

• EOWM module It provides the service telephones in the ring network and link network

Service boards of the equipment: • E1RCB8

8-channel E1 (2.048 Mb/s) coaxial interface (75Ohm), with 2M clock re-timing function • E1B8

8-channel E1 (2.048 Mb/s) 2mm pin interface (75Ohm) • E1B28

28-channel E1 (2.048 Mb/s) 2mm pin interface (75Ohm) • SE1B8

8-channel E1 (2.048 Mb/s) 2mm pin interface (75Ohm), 2M interface with no protection of lightening strike.

• SE1B28 28-channel E1 (2.048 Mb/s) 2mm pin interface (75Ohm), 2M interface with no protection of lightening strike.

• DE1B8 8-channel E1 (2.048 Mb/s) 2mm pin interface (120Ohm)

VC

-4 bus

VC

-4 trunk

VC

-4 bus

VC

-4 bus

VC-4 bus

The third layer

The second layer

The first layer

ED 01


• DE1B28 28-channel E1 (2.048 Mb/s) 2mm pin interface (120Ohm)

• SDE1B8 8-channel E1 (2.048 Mb/s) 2mm pin interface (120Ohm), 2M interface with no protection of lightening strike.

• SSDE1B28 28-channel E1 (2.048 Mb/s) 2mm pin interface (120Ohm), 2M interface with no protection of lightening strike.

• DE1B32 32-channel E1 (2.048 Mb/s) 2mm pin interface (120Ohm), 2M interface with no protection of lightening strike.

• E3B1 1-port E3 (34Mb/s) interface

• DS3B1 1-port DS3 (45Mb/s) interface

• FEB6 6-port 10M/100M Ethernet electrical interface

• ISA-ES1 8FE 8-port 10M/100M Ethernet electrical interface

• ISA-ES1 3FE 3-port 10M/100M Ethernet interface, 1 optical interface and 2 electrical interface

• OT1B1 1 STM-1 optical interface, OT1M1 module must be inserted and different optical modules provide different optical interfaces.

• ET1B1 1 STM-1 electrical interface, ET1M1 module must be inserted to provide electrical interfaces.

Other functional boards: • DC48B

-24V/48V DC power supply interface board • AC220B

220V AC power supply interface board • FB

Fan board, has three fans, can monitor the operation status of each fan through the network management. The board provides one -24V/-48V power supply interface to act as the standby input end of the –24V/-48V power supply.

• SFB Fan board, has three fans and can monitor the operation status of each fan through the network management. There is no power supply interface.

• PBP48 The power supply-board mainly completes the power supply conversion function from -48V to 3.3V and 5V, with power supply protection function.

• PBP24 The power supply-board mainly completes the power supply conversion function from -24V to 3.3V and 5V, with power supply protection function.

• MB Main control board, need to be inserted with various modules, mainly completes the management and control functions of the system, SDH low order cross function and functions of some auxiliary paths.

ED 01


The system can be divided into the following subsystems according to the functions completed by the equipment: • Service interface subsystem • Protection subsystem • Sub-network connection protection • Timing subsystem • Control subsystem

Mainly complete two functions: EC-equipment control and SC-rack control • Network management interface • Auxiliary path and DCC subsystem

Mainly completed by the overhead processing part and auxiliary access part. • Power supply subsystem • Remote inventory subsystem

Each single board has this function The functions of the above subsystems are described in the following parts of this chapter.

4.1.2 Service interface subsystem

Figure 4-3 shows the block diagram of the service interface subsystem. It is mainly based on the service interfaces provided in the equipment to describe the functional modules for the mapping, de-mapping, multiplexing, de-multiplexing and processing of overhead byte during the process from these service interfaces to SDH frame structure. Figure 4-4 shows the SDH multiplexing and mapping structure used in this equipment. Modules in Figure 4-3: • O/E, E/O: photo-electric or electric optical conversion unit It is mainly completed by optical/electric conversion module. In electrical interface mode, this module is replaced by electrical transiver module. • OH Processor: overhead processor It is used to complete the extraction and insertion of regenerator section and multiplex section bytes in the SDH frame structure and processing of POH higher order paths, such as extraction and insertion of E1, E2, F1, D1-D3, and D4-D12. It also completes the extraction of line clock and alarm processing. • TUPP: tributary unit payload processor It adjusts the phase relations between the higher order input signals and the higher order output signals through processing low order tributary units (TU3 and TU12), so that the pseudo-synchronous relations of the higher order payload SPE can be compensated in terms of receiving and transmitting rate. The tributary unit processor de-complexes the received STM-1 signals and reinserts the de-multiplexed low order tributary signals into the new STM-1 frame for output. There is no AU pointer adjustment in the output STM-1 frame so that the locations of the tributary signals are completely fixed to the frame head for easy cross connection processing of the tributary signals. • Matrix: cross-connected unit It completes the cross functions of VC-4 at 6 directions, i.e. the cross of 378×378 TU12.

ED 01


• E1 Mapping: asynchronous mapping unit It completes the mapping and de-mapping process from 2.048Mbit/s signal to TU -12, while complete the multiplexing and de-multiplexing function of the signals from VC4 to TUG3, TUG2 and TUG12. The add bus and the drop bus use independent timing module, complete multi-frame alignment using H4 byte test mode and provide far end loop-back and near end loop-back functions for testing and failure identifying. • Retiming or Bypass: retiming unit E1RCB8 board possesses retiming function and performs retiming processing for the 2M signals. Other 2M boards adopt bypass mode. • 2MLIU: Line interface unit The differential interface of the receiving part has very high noise tolerance. It first completes equalized amplification for the data signals arriving at the G.703 physical interface, resumes the clock, tests the LOS alarm and transmits line code HDB3 to the mapping chip after decoding. The transmitting part first completes coding of HDB3 after the signal is de-mapped, shapes the signal according to G.703 standards after the jitter is attenuated, drives the line and then transmit to the external lines. • VC4 Bus retiming: VC4 bus sequence adjuster As difference exists between the SDH Telecom bus interfaces of EOS mapping unit and the bus interface of the system in terms of sequence, VC4 bus sequence adjuster adjusts the sequence to make the interfaces matched. • EOS Mapping: EOS (Ethernet Over SDH) mapping unit The unit uses GFP/LAPS protocol to achieve the mapping and de-mapping of the Ethernet signal and SDH payload. The mapping bandwidth can be flexibly configured into one to five VC12s or one to three VC3s and can operate in the mode of point-to-point or ring network. It uses large capacity SDRAM of 16M as the buffer of the Ethernet frame. The 100M full duplex interface at the Ethernet side uses MII interface, while the SDH side uses standard 19M Telecom bus interface. • Ethernet Switch & Interface: Ethernet switch and interface unit Ethernet interface and the terminal equipment adapt or adjust to the best operation mode (support 10M or 100M rate, full-duplex or semi-duplex modes) and can display the link and rate status of each port through the LED on the panel. The Ethernet switch chip supports 7 ports 100M block-free switch function. • E3/DS3 Mapping: 34M/45M mapping unit It completes the asynchronous mapping and the reverse de-mapping from E3 signal to VC3. The signal from the line interface unit is first mapped to VC3, and then aligned in TU3, then multiplexed to TUG3 and finally multiplexed to V4 signals and sent to the back panel through TELECOM BUS. Likewise, the VC4 signals sent from the back panel complete the reverse de-multiplexing and de-mapping process and the de-mapped signals are sent to the line interface unit. The mapping unit also provides the functions of performance counting, alarm test and loop-back. • 34M/45M LIU: 34M/45M line interface unit The inputted signal is amplified and equalized; the LOS alarm is tested; the clock and data are resumed and the HDB3 code of the line signal is decoded and sent to the mapping unit. The line interface unit, at the transmitting direction, first completes the coding of the de-mapped signals sent from the mapping unit according to the format of HDB3 code and then completes the pulse shaping of the coded signals, and finally transmits the signals complying with standard template to the lines.

ED 01


Figure 4-3: Block diagram of service interface subsystem

Figure 4-4: 1642EM SDH multiplexing and mapping structure

Bac

k bo

ard

A d

irect

ion

B d

irect

ion

8 port 10/100M Ethernet

ED 01


4.1.3 Timing subsystem

4.1.3.1 Performance requirement of SDH transmission equipment clock

Please refer to the technical requirements of SDH equipment -- clock in G.813 of the ITU-T recommendations for the performance requirement of SDH transmission equipment clock.

4.1.3.2 Functional requirements of SDH transmission system for timing transmission

Establishing a digital synchronous network based on SDH transmission network must make use of STM-N line/tributary signals as the timing link for timing transmission. The transmission timing functional requirements of SDH transmission system are the requirements for the clock functional structure of SDH transmission system. The functional structure of SDH equipment clock meets the regulations in G.783 of ITU-T recommendations, as shown in Figure 4-5. In the figure, T1 is the STM -N input interface, i.e. signals from STM -N line/tributary unit; T2 is the PDH input interface, i.e. signals from PDH tributary unit; T3 is the external synchronous input interface, i.e. the reference signals from externally connected timing input; SETG is the synchronous equipment timing generator, i.e. the SEC of SDH equipment clock; T4 is the external synchronous output interface and its timing output can be directly exported from STM-N line/tributary unit and can also complete the internal timing interface from SETG T0.

Figure 4-5: the functional structure of SDH equipment clock

The selectors in the structure of SDH equipment clock possess the following functions (1) Selector A Ø Selector A has the function of priority setting and block/open setting for all the STM-N line/tributary

signals. Ø Selector A has the function of sequencing according to the SSM quality level and preset priority of all

the selected input signals. (2) Selector B Ø Selector B has the function of priority setting and block/open setting for all the STM-N line/tributary

signals.

Selector A

Selector B

Selector C

ED 01


Ø Selector B has the function of priority setting and block/open setting for at least one path of PDH tributary signals.

Ø Selector B has the functions of priority setting, SSM quality level identification, SSM quality level presetting and block/open setting for all external synchronous input signals.

Ø Selector B has the functions of sequencing according to the SSM quality level and the preset priority of all the selected input signals.

(3) Selector C Ø Selector C has the function of direct export from STM -N line/tributary signal or bypassing SETG output. Ø Selector C has the function of setting SSM threshold. Ø Selector C has the function of inserting AIS data or blocking in T4 timing output signal according to the

set SSM threshold for 2Mb/s interface. Ø When the T4 timing output signal selects to export from STM -N line/tributary unit and when

LOS/AIS/LOF alarms appear in the selected STM -N line/tributary signals, Selector C has the function of inserting AIS data or blocking in T4 timing output signal for 2Mb/s interface.

(4) The priority sequence of the timing reference signal from top to bottom is Ø Manual forced order, such as forced holding or forced switching Ø Timing signal failure such as LOS AIS or LOF. Ø SSM quality level Ø Preset priority (5) Requirements of the external synchronous interface and physical interface of SDH equipment. Ø Quantity and types of interfaces

Install one external synchronous input interface and one external synchronous output interface and the interface type is 2048 Kbit/s. The physical/electric properties meet the requirements of G.703 in ITU-T recommendations. The frame structure of 2048 Kbit/s meet to the stipulations in G.704 of ITU-T recommendations. That is to say, in the 2048 Kbit/s multi-frame structure, the 4th, 5th, 6th, 7th and 8th bits of TS0 time slot with odd number indicate SSM data.

Ø 2048 Kbit/s external synchronous input interface It has the functions of identifying SSM quality level or AIS data identification or SSM quality level presetting.

Ø 2048 Kbit/s external synchronous output interface It has the function of transmitting SSM quality level or transmitting AIS data or blocking its output according to the SSM quality level of SDH multiplex section layer.

(6) Reference signal failure processing Once the server layer detects defect of reference signal, it immediately activates the synchronous source signal failure. And in order to allow correct processing under the quality level QL (Quality Level) closing mode, the non-selected synchronous signals should also has the ability of signal failure activation processing. Ø Hold-off time The hold-off time ensures that the transient activation of the signal failure is not processed through the selection. Ø Wait to restore time The wait to restore time ensures that the previous failed synchronous signal, `after processed through selection, will be reconfirmed as effective only after a certain period of time in which no failure occurs.

4.1.3.3 The SSM functional requirements of SDH transmission equipment

The SSM functional requirements of SDH transmission equipment mainly involve three aspects: the definition of SSM quality level, SSM response principle and SSM response time delay. (1) Definition of SSM quality level

ED 01


It is specified in G.707 of the ITU-T recommendations that the 5-8 bits of multiplex section S1 byte in STM-N frame structure are used to indicate SSM quality level and the definition is given in Table 4-1.

Table 4-1: The coding description of synchronous status massage (SSM)

SSM coding Priority

sequence Description of quality

level The corresponding Chinese

clock levels 0010 Max. QL_PRC Level 1 reference clock 0000 ↓ QL_UNK (optional) Quality level unknown 0100 ↓ QL_SSUT Level 2 node clock 1000 ↓ QL_SSUL Level 3 node clock

1011 ↓ QL_SEC SDH network element

equipment clock 1111 Min. QL_DNU Synchronous signal unavailable

Others Pre-reserved (2) SSM response principle Ø The principle for re-transmitting SSM quality level in the holding status

When SEC loses the input timing reference signal and no other timing reference signals are available, SEC will enter the holding status, the STM-N lines/ tributary units in all directions and the external timing output signal (except those directly exported) should transmit the SSM data of SEC clock level.

Ø The principle for re-transmitting SSM in the non-switching status When the SSM quality level of the timing reference signal selected by SEC changes and does not cause reference switching, the STM-N lines/tributary units in all directions (except those transmitting DNU in reverse direction) and the external timing output signal (except those directly exported) should transmit the varied SSM quality level data.

Ø Regulations for re-transmitting SSM in the switching status When SEC selects new timing reference signal, the STM -N lines/tributary units in all directions (except those transmitting in reverse direction) and the external timing output signal (except those directly exported) should transmit the SSM quality level data of re-selected timing reference signal.

Ø Principles for reverse transmission

When SEC selects a STM -N line/ tributary unit as the timing reference signal, its corresponding reverse

STM-N line/ tributary should transmit the SSM quality level data of QL_DNU.

When the external timing output signal selects to be exported through STM-N line/tributary unit and SEC

selects the external timing input signal as the timing reference signal, its corresponding reverse STM -N line/

tributary unit should transmit the SSM quality level data of QL_DNU.

Ø Principles for direct export of external timing output signal

When the external timing output signal selects to be exported through STM-N line/tributary unit, it should

transmit the SSM quality level data of the STM -N line/tributary unit selected. When LOS/AIS/LOF alarms

appear in the selected STM -N line/tributary signal, the 2Mbit/s interface has the function of inserting AIS data

in external timing output signal or blocking.

ED 01


4.1.3.4 Retiming principle of PDH 2Mb/s tributary

In the local transmission network layer, when SDH transmission system is unable to extend and needs to

use PDH 2Mbit/s tributary unit for timing transmission, its PDH 2Mbit/s service must be retimed to avoid the

effect on the timing quality caused by SDH pointer adjustment.

• Basic principle for retiming

Basic principle for PDH 2Mbit/s service retiming dropped from SDH transmission system is shown in Figure

4-6.

Note: the retiming function can be one function of the SDH network element and it can also be an independent entity. When the retiming function is an independent entity, its timing signal can come from the synchronous supply unit within the exchange.

Figure 4-6: Schematic diagram of PDH 2Mbit/s tributary retiming • Retiming requirements (1) SDH network element retiming functional module should provide retiming buffer storage for the

retiming of 2Mb/s service. The capacity of the buffer storage should be at least 125us (1 frame) + 18us (slide control lag).

(2) SDH network element should be able to accumulate the slide times generated in the retiming buffer storage to serve as relevant performance monitor data.

4.1.4 Cross connection subsystem

4.1.4.1 General

The cross-connection subsystem is the functional center of 1642EM optical transmission equipment, has powerful cross connection function, support the cross connection of low order path, with flexible configuration feature. The cross connection subsystem of 1642EM has 6×6 equivalent VC-4 space division cross connection matrix at the level of VC-12 and VC-3. It can achieve functions such as time slot assignment, protection switching and port loop-back between aggregate and aggregate, tributary unit and tributary unit and aggregate and tributary unit. This enables 1642EM optical transmission system to have powerful networking capacity and to support point-to-point, link, ring and other more complicated network topology structure. When working with protection switching subsystem, the cross connection subsystem has powerful sub-

SDH network element Timing extraction Write clock

Buffer storage

2MHz timing signal

Read clock

Timing recover circuit

Note

ED 01


network connection protection function, ensuring the reliability of the transmission network. The cross capacity is as shown in Table 4-2.

Table 4-2: Cross capacity table

Cross capacity Capacity 6X6 VC-4

Level VC12, VC3

Mode Tributary unit and tributary unit,

aggregate and aggregate, tributary unit and aggregate

4.1.4.2 Cross connection function

Figure 4-7: View of cross connection subsystem The view of the cross connection subsystem is shown in Figure 4-7. The cross connection subsystem achieves the low order path cross connection between the VC-4 signals from the 6 slots of 1642EM optical transmission equipment. Slot 0 and Slot 1 are the slots for STM-1 optical module and the rest 4 slots can be used to insert E1 interface board, E3/DS3 interface board, fast Ethernet interface board and STM -1 optical interface board. Tributary interface and aggregate interface have the same cross connection; therefore, cross connection can be made in any way between the interfaces, i.e. can achieve multiple cross connection functions such as through connection, add-drop, broadcasting, branching and loop-back. Through: The through mode refers to one aggregate input cross connection matrix that does not involve in add and drop tributary services but directly output from another aggregate interface. In this case, the equipment plays the role of a relay, as shown in Figure 4-8:

No.2 VC-4

No.3 VC-4

No.4 VC-4

No.5 VC-4

No.0 VC-4

No.1 VC-4

Cross connection

configuration information

6×6 space division cross

connection matrix

Slot 2

E1 interface board/

E3, DS3 interface board/ Fast Ethernet interface board/

STM-1 optical interface board

Slot 3

E1 interface board/ E3, DS3 interface board/

Fast Ethernet interface board/


Slot 4

E1 interface board/ E3, DS3 interface board/

Fast Ethernet interface board/


Slot 5

E1 interface board/

E3, DS3 interface board/ Fast Ethernet interface board/


Slot 0 STM-1 optical

module

Slot 1 STM-1 optical

module

Protection switching subsystem

ED 01


Figure 4-8: through mode Add-drop: The add-drop mode refers to drop services from the aggregate to the tributary unit or add the services from the tributary unit to the aggregate according to the configured time slot. The add and drop service time slots are any of the applicable time slots on the aggregate and can be different, as shown in Figure 4-9:

Figure 4-9: Add-drop mode Broadcasting: The broadcasting mode refers to drop the same service from the aggregate to more than two tributary unit, or the same tributary unit service is added in more than two aggregate time slots, and it can also be configuring the same service between the aggregates to multiple time slots as well as combined application of these modes, as shown in Figure 4-10:

Figure 4-10: Broadcasting mode

Aggregate A Aggregate B

Cross connection matrix

Tributary unit



Tributary unit



Tributary unit

ED 01


Branching: the branching mode refers to any cross configuration of low order services between aggregates, tributary units and between aggregates and tributary units. The branching of the aggregate and the tributary unit is shown in Figure 4-11:

Figure 4-11: branching mode Loop-back: the loop-back mode means that the services on the aggregate or the tributary unit are output from the same time slot after entering the cross connection matrix. There are two modes: aggregate loop-back and tributary unit loop-back, as shown in Figure 4-12:

Figure 4-12: loop-back mode

4.1.4.3 Cross connection configuration

The cross connection configuration information required by the 1642EM cross connection subsystem is provided by the protection switching subsystem. According to specific protocol, the protection switching subsystem transmits the cross connection configuration information table to the cross connection subsystem and the cross connection configuration information table has two modes: VC12 and VC3, as shown in Table 4-3:

Aggregate

Time slot 1

Time slot 1

Tributary unit

Time slot 1

Time slot 2

Aggregate A Aggregate A


Tributary unit

ED 01


Table 4-3: cross connection configuration information table VC12 mode

SN of time slot configuration SN of cross output time slot SN of cross input time slot 1 No.1 VC12 of No.0 VC-4 No. X VC12 of No. X VC-4 2 No.2 VC12 of No.0 VC-4 No. X VC12 of No. X VC-4

….. …. . …. . 63 No.63 VC12 of No.0 VC-4 No. X VC12 of No. X VC-4 64 No.1 VC12 of No.1 VC-4 No. X VC12 of No. X VC-4 ….. …. . …. . 378 No.3 VC12 of No.5 VC-4 No. X VC12 of No. X VC-4

VC3 mode

SN of time slot configuration SN of cross output time slot SN of cross input time slot 1 No.1 VC3 of No.0 VC-4 No. X VC3 of No. X VC-4 2 No. 2 VC3 of No.0 VC-4 No. X VC3 of No. X VC-4 3 No 3 VC3 of No.0 VC-4 No. X VC3 of No. X VC-4 4 No. 1 VC3 of No.1 VC-4 No. X VC3 of No. X VC-4 5 No. 2 VC3 of No.1 VC-4 No. X VC3 of No. X VC-4

….. …. . …. . 18 No. 3 VC3 of No. 5 VC-4 No. X VC3 of No. X VC-4

4.1.5 Protection switching subsystem

4.1.5.1 General

The protection switching subsystem achieves the protection switching function of the services. It processes the service operating status according to service configuration information, service protection information and alarm monitor information. It refreshes the cross connection configuration information table and transmits it to the cross connection subsystem, thus achieving the configuration and protection switching of the services. The protection switching subsystem is shown in Figure 4-13 and it is divided into 4 modules: the configuration interface, alarm monitor interface, protection switching status processor, cross connection configuration information interface.

Figure 4-13: View of the protection switching subsystem

Network management terminal;

Configuration interface

Configuration information

Protection switching status

processor

Cross information

Cross connection configuration information interface.

Alarm monitor interface

Cross connection configuration

information table. Alarm

information

Cross connection subsystem

External alarm

ED 01


4.1.5.2 Configuration interface

The network management writes the service configuration information and the protection configuration information into the protection switching subsystem through the configuration interface. The configuration information include: • Operating time slot number • Main time slot number • Standby time slot number • Forced primary enabled • Forced standby enabled • Standby time slot effective enabled • Restore switching enabled • The switching restores time with 10 seconds as the multiple. The restore switching means that when a failure occurs in the primary time slot and the operating time slot is switched from the primary time slot to the standby, and then, if the failure of the primary time slot is removed, after the wait to restore switching time (generally 5 minutes), the operating time slot is switched back to the primary time slot. However, in non-restore switching mode, the original standby time slot becomes the primary time slot after switching to the standby time slot, and the original primary time slot becomes the standby time slot.

4.1.5.3 Alarm monitor interface

Alarm monitor interface monitors the alarm of the time slots in a real time manner, and if alarms such as MS-AIS, AU-AIS, AU-LOP, TU-AIS, TU-LOP, LOM and error code over limit, it will trigger the protection switching processor for switching processing.

4.1.5.4 Protection switching status processor

Protection switching status processor is the core part of the protection switching subsystem. It processes the protection switching status according to network management configuration information and the alarm status, and generates current service time slot table and cross connection configuration information table according to the protection switching status. Meanwhile, it transmits the latest cross connection configuration information table to the cross connection subsystem. The protection switching time is an important index to measure the protection switching performance and it determines the self-healing and reliability of SDH network operation. For this purpose, 1642EM optical transmission equipment adopts the proprietary system hardware to achieve processing of protection switching. Compared with the realization mode of conventional protection switching control soft ware, the processing only depends on the response time of the hardware and the time taken for the protection switching is thus greatly reduced. This is very significant to services, such as such as signaling, picture and data, that are sensitive to error code. The typical switching time is much better than the 50ms switching time as required in ITU-T recommendations. The service protection switching in the protection switching processor is divided into two levels: VC12 and VC3. For the switching of multiple services at the same level or the combined VC12 and VC3 services, the switching time is also much better than the 50ms switching time as required in ITU-T recommendations.

4.1.5.5 Cross connection configuration information interface

Cross connection configuration information interface performs the function of transmitting the cross connection configuration information table from the protection switching processor to the cross connection subsystem. There are two transmission modes for the cross connection configuration information table: VC12 and VC3. Refer to the cross connection configuration of cross connection subsystem section for detailed definition.

ED 01


4.1.6 Sub-network connection protection

4.1.6.1 General

Sub-network connection protection (SNCP) is a fast protection mode suitable for various complex network topology structures.

Figure 4-14: View of sub-network connection protection As shown in Figure 4-14, sub-network connection protection (SNCP) uses the 1+1 protection mode. The services are transmitted simultaneously in the operating sub-network and protection sub-network, i.e. the so-called “concurrent” mode. In normal situation, the receiving terminal connected with the sub-network selects the signals transmitted on the operating network. When the connection of operating sub-network fails or the performance is degraded to some threshold value, the receiving terminal connected with the sub-network selects the signals on the protection sub-network according to the principle of “receiving the best”.

4.1.6.2 The sub-network connection protection of 1642EM

Due to the powerful overhead processing capacity of 1642EM system, powerful low order cross capacity of the cross connection subsystem and fast protection switching status processing capacity of the protection switching subsystem, 1642EM is able to achieve powerful low order SNCP function (VC12 level and VC3 level). 1642EM not only meets the ITU-T G.841 recommendations for SNCP, it can also meet the requirement that the switching time for multiple SNCP switching is better than 50ms, even if multiple SNCP switching are generated at the same time or SNCP switching of multiple VC12 and VC3 combined services.

4.1.7 Control subsystem

4.1.7.1 Functional description of control subsystem

The control subsystem of 1642EM is located at the PQ/ECSC module on the main board. It integrates EC (equipment control) and SC (Shelf control) functions, including MCF (Massage Communication Function), VMMF (Virtual Machine Management Function), PMMF (Physical Machine Management Function) and BPF (Basic Process Function). The control subsystem provides the hardware resources and software function (protocol stack) needed for the communication between the network element and the management system. The communication is based on F interface (connected with the management termination TNMS1000+), Q interface (connected with LAN) and QECC interface. The functional block diagram of control subsystem is shown in Figure 4-15. The control subsystem also provides administration function of SDH, including • General function: management time label embedded in the control path • Failure management: alarm monitor and alarm history management

SNC starting end Operating SNC

Sub-network 1

SNC terminating end Selector

Network element A

Protection SNC

Sub-network 2 Network element B

ED 01


• Performance monitor: performance monitor event processing, performance data collection, performance monitor history, application of threshold and performance data report.

• Configuration management: control and identification of network elements and data exchange • Safety management: Registration, password and safety level control To complete the above functions, the control subsystem is equipped with large-capacity non-volatile storage unit. There is a DIP switch on Main board that would effect software running. According to different software release the definition of DIP switches are different. Dip switches Pin1-2 （U30）On Main board configuration are shown as table4-4 and 4-5. N.B. Be sure Pin1- 2 ( U30 ) are all “OFF” for normal work!

Table 4-4: For Release 1.0 Pin 1 Pin 2 Function Description OFF OFF NORMAL OFF ON NORMAL ON OFF NORMAL ON ON Stopped in Rawloader, application can’t work

Table 4-5: For Release 2.0 Pin 1 Pin 2 Function Description OFF OFF NORMAL OFF ON Scratch Main DB and LOCAL DB ON OFF Scratch Main DB and LOCAL DB ON ON Format all the content of CF

4.1.7.2 The external interface of the control subsystem

• F interface It performs the local management of the network elements through TNMS1000+. The interface is on the panel of the main board

• QECC interface (DCC channel)

Each 1642EM provides 4 DCC channels, on Slots 0-3. The interface is a communication interface related to TMN. 1642EM provides two types of QECC interfaces; one uses the embedded communication path overhead byte in SDH frame to transmit through optical signals; the other transmits through the 9th E1 channel on E1RCB8. The first type is able to terminate three full-duplex DCC channels from SDH interface. The rate of DCC_M is 576kbit/s, the rate of DCC_R is 192 kbit/s and the rate of DCC_P is 64 kbit/s. The rate of the second type DCC channel is fixed at 192 kbit/s.

• HK interface

The interface has three groups of parallel input housekeeping signals and three groups of parallel output housekeeping signals for the customers to test the external environment. The interface is on the panel of the main board.

• LAN interface

It can be connected with LAN and located on the panel of the main board.

ED 01


Figure 4-15: Functional block diagram of the control subsystem

4.1.8 Network management interface

Please refer to ITU-T G.784 for general description of network management. The network management of the equipment is achieved through PC. The network management software is TNMS1000+. As the network management server, PC manages the whole network through TNMS1000. Taking one SDH network element as a gateway, the network management can be connected to all the 1642EM equipment through Qecc. Figure 3-16 shows an example of network management architecture. TNMS1000+ interface is actually a RS-232 (F interface) interface. It can perform: • Local management, connected with TNMS1000+ management termination through F interface. • Remote management, it addresses to the physical equipment through SDH equipment or SDH gateway

that is directly connected with TNMS1000+ management termination. In this case, the network management information is transmitted through optical fiber using DCC byte (Qecc connected). By this function, the equipment can address and manage the remote SDH network element.

The network management connection and the information transmission inside 1642EM are shown in Figure 4-17. The controller transmits information between Qecc, F interface and administrative bus. The controller uses DCC bus at the STM-1 port to transmit message to other network elements from TMN. Based on the network management configuration, information can be transmitted using D1:D12 or F2 bytes in the STM-1 frame structure. The SDH network element connected on the bus extracts information from these bytes and transmits it to the internal equipment controller. The selected controller of the network element uses management bus and the units to transmit information (for configuration and status processing). These data will be transmitted to the network management through STM -1 DCC (Qecc).

Main board panel

ED 01


Figure 4-16: View of network management architecture

Network management

ED 01


Figure 4-17: Connection between 1642EM and network management (through gateway)

4.1.9 Auxiliary channel and DCC subsystem

SDH provides overhead byte in SOH and POH of the synchronous frame structure. These bits are used to process the functions of byte alignment, parity check, network management, and performance test, etc. Some of them are used for auxiliary data service (data communication between customer’s terminal equipment) and network management (DCC: data communication path), as shown in Figure 4-18. The bytes used as auxiliary services in the SDH frame structure are: E1 and F2, can be used as order wire bytes and configured by network management; F1 and E2, used as auxiliary service transparent path bytes to achieve equipment data service communication. Network communication bytes (DCC) are D1-D3 (regenerator section) and D4-D12 (multiplex section). The transmission rate of the auxiliary channel between network elements is 64kbit/s and DCC channel can be configured as 576kbit/s, 192 kbit/s or 64 kbit/s, mapping respectively into the corresponding frames. One network element can receive DCC in four directions simultaneously. External interfaces of the system are: • One EOW (Engineering Order Wire) interface with 64 Kbit/s • Two RS-232 data interface with 64 Kbit/s • One 100M Ethernet interface • One F interface

Network management

ED 01


*: Slots 0-1 are fixed as optical module and STM -1 signals are transmitted; when slots 2-3 are optical service board, it is the same as Slot 0. If it is a 2M service board, it is as shown in block diagram of Slot 2. **: Slots 4-5 do not support DCC channel. They only support EOW channel.

Figure 4-18: Auxiliary channel and DCC subsystem

Ethernet Slot 0 (0TA)

SOH Processing

POH Processing

Slot 1 (0TB)

Slot 2* 2Mb/s frame time slot processing

Slot 3

Slot 4**

Slot 5**

ED 01


4.1.10Power supply subsystem

The power supply of the equipment adopts integrated power supply mode. All the power supplies are converted from –24V or -48V by the DC/DC converter on the PSF (Power Supply Front –panel) board and mainly provide two operating power supplies: +5V and 3.3V. Each single board including the main board, service board and function modules has the DC/DC converter to provide the 1.8V and 2.5V power itself. In order to ensure stable and uninterrupted power supply of the equipment, the power supply adopts primary and standby mode. The fan board on the left of the frame and the power supply board on the right of the frame can provide -48V power supply at the same time. In case one power supply fails, the other will provide stable power supply, thus power failure will not occur to the system. The switching in this case is completed automatically by the hardware. Meanwhile, in order to meet different power supply requirements, the system can provide -220V power supply in the power supply board location ( 24V box （3AL97081ADAA）can not support AC220B power supply), and can obtain -48V power supply through AC/DC conversion, to be supplied to the PSF board for DC/DC conversion to generate 3.3V and 5V power supply. The block diagram of the power supply subsystem is shown in Figure 4-19:

Figure 4-19: power supply subsystem

4.1.11Remote Inventory subsystem

RI (Remote Inventory) subsystem can enable the operator to obtain the information of any slot or module, including assembly date, number, name of manufacturer, slot type, etc. All the slots and modules have RI function. The relevant data are transmitted through SPI bus. As shown in Figure 4-20

PSF board

Main board

Module Module/single board

devices

ED 01


Figure 4-20: Remote inventory subsystem

Main board

Service board or module

ED 01


4.2 Units description

4.2.1 MB main board

The main board performs the system control of 1642EM equipment and can support the smooth upgrading to STM-4 without changing the hardware. See Figure 4-21 for the block diagram of the main board.

Figure 4-21: block diagram of the main board Main functions and features: • 2-channel STM -1 optical （or electrical ）interface • Management and control of service signals • Cross connection of service signals on the channels • Protection switching of the services • Synchronous function • SPI bus • Providing customer interface, status indicating lamp and reset button • Power supply • RI remote inventory

Service 2# Service 3# Service 4#

Service 1#

Service data flow

Service data flow

Service data flow

Service 0#

Serial interface

System clock System

bus B path E2 transparent path

A path F1 transparent path

B path F1 transparent path

A path E2 transparent path

Service data flow

2M clock

Synchronous clock signal Non-labeled signal

Service 5#

ED 01


2-channel STM-1 service interface 2-channel optical ( electrical ) module can be installed on the main board, providing STM-1 optical interface. The block diagram of the module is shown in Figure 4-22.

Figure 4-22: Functional block diagram of optical interface The receiver (optical interface to the main board cross connection chip) module completes the receiving of STM-1 optical signal, clock recover, overhead extraction processing, TUPP, and the signals are transmitted to “MultiIO” for low order cross connection. The transmitting terminal (main board cross connection chip to the optical interface) module completes overhead insertion, clock combination, STM-1 optical signal transmission, and the signals is transmitted to the optical interface. The management and control of service interfaces The control part of 1642EM performs the functions of EC and SC: EC functions include: - Messaging function: provides the hardware resources and software functions needed for the communication between network elements and network management system (local or remote, TNMS1000+). -Virtual machine management function: event reporting, network management login, database management, software download and other functions. - Physical machine management function: configuration and management of SDH functional modules and chips (status monitor, alarm and event collection, performance test), as shown in Figure 4-23:

OH

A/D BUS (CS0)

TUPP

TELCOMDROP BUS

TELCOM ADDBUS

FC EEPROM

A/D BUS (CS1)"Secer"FPGA

O/EE/O LOW LIGHT

DOWNLOAD

SOH

POH

AIS Indication

DATABUS

(CS7)

E1 BYTE

E2 BYTE

F1 BYTE

Qecc

SPIEEPRO

M

SPI(CS0)

SCLK,OTMF

SPI(CS3) 245

SPI(CS1)

ADDRESSBUS

(CS7)

ED 01


Figure 4-23: Block diagram of management and control function This function is achieved through the PQ/ECSC module on the main board. The main board provides address decode reassignment, regeneration of sequence and assignment of control signals. PQ/ECSC module can check the in-place and power-on status to each service board and achieve identification and reset of single boards. Cross connection of service signals The service signals of the optical modules on the service boards and main board are all collected to the cross connection module “MultiIO” on the main board, which achieves space division cross connection at TU-12 level and provides corresponding system clock and synchronous signals according to different types of service boards, as shown in Figure 4-24:

Figure 4-24: Functional block diagram of cross connection

Chip selection Service board

Chip selection

Address

Address bus

Optical module

Data bus

System clock Cross-connected out ofdata bus

Cross-connected in data bus

Service board/optical module

ED 01


The protection of services The system achieves service protection by using concurrent transmitting and receiving the best. “Ministry” has TU12 configuration information for every channel, through which control of “MultiIO” switching is achieved with “Ministry” and “MultiIO” serial bus, and the protection switching of the services is completed together. The synchronization of the equipment The clock module on the main board can extract clock from the line and generate 77M, 38M, 19M and 2M system clocks. The 19M clock is transmitted to “MultiIO”, which transmits it to the service board/module. The provided 77M clock can be the standby for future use of STM -4 module. Emulate SPI signal The downloading of FPGA on the main board is controlled through the software of PQ/ECSC module and is accessed by the emulate SPI interface. External Customer interfaces The main board provides interfaces: Ø 1-channel 100M Ethernet interface (Q) Ø 1-channel F interface (DB9 female connector) at a rate of 384000 (F) Ø 1-channel EOW telephone interface (OW) Ø 2-channel transparent path based on STM-1 E2 byte (E2A, E2B) Ø 2-channel transparent path based on STM-1 F1 byte (F1A, F1B) Ø 3-channel housekeeping input interface and 3-channel housekeeping output interface Ø 1-channel 2Mbit/s reference clock input and 1-channel 2Mbit/s reference clock output Ø Supports 2-channel STM-1 optical interface The main board provides a reset command key to achieve reset of the system. The key is on the main board panel and the status indicating lamp is also located on the main board panel and controlled by SC. The status of the main board panel LED Ø RUN LED: when the power-on is initialized, plugging board is initialized and the reset command issued

by the network management is initialized, the yellow LED is ON until the initialization is completed. The green LED flashes when the unit is in service. The green LED is ON or OFF in case of abnormal operation.

Ø POW LED: the green LED is ON when the system is normally powered on. Ø OTA LED: the red LED is ON in case of low optical power input, otherwise the green LED ON. Ø OTB LED: the red LED is ON in case of low optical power input, otherwise the green LED ON. Ø OW LED: The yellow LED is ON for 2 seconds and then OFF for 1 second, indicating to display the

service status of the first channel. And the subsequent 6 flashes (ON for one second and OFF for one second) indicate the service status of each channel. The red LED means that the order wire channel is blocked and the green LED means the order wire channel is smooth.

Ø CM LED: in intrinsic oscillation or locked mode, the green LED is ON. In holding mode, the yellow LED is ON. After the holding mode is kept for 24 hours, the red LED is ON.

3.3V and 3.5V power supply is taken from the PSF board for the power supply of the main board. 3.3V power supply is provided for the modules and chips on the main board and the DC-DC conversion from 3.3V to 2.5V and 1.8V is completed on the main board for power supply to FPGA. 5V power supply is provided for OW modules, optical modules and clock modules. RI is the storage for keeping MB data and upgrading records. See RI remote inventory subsystem section for details.

4.2.2 ECM enhanced clock module

ECM enhanced clock module mainly completes the timing function of the system. The locations of the modules in the system are shown in Figure 4-25:

ED 01


MS1

CM_2

CM_1

OW_1 OW_2

OPTB_1 OPTA_1PQ/ECSC CM

OWM

OPTB OPTAOPTB_2 OPTB_3 OPTA_2 OPTA_3

a b a b a b a b

abcd

1 18 1 18

1

15

1

15

1

15

1

15

ab

ab1 20 1 20

1 10

1 10

abcd

abcd

251

edcba

MS2

251

edcba

MS3

251

edcba

MS4

251

edcba

M1ab

163

264

M3ab

163

264

M2ab

163

264

M4ab

163

264

abcd

Figure 4-25: View of the locations of the clock modules on the main board Main functions: • Provides 1-channel 2Mbit/s external clock interface. • Supports three operating modes, LOCK, HOLDOVER and FREERUN, of the clock. • Can test the timing clock source and performs the switching of the clock source. • Can provide the service single boards with 2M, 19M, 38M and 77M clocks • Provides SSM function. • Supports the inquiry function of PCB and PLD versions. The functional block diagram of ECM is shown in Figure 4-26. ECM includes synchronous equipment timing generator, frame combination and division unit, “Encore” CPLD unit and RI data unit. ECM mainly provides synchronous equipment timing source of highly integrated SDH network element clock and necessary E1 access function. Description of the main functional unit: • Synchronous equipment timing generator Synchronous equipment timing generator provides SDH equipment clock and frame synchronous pulse, supports all three types of reference clocks, has high input jitter and drift allowance and supports protection function. • Frame combination and division unit As the receiver of main E1 access function, the frame combination and division unit meets the latest E1 specifications of G.703, G.704, G.706 and G.823 in ITU-T recommendations. • “Encore” CPLD unit “Encore” CPLD unit performs most of other logic functions and control functions, including the inverter to change 2.048MHz into 8KHz, decode the chip selection signal of the main board to that of the chips and some simple “AND” gate, “OR” gate, etc. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

ED 01


Figure 4-26: Functional block diagram of ECM

4.2.3 SCM standard clock module

SCM standard clock module mainly completes the timing function of the system. The locations of the modules in the system are the same as that of ECM modules. Main functions • Provides 1-channel 2Mbit/s external clock interface • Supports two operating modes of the clock: LOCK and FREERUN. • Can test the timing clock sources and performs the switching of the clock source. • Provides the service single boards with 2M and 19M clocks • Provides SSM function. • Supports the inquiry function of PCB and PLD versions. The functional block diagram of SCM is shown in Figure 4-27. SCM includes synchronous equipment timing generator, frame combination and division unit, “Smack” FPGA unit and RI data unit. SCM mainly provides synchronous equipment timing source of high-integrated SDH network element clock and necessary E1 access function. Description of the main functional unit: • Synchronous equipment timing generator Synchronous equipment timing generator provides SDH equipment clock and frame synchronous pulse, supports all three types of reference clocks, has high input jitter and drift allowance and supports protection function.

The output analog signal of the external

clock

The input analog signal of the external

clock

Circuit/tributary clock input

External clock output

External clock input Frame combination

and division unit

Synchronous equipment timing

generator

Control unit interface

System clock output

External clock input

RI data unit

CPLD unit

ED 01


• Frame combination and division unit As the receiver of main E1 access function, the frame combination and division unit meets the latest E1 specifications of G.703, G.704, G.706 and G.823 in ITU-T recommendations. • “SMACK” FPGA unit “SMACK” FPGA unit performs most of other logic functions and control functions, including the inverter to change 2.048MHz into 8KHz, 19.44 KHz to 8KHz, 2.048MHz into 16 KHz and decode the chip selection signal of the main board to that of the chips and some simple “AND” gate, “OR” gate, “exclusive or” gate, multiplex selector, etc. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-27: Functional block diagram of SCM

4.2.4 EOWM engineering order wire module

EOWM engineering order wire module mainly completes the OW function of the system. The modules can be inserted on the main board (MB). Main functions • Selective call • Omnibus call • Multi selective call • Inclusion on selective call • Release the party line

The output analog signal of the external

clock

The input analog signal of the external

clock

Circuit/tributary clock input

External clock output

External clock input Frame combination

and division unit

Synchronous equipment timing

generator

Control unit interface

System clock output

External clock input

RI data unit

FPGA unit

ED 01


The functional block diagram of EOWM is shown in Figure 4-28. EOWM mainly includes Cross connector manager, EOW manager, Phone interface ,and Management interface. Description of the main functional unit: • Cross connector manager

The main function of Cross connector manager is to collect the OW signals form the service board (OT1B1, ESTM1, E1RCB8,etc), to EOW manager, where routing, voice process and so on are processed. • EOW manager

EOW manager receives OW signals form Cross connector manager and its purpose is as below: l Manages the information (EOW) coming from Cross connector manager l Detects DTMF code coming from the different channels l Party line l Manages buzzer and LEDs present on the card front unit l Receives configuration information from the ”Management Bus”

• Phone interface This block is a voice-band audio processor and is designed to perform the transmit encoding (A/D

conversion) and receive decoding (D/A conversion) together with transmit and receive filtering for voice-band communications systems. The analogical data from Local Phone go through a serial port to the DSP where are managed

• Management interface

Receive and transmit the SPI bus to manage.

Figure 4-28: Functional block diagram of EOWM

ED 01


4.2.5 OT1M1 155Mb/s optical interface module

OT1M1 optical interface module performs the processing function for 1-channel STM-1 optical signal. The module can be inserted on the main board (MB) or on the optical tributary board (OT1B1) as a sub-board. Main functions: • Opto-electric / electro-optical conversion • Clock recovery / clock synthesis • SDH section overhead and higher order path overhead processing • Tributary unit payload process • DCC channel and order wire signal selection • Tributary unit AIS alarm extraction • Automatic laser shutdown and restart procedure The functional block diagram of OT1M1 is shown in Figure 4-29. The main functional units include optical interface unit, overhead processor, tributary unit payload processor, assistant unit (DCC, OW selection, TU-AIS extraction and ALS) and RI data unit. Description of the main functional units • Optical interface unit The optical interface unit achieves OE/EO conversion function through a receiving and transmitting combined optical module. The optical signals from optical fiber are converted into electric signals in the receiving direction and then are transmitted to the next level chip for processing. Low optical power alarm signals are transmitted at the same time if the fiber is cut. In the transmitting direction, the electric signals from the upstream chip are converted into optical signals and transmitted to the optical fiber. The optical interface unit meets the S1.1 standard as stipulated in G.957 of ITU-T recommendations. • Overhead processor Overhead processor mainly performs the functions of clock recovery /synthesis, SDH section overhead and higher order overhead processing. In the receiving direction, the signals first bypass clock extraction, recover the clock and data signals. Serial and parallel conversion is performed through identifying frame alignment signals (A1/A2 bytes) to test the status of LOS, OOF and LOF, and then section overhead processing is performed, including J0 byte test, B1 and B2 error code test, MS-REI counting, MS-RDI and MS-AIS test, OW byte and DCC path byte extraction, etc. Then VC4 path overhead processing is performed, including J1 byte mismatch test, B3 error code test, C2 byte mismatch or unloaded test, higher order RDI, AIS and REI test as well as optional H4 multi-frame byte test. In the transmitting direction, first the path overhead byte is inserted into the VC4 payload sent from the cross connection matrix and then the section overhead byte is inserted with the function of generating AIS alarm provided. Finally, 155.52MHz serial data signals are generated through clock combination processing and transmitted to the optical interface unit. • Tributary unit payload processor The main functions of tributary unit payload processor are: adjusting the phase relations between higher order input signal and higher order output signal (AU4) through processing low order tributary unit (TU3 and TU12), so as to compensate the pseudo-synchronization relation of higher order payload SPE in terms of the receiving and transmitting rate. The tributary unit processor de-multiplexes the STM -1 signals received and reinserts the de-multiplexed low order tributary signals (TU3 and TU12) into the new STM -1 frame for output. There is no AU pointer adjustment in the output STM -1 frame, thus the locations of the tributary signals are completely fixed to the frame head, as so to perform cross connection processing for the tributary signals. • Assistant unit Assistant unit performs three main functions. The first function is to select DCC channel and OW channel. OT1M1 module provides three DCC channels and two OW channels for selection. D1-D3 bytes, D4-D12

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bytes and F2 byte are used to transmit DCC signal, and E1 byte and F3 byte are used to transmit OW signals. The second function is to extract tributary unit AIS alarm. A series of registers are available in AIS extraction unit, and each of them corresponds to one tributary unit of the STM -1 frame. When the TU -AIS indicating signal received from the tributary unit payload processor generates an alarm in some tributary unit, the location of the corresponding register is set at “1”; if the alarm disappears, it is cleared. The third function is to provide ALS capability. If the fibre break happens, the optical interface unit will detect the consecutive loss of signal and report to assistant unit. Then assistant unit activates the control signal to optical interface unit to shut down the laser. When the cable has been repaired, either an automatic or a manual action can restart the laser and restore correct transmission. For test and monitoring purpose it is possible to switch on the laser manually when the laser is off. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Overheadprocessor

A/D bus

Tributary unitpayload

processor

TELECOM drop bus

TELECOM add bus

A/D bus

Assistant unit(DCC,OWselection,TU-AIS

extractionand ALS)

O/EE/O

OW

E2 byte

F1 byte

DCC

RI unit

A/D bus

low light alarm

Figure 4-29: Functional block diagram of OT1M1 module

4.2.6 OT1M1L11 optical interface module

The structure and functions of OT1M1L11 module are the same as that of OT1M1 module, except for the specifications of the optical interface. The optical interface unit of OT1M1L11 module meets L1.1 standard as stipulated in G.957 of ITU-T recommendations.

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4.2.7 OT1M1L12 optical interface module

The structure and functions of OT1M1L12 module are the same as that of OT1M1 module, except for the indexes of the optical interface. The optical interface unit of OT1M1L12 module meets L1.2 standard as stipulated in G.957 of ITU-T recommendations.

4.2.8 ET1M1 155Mb/s electrical interface module

The structure and functions of ET1M1 module are the same as that of OT1M1 module, except for replacing optical transiver by electrical transiver. The electrical interface unit can deal with STM-1 level electrical singal. The clock and data are recoved in reveive direction, LOS alarm can also be detected. The data is tranismitted after encoding to CMI in transimit direction. The STM-1 electrical interface meet with G.703 of ITU-T recommendations.

4.2.9 OT1B1 155Mb/s optical interface board

Optical tributary board (OT1B1) is one of the service interface boards of 1642EM equipment, and can be inserted into any of the 4 service slots as needed. OT1B1 board and OT1M1 module together provide complete STM-1 optical signal processing function. The main functions of OT1B1 board are the same as that of OT1M1 module. The functional block diagram of OT1B1 board is shown in Figure 4-30 and the main functional units include OT1M1 module interface unit, A/D bus control unit, bus drive unit and power supply unit. Description of the main functional units: • OT1M1 module interface unit OT1M1 module interface unit provides the interface signals between OT1B1 board and OT1M1 module, including power supply signals, data bus and address bus signals, chip selection and read/write signals, SPI bus signals, TELECOM BUS add bus and drop bus signals, clock signals, service signals, DCC path and transparent path. • A/D bus control unit A/D bus control unit consists of one CPLD and its main functions include address decoding, access to the chips on OT1M1 module, simulation of SPI bus and lights, capture board type and alarm collection. • Bus drive unit Bus drive unit inputs and outputs all the signals connected to the terminals on the backboard within OT1B1 board after driving. • Power supply unit Power supply unit mainly provides the hot plugging protection function of OT1B1 board and supplies power to OT1M1 module. The hot plugging protection circuit can support single board hot plugging and single board power supply management. The voltage conversion circuit converts 3.3V system power supply voltage into the operating voltage required by OT1M1 module and supplies to OT1M1 module for use together with 3.3V system power supply.

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Figure 4-30: Functional block diagram of OT1B1 board

4.2.10 ET1B1 155Mb/s electrical interface board

Electrical tributary board (ET1B1) is one of the service interface boards of 1642EM equipment, and can be inserted into any of the 4 service slots as needed. ET1B1 board and ET1M1 module together provide complete STM-1 electrical signal processing function. The main functions of ET1B1 board are the same as that of ET1M1 module.

4.2.11 E3B1 interface board

E3B1 interface board is one of the tributary interface boards of 1642EM equipment, and it can be inserted in any of the 4 service slots as needed. E3B1 interface board provides 1-channel E3 signals of 75 Ohm coaxial cable interface and its main function is to perform the asynchronous mapping of E3 signal and multiplexing to VC4 signals as well as the opposite de-multiplexing and de-mapping process.

OT1M1 module

interface unit

A/D bus control unit

Bus drive unit

Pow

er supply unit

A/D bus TELECOM BUS

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The functional block diagram of E3B1 interface board is shown in Figure 4-31and main functional units include: - Configuration unit; - Line interface unit; - Mapping unit; - A/D bus control unit; - Bus drive unit; - RI data unit - Power supply unit Description of the main functional units: • Configuration unit Because of its compatible design, the board can be flexibly configured into E3 board or DS3 board according to customers’ needs. The configuration unit is two four-digit switches. By setting the position of the switch, for example, setting S101-1 of the board as OFF, and the other is ON, the board is set as the operating mode of E3 interface board. • Line interface unit E3 signals are connected to the board through a 75 ohms coaxial cable and then are inputted /outputted to line interface unit (LIU) through a transformer. In the receiving direction, line interface unit amplifies and equalizes the input signal, tests the LOS alarm, restores the clock and data, decodes the HDB3 code of the line signal and transmits to the mapping unit. In the transmitting direction, line interface unit first codes the mapped signal from the mapping unit according to the format of HDB3 code, then performs pulse reshaping of the coded signal, finally transmits the signal that complies with the standard template to the line. • Mapping unit The mapping unit mainly performs the asynchronous mapping from E3 signal to VC3 and the reverse de-mapping function. The signals from the line interface unit are first mapped into VC3, aligned in TU3 through the pointer, then multiplexed to TUG3 and finally multiplexed to VC4 signals and transmitted to the backboard through TELECOM BUS. Likewise, the VC4 signals from the backboard are de-multiplexed and de-mapped reversibly, and the de-mapped signals are transmitted to the line interface unit. The mapping unit also provides performance counting, alarm test and loop-back function. • A/D bus control unit A/D bus control unit consists of one piece CPLD and mainly performs the functions of address decoding, access to mapping chip, SPI bus simulation, lights, capture board type and alarm collection. • Bus drive unit Bus drive unit inputs/outputs all the signals connected to the backboard terminals in the E3B1 board after driving. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description. • Power supply unit Power supply unit mainly provides the hot plugging function of E3B1 board. The hot plugging protection circuit can support hot plugging of single board and single board power supply management. As the chips on the board require two power supplies, i.e. 3.3V and 5V, two hot plugging protection circuits operate at the same time.

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Figure 4-31: Functional block diagram of E3B1 board

4.2.12DS3B1 interface board

DS3B1 interface board is one of the tributary interface boards of 1642EM equipment, and it can be inserted in any of the 4 service slots as needed. DS3B1 interface board provides 1-channel DS3 signals of 75 Ohm coaxial cable interface and its main function is to perform the asynchronous mapping of DS3 signal and multiplexing to VC4 signals as well as the opposite de-multiplexing and de-mapping process.

Mapping unit

Line interface unit

Output

Input

Configur-ation unit


RI data unit Bus drive unit Power supply unit

Add bus Drop bus A/D bus

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The functional block diagram of DS3B1 board is shown in Figure 4-32. The main functional units include: - Configuration unit - Line interface unit - Mapping unit - A/D bus control unit - Bus drive unit - RI data unit - Power supply unit Description of the main functional units: • Configuration unit Because of its compatible design, the board can be flexibly configured into E3 board or DS3 board according to customers’ needs. The configuration unit is two four-digit switches. By setting the position of the switch, for example, setting S101-4 of the board as OFF and the other is ON, the board is set as the operating mode of DS3 interface board. • Line interface unit DS3 signals are connected to the board through a 75 ohms coaxial cable and then are inputted /outputted to line interface unit (LIU) through a transformer. In the receiving direction, line interface unit amplifies and equalizes the input signal, tests the LOS alarm, restores the clock and data, decodes the B3ZS code of the line signal and transmits to the mapping unit. In the transmitting direction, line interface unit first codes the mapped signal from the mapping unit according to the format of B3ZS code, then performs pulse reshaping of the coded signal, finally transmits the signal that complies with the standard template to the line. • Mapping unit The mapping unit mainly performs the asynchronous mapping from DS3 signal to VC3 and the reverse de-mapping function. The signals from the line interface unit are first mapped into VC3, aligned in TU3 through the pointer, then multiplexed to TUG3 and finally multiplexed to VC4 signals and transmitted to the backboard through TELECOM BUS. Likewise, the VC4 signals from the backboard are de-multiplexed and de-mapped reversibly, and the de-mapped signals are transmitted to the line interface unit. The mapping unit also provides performance counting, alarm test and loop-back function. • A/D bus control unit A/D bus control unit consists of one piece CPLD and mainly performs the functions of address decoding, access to mapping chip, SPI bus simulation, lights, capture board type and alarm collection. • Bus drive unit Bus drive unit inputs/outputs all the signals connected to the backboard terminals in the E3B1 board after driving. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

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• Power supply unit Power supply unit mainly provides the hot plugging function of DS3B1 board. The hot plugging protection circuit can support hot plugging of single board and single board power supply management. As the chips on the board require two power supplies, i.e. 3.3V and 5V, two hot plugging protection circuits operate at the same time.

Figure 4-32: Functional block diagram of DS3B1 board

Mapping unit

Line interface unit

Output

Input

Configur-ation unit


RI data unit Bus drive unit Power supply unit

Add bus Drop bus

A/D bus

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4.2.13 E1RCB8 board

E1RCB8 board is a 2Mbit/s tributary unit interface board of 8-channel 75ohms coaxial interface provided with 1642EM optical transmission system. It can be configured in Slots 2, 3, 4 and 5 of 1642EM optical transmission equipment as needed. The main functions are: 1, providing 8-channel 2M tributary service signal interface to complete the asynchronous mapping from E1 service signal to TU 12; 2, providing 1-channel additional 2M signal interface to transmit DCC network management signals; 3, providing retiming function in the downward direction of the 8-channel 2M tributary service signals; 4, it can extract 2Mbit/s clock as the clock source for the system from 1-channel service signal interface and ECC signal interface. The functional block diagram of E1RCB8 board is shown in Figure 4-33. The main functional modules of E1RCB8 board include: • Line interface unit • Asynchronous mapping unit • Bus interface unit • Retiming unit • Framing unit • MCU control unit • RI data unit Description of main functional units • Line interface unit 8-channel 2.048Mbit/s signals is inputted and outputted through 1.0/2.3 75ohms coaxial connector. The differential interface of the receiving part has very high noise tolerance. It first completes equalized amplification for the data signals arriving at the G.703 physical interface, resumes the clock, tests the LOS alarm and transmits line code HDB3 to the mapping chip after decoding. The transmitting part first completes coding of HDB3 after the signal is de-mapped, shapes the signal according to G.703 standards after the jitter is attenuated, drives the Line and then transmit to the external Lines. • Asynchronous mapping unit Asynchronous mapping unit completes the mapping and de-mapping from 2.048Mbit/s signal to TU -12. The unit adopts add bus and drop bus independent timing mode, uses H4 byte test mode for multi-frame alignment, and it can provide performance counting and provides far-end loop-back and near-end loop-back functions for test and failure locating. • Bus interface unit Bus interface unit mainly provides separation and driving between bus signals of Telecom Bus single board and ensures the integrity and anti-interference capacity of the signals. • Retiming unit Retiming unit provides an 8-channel elastic memory at the downward 2.048Mbit/s signals. The de-mapped signals from the mapping unit are written in the elastic memory at the respective clock frequency and then red out through a high quality common frequency clock provided by the cock module. The jitter and drift generated during the process of de-mapping can be effectively absorbed by the elastic memory. It’s important to note that once the retiming function of 2.048Mbit/s signal is used, every piece of equipment within the whole network must adopt the timing mode, and the 2.048Mbit/s signal as the clock source. • Framing unit Framing unit can insert or take out DCC signals of 192Kbit/s into or from the 2.048Mbit/s frame signals. • MCU control unit MCU control unit provides parallel and serial bus for system CPU access, the chips on the control panel and the download of the FPGA configuration files. • RI unit

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RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-33: Functional block diagram of E1RCB8 board

4.2.14 E1B28 board

E1B28 series 2M tributary unit board is a 2Mbit/s tributary unit interface board provided with 1642EM optical transmission system using Head-Male pin interface. E1B28 is a 28-channel 75ohms interface 2M tributary unit board, DE1B28 is a 28-channel 120ohms interface 2M tributary unit board, E1B8 is a 8-channel 75ohms interface 2M tributary unit board and DE1B8 is a 8-channel 120ohms interface 2M tributary unit board. In addition, in some applications with better condition, the expensive lightening prevention devices can be removed for several types of 2M tributary unit boards with low cost and meeting the specifications. They are SE1B28, SDE1B28, SE1B8, SDE1B8 and DE1B32. These boards have similar structures and can be configured in Slots 2, 3, 4 and 5 of 1642EM optical transmission equipment as needed. Its main functions are to provide 8-channel 2M tributary service interfaces for the system and complete the asynchronous mapping from E1 service signals to TU12. The functional block diagram of E1B28 board is shown in Figure 3-34 and its main functional modules include: • Line interface unit • Asynchronous mapping unit • Bus interface unit • MCU control unit • RI data unit Description of the main functional units: • Line interface unit The 2.048Mbit/s signals is inputted and outputted through Head-male pin connector. Different resistance networks are used to realize the impedance matching of the interface depending on different applications of 75 ohms and 120 ohms. The differential interface of the receiving part has very high noise tolerance. It first completes equalized amplification for the data signals arriving at the G.703 physical interface, recover the clock, tests the LOS alarm and transmits line code HDB3 to the mapping chip after decoding. The transmitting part first completes coding of HDB3 after the signal is de-mapped, shapes the signal according

OW service

2M clock source extraction clock input extraction

E1 framing unit

Retiming unit

Control unit

RI unit

Bus interface unit

Mapping unit

Circuit interface unit

Coupling transformer

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to G.703 standards after the jitter is attenuated, drives the Line and then transmit to the external Lines. E1B28 has four Line interface units, each of which can process 8 channels 2.048Mbit/s signals. • Asynchronous mapping unit Asynchronous mapping unit completes the mapping and de-mapping from 2.048Mbit/s signal to TU -12. The unit adopts add bus and drop bus independent timing mode, uses H4 byte test mode for multi-frame alignment, and it can provide performance counting and provides far-end loop-back and near-end loop-back functions for test and failure locating. • Bus interface unit Bus interface unit mainly provides separation and driving between bus signals of Telecom Bus single board and ensures the integrity and anti-interference capacity of the signals. • MCU control unit MCU control unit provides parallel and serial bus for system CPU access, the chips on the control panel and the download of the FPGA configuration files. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-34: Functional block diagram of E1R28 board

4.2.15 DE1B28 board

DE1B28 board is an E1 service interface board of 28-channel 120ohms impedance matching and its unit structure is the same as that of E1B28. The only difference is that the interface part uses 120ohms impedance matching resistance.

4.2.16 E1B8 board

E1B8 board is an E1 service interface board of 8-channel 75ohms impedance matching and its unit structure is the same as that of E1B28, but it only provides a group (i.e. 8-channel E1) of Line interface unit.

Bus interface unit

Mapping unit

Circuit interface

unit

Coupling transformer

Control unit RI unit

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4.2.17 DE1B8 board

DE1B8 board is an E1 service interface board of 8-channel 120ohms impedance matching and its unit structure is the same as that of DE1B28. The board only provides a group (i.e. 8-channel E1) of Line interface unit.

4.2.18 SE1B28 board

SE1B28 board is an E1 service interface board of 28-channel 75ohms impedance matching and its unit structure is the same as that of E1B28. However, the expensive lightening prevention device has been removed and it is an E1 service interface board with low cost while still meeting the specifications.

4.2.19 SE1B8 board

SE1B8 board is an E1 service interface board of 8-channel 75ohms impedance matching and its unit structure is the same as that of E1B28. However, the expensive device of lightening strike prevention has been removed and it is an E1 service interface board with low cost while still meeting the specifications.

4.2.20 SDE1B28 board

SDE1B28 board is an E1 service interface board of 28-channel 120 ohms impedance matching and its unit structure is the same as that of DE1B28. However, the expensive device of lightening strike prevention has been removed and it is an E1 service interface board with low cost while still meeting the specifications.

4.2.21 SDE1B8 board


4.2.22DE1B32 board


4.2.23 FEB6 Ethernet interface board ( 6 port )

FEB6 board is one of the service interface boards of 1642EM equipment. It can directly provide the access and transparent transmission functions for Ethernet on SDH system. FEB6 board can be inserted in Slots 2, 3, 4 and 5 as required by the customer. Main functions: • Provides six 10M/100M auto-negotiation local Ethernet customer interface • Provides one Ethernet transparent transmission path over SDH system.

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• Support LAPS protocol • The bandwidth of the Ethernet transmission path can be configured flexibly: 1-5VC12 or 1-3VC3. • Supports virtual connection technology. The tolerance of maximum relative delay difference of 5-

channel VC12 is 182us and that of 2-channel VC3 is 21us. • Supports the Ethernet point-to-point and ring network applications. Operating principle: The functional block diagram of FEB6 is shown in Figure 4-35. The Ethernet customer signals can be accessed through the 6 RJ45 connectors on the panel and the physical layer processing and the second layer processing of the Ethernet signals are completed through the Ethernet switch and interface unit. The Ethernet signals that are required to transmit through SDH system are connected with EOS (Ethernet Over SDH) mapping unit using MII interface. EOS mapping unit maps the Ethernet signals to the payload of SDH using LAPS protocol, connects the signals to VC4 bus timing adjustment unit through 19M VC4 Telecom bus for timing adjustment, and finally connects to the 19M VC4 telecom bus on the back board of the system through the bus drive unit. Description of the main functional units: • Ethernet switch and interface unit Ethernet switch and interface unit mainly consists of the 6-port RJ45 connectors the integrated Ethernet status indicating lamp, Ethernet transformer and Ethernet switch chips. The Ethernet interface and the terminal equipment adaptively coordinated to the optimal operating mode (support 10M or 100M rate, full duplex or half-duplex mode), and the LED on the panel can indicate the link and rate status of each port. The Ethernet switch chip can support 7-port 100M non-block switch. • EOS mapping unit EOS mapping unit is the central unit of FEB6 board. It uses LAPS protocol to complete the mapping and de-mapping between Ethernet signals and SDH payload. The bandwidth of EOS mapping can be flexibly configured into 1-5 VC12 or 1-3 VC3 and can operate in point-to-point or ring network mode. It uses 16M large-capacity SDRAM as the buffer for the Ethernet frame. The 100M full duplex interface on the Ethernet side uses MII interface while it uses 19M standard Telecom bus interface on the SDH side. • VC4 bus timing adjustment unit As difference exists in terms of timing between the SDH Telecom bus interface of the EOS mapping system and the system bus interface, VC4 bus timing adjustment unit adjusts the timing to make it matched with the interface. • Bus drive unit All the signals connected through the backboard are inputted and outputted after being driven by the bus drive unit. • Management control unit Management control unit provides the conversion of all the management interfaces of FEB6 board to achieve the configuration of Ethernet operating mode and the transmission bandwidth, SDH interface alarm collection and Ethernet status monitor, etc. • Power supply unit Power supply unit mainly provides the hot plugging protection of the power supply and DC voltage transforming. The hot plugging protection part can support the hot plugging of FEB6 and the management of power supply system. The DC voltage transformer converts the 3.3V system operating voltage to the operating voltage of 2.5V and 2.0V boards. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

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Figure 4-35: Functional block diagram of FEB6 board


The 8 Port Enhanced Fast Ethernet Board (ISA-ES1 8FE) is one of the service boards in 1642EM -- the compact STM-1 ADM equipment. It’s designed in order to support the Ethernet access, switch and transmission over the SDH system directly. Figure 4-36 shows the constitution of ISA-ES1 8FE board:

8 port10/100

PHYMAC

L2processing

8channels

GFPLAPS

encapsulation

LO/HOVirtual

ConcatenationLCAS

TelecomBusEth./FE

? MAC based forwarding and autolearning? VLAN based forwarding? 802.1Q VLAN add/remove/swap? stacked VLAN (802.1Q format) add/remove/swap? Multicast/Broadcast? 802.1Q Priority bits management for queuing, WFQ scheduling? policing? bandwidth allocation

? VC12-xv (x = 1 to 63)? VC3-xv (x = 1 to 3)? Differential delay compensation = 64ms? 802.3x flow control

? No jumbo frame requirement

? No framing, (HO)LO path termination

? 8b/19MHz for directconnection to backpanel

8 port10/100

PHYMAC

L2processing

8channels

GFPLAPS

encapsulation

LO/HOVirtual

ConcatenationLCAS

TelecomBusEth./FE

? MAC based forwarding and autolearning? VLAN based forwarding? 802.1Q VLAN add/remove/swap? stacked VLAN (802.1Q format) add/remove/swap? Multicast/Broadcast? 802.1Q Priority bits management for queuing, WFQ scheduling? policing? bandwidth allocation

? VC12-xv (x = 1 to 63)? VC3-xv (x = 1 to 3)? Differential delay compensation = 64ms? 802.3x flow control

? No jumbo frame requirement

? No framing, (HO)LO path termination

? 8b/19MHz for directconnection to backpanel

Figure 4-36: The constitution of ISA-ES1 8FE board

Ethernet switch

and interface

unit

mapping unit

VC4 bus timing

adjustment unit

service bus

Ethernet interface

12C bus Data bus Address bus

Bus drive unit

Front plate

Management and control unit (“Serber”)

control bus

System back board

Power supply unit

Remote inventory

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Main Features: l Supports up to eight 10/100Mbit/s Ethernet Port local l Supports up to eight channels of Ethernet over SDH (ISA-ES1 8FE) l Supports multi ISA-ES1 8FE protocol: GFP/LAPS/LAPF/PPP l Supports programmable bandwidth: 1~63 VC12 or 1~3 VC3 l Support Virtual Concatenation for SONET/SDH, compensating for up to 48 ms of differential delay l Support Link Capacity Adjustment Scheme (LCAS) to allow the size of the virtual concatenation groups

to be changed dynamically with hitless switching. l MAC based forwarding and autolearning l VLAN based forwarding l 802.1Q VLAN add/remove/swap l Stacked VLAN (802.1Q format) add/remove/swap l Multicast/Broadcast l 802.3x flow control l 802.1Q Priority bits management for queuing, WFQ scheduling l Policing and bandwidth allocation l Supports Q3 and SNMP Management Operating principle: The hardware architecture of ISA-ES1 8FE is shown as Figure 4-37. There are two main kind of streams: Service data and Management data. One is the Ethernet service data flow indicated with blue-dot -dash-line. The Ethernet data access to RJ45 connector on panel, into 8*FE PHY & interface, connect to Ethernet switch (PLB2800E) by SSMII interface, then connect with EOS mapping (TXC04236) use SMII interface for Ethernet signal en/decapsulating with GFP/LAPS protocol and mapping into SDH payload use virtual concatenation with LCAS, final use 19M Telecom Add/Drop Bus connect with system bus via the back plane driver. The other is the management data flow composed by PQ2 control flow shown in red-dot-line and PQecsc comtrol flow shown in green-dash-line, Coresponding to the SNMP and Q3 management domain. It is sepcial for TXC04236 that be managed both by PQ2 and PQecsc at same time through MARBITER, which work as a motorola bus arbiter. Description of the main functional units: • Ethernet switch and interface unit Ethernet switch and interface unit mainly consists of the 8-port RJ45 connectors the integrated Ethernet status indicating lamp and Ethernet transformer, Ethernet PHY and Ethernet switch chips. The Ethernet interface and the terminal equipment adaptively coordinated to the optimal operating mode (support 10M or 100M rate, full duplex or half-duplex mode), and the LED on the panel can indicate the link and rate status of each port. The Ethernet switch chip can support 16-port 100M non-block switch. • EOS mapping unit EOS mapping unit implement the Ethernet frame to be encapsulate and dencapsulate using GFP/LAPS/ LAPF/PPP protocol and the encapsulated frame to be mapping to or demapping from the SDH payload. In general, it provides functionality for mapping and demapping of Ethernet frames to and from SDH virtual concatenated tributary structures. The EOS mapping unit provide complete high and low order path overhead generation and processing for the SDH containers. On the SDH side, the EtherMap-3 provides an STM-1 structure using a single Telecom bus operating at 19.44 MHz. On the Ethernet line side, the EtherMap-3 provides up to eight 10/100 Mbit/s Ethernet ports, each support the industry standard SMII interface. The bandwidth of SDH containers using virtual concatenation, are allowed to increase or decrease in a hitless fashion through the use of an integrated link capacity adjustment scheme (LCAS). • Network management block ISA-ES1 8FE board is managed by SC/EC use Q3 and SNMP model respectively. In OND SW and management architecture, the Q3/SNMP boundary is between Virtual Concatenation and GFP, so the Mapper— TXC04226 has to be managed via SNMP for L2 (GFP/LAPS) termination, and Q3 for SDH termination and Virtual concatenation, at the same time. For Q3 Management: Mapper configured by EC/SC via 16bit Data/Addr bus arbiter in Eserber, Purple minimal managed by EC/SC via IIC bus (only for debug). For SNMP Management: Purple configured by PQ2 via PCI AD bus, Mapper configured by PQ2 via Motorola 16bit Data/Addr bus arbiter in ESerber It use DCC instead of ISSB for code download and update, and Use DCC as SNMP channel, and only Slot2 and Slot3 is available for DCC channel without mainboard update

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Frontplane

DCC

Backplane

8*FE PHY& Interface(88E3083)

10/100M

EOSmapping

(TXC-04236)10/100M

10/100M

Back-palneBUS

Driver

8*SSMII

19.44MTelecom

BUS

RI

8*SMII

POWERSupply

A/D ControlBUS

VC4

IIC

EthernetSwitch

(PLB2800)

SDRAMCLOCKBlock

PQ2 ModuleMarbiter

16b AD BUS

SPI BUS

Others

Debuginterface(RS232)

+3.3V

AD BUS

16b ADBUS

Arbiter

PCI toMOTO

ESERBER

PCI BUS

RI SPI

QECC

SPI BUS

Figure 4-37: Functional block diagram of ISA-ES1 8FE board


ISA-ES1 3FE is similar with ISA-ES1 8FE board on principle and implementation, but only provide three Ethernet access ports local, one is 100Mbit/s SFP optical port and two others are 10/100M electronic ports. Main Features: l Supports one 100Mbit/s full duplex SFP optical Port l Supports two 10/100Mbit/s Ethernet electronic Port l Supports two channels of Ethernet over SDH (ISA-ES1 3FE) l Supports multi EOS protocol: GFP/LAPS /PPP l Supports programmable bandwidth: 1~63 VC12 or 1~3 VC3 l Support Virtual Concatenation for SONET/SDH, compensating for up to 48 ms of differential delay l Support Link Capacity Adjustment Scheme (LCAS) to allow the size of the virtual concatenation groups

to be changed dynamically with hitless switching. l MAC based forwarding and autolearning l VLAN based forwarding l 802.1Q VLAN add/remove/swap l Stacked VLAN (802.1Q format) add/remove/swap l Multicast/Broadcast l 802.3x flow control l 802.1Q Priority bits management for queuing, WFQ scheduling l Policing and bandwidth allocation l Supports Q3 and SNMP Management

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Operating principle: The hardware architecture of ISA-ES1 3FE is shown as Figure 4-38. Same with ISA-ES1 8FE. Description of the main functional units: • Ethernet switch and interface unit Ethernet switch and interface unit mainly consists of 2-port RJ45 connectors the integrated Ethernet status indicating lamp and Ethernet transformer, SFP optical module, Ethernet PHY and Ethernet switch chips. The Ethernet interface and the terminal equipment adaptively coordinated to the optimal operating mode (support 10M or 100M rate, full duplex or half-duplex mode), and the LED on the panel can indicate the link and rate status of each port. The Ethernet switch chip can support 5-port 100M non-block switch. • EOS mapping unit Same with ISA-ES1 8FE but only provide 2 Ethernet over SDH (EOS) channels. • Network management block Same with ISA-ES1 8FE.

Frontplane

DCC

Backplane

8*FE PHY& Interface(88E3083)

100MEOS

mapping(TXC-04236)10/100M

10/100M

Back-palneBUS

Driver

2*SSMII

19.44MTelecom

BUS

RI

2*SMII

POWERSupply

A/D ControlBUS

VC4

IIC

EthernetSwitch

(PLB2800)

SDRAMCLOCKBlock

PQ2 ModuleMarbiter

16b AD BUS

SPI BUS

Others

Debuginterface(RS232)

+3.3V

AD BUS

16b ADBUS

Arbiter

PCI toMOTO

ESERBER

PCI BUS

RI SPI

QECC

SPI BUS

SFPmodule

100M-FX

Figure 4-38: Functional block diagram of ISA-ES1 3FE board

4.2.26 DC48B power supply interface board

DC48B in 1642EM equipment is to provide -24V/-48V power supply for the whole system, perform EMI filtering for the inputted -24V/-48V power supply, and has over-voltage and counter-voltage protection function. The board is inserted and fixed in the No.7 slot of the frame.

ED 01


Main functions: • It provides over-voltage protection function, including continual over-voltage and transient over-voltage. • It provides counter-voltage protection function, avoiding damage to the system caused by backward

power supply. • EMI filter improves the signal quality of the power supply. • It is able to determine and report the availability of -24V/48V input power supply. • The intrinsic data about the board can be obtained through the network management system. Basic operating principle: The functional block diagram of DC48B power supply interface board is shown in Figure 4-39. The -24V/-48V power supply signal is accessed through the D interface on the front plate and is transmitted into EMI filter after being processed by over-voltage protection module and the counter-voltage protection module. The -24V/-48V power supply signal is transmitted to PSF (power supply panel) through the connector after being processed by EMI filter. Description of the main functional units: • Over-voltage protection module The over-voltage protection of the board includes two parts. One is the protection of continual over-voltage, achieving the protection of the subsequent circuits by short circuit. The other is the protection of transient over-voltage, such as lightening strike, achieving the protection through voltage stabilization. • Counter-voltage protection module The function of counter-voltage protection is the protective measures taken by DC48B in case of reversed connection of the input voltage to avoid equipment damage. In this case, DC48B achieves counter-voltage protection through a diode. • EMI filtering module EMI filter aims to filer the interference signals and noise signals from the power supply signal to ensure the quality of the power supply signal. • Power supply identification module The main function of the module is to identify if there is a -24V/-48V power input in DC48B board and if the -24V/48V power supply signal still exists after over-voltage protection, counter-voltage protection and EMI filtering, and report this information to the main board. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-39: Functional block diagram of DC48B power supply interface board

Counter-voltage protection

module

Over-voltage protection

EMI filtering module

Power supply identification

module

RI module

-48V/-24V INPUT

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4.2.27 AC220B power supply interface board

The functions of AC220B in 1642EM equipment are to provide -48 VDC power supply for the whole system in case of AC power supply; the input part contains the EMI filtering element and the power supply can meet the EMC requirement.It has the PFC fuction of correct input current. It also has the protection function of input under-voltage and output over-current. When applied, the board should be inserted and fixed in No.6 slot of the frame. Main functions: • It provides protection function for input under-voltage and when the input voltage is drop than the set

value, instantaneous shut down is actuated. • It provides the protection function for output over-current. When the output current is greater than the

set value, instantaneous shut down is actuated to avoid the damage to power supply and the whole system.

• EMI filter is used to improve the signal quality of power supply. • It provides PFC function for correct the input current, and the input current harmonic distortion will not

exceed the EN61000-3-2 standard’s limit. Operating principle: The functional block diagram of AC220B AC power supply interface board is shown in Figure 4-40. AC220B power supply is connected through the power supply socket on the front plate. After being processed by EMI filter and primary rectification and filtering, and being processed by the voltage transforming module and secondary rectification and filtering module, the output -48V power supply signal is transmitted into PBP48 (power supply panel) board through the connector. Description of the main functional units: • EMI filtering and rectifier module EMI filter aims to control the interference signal and noise signal in the power supply signal to ensure the quality of the output power supply signal and reduce the electromagnetic interference to the power supply network and the equipment. Primary rectifier rectifies the AC current of the power supply network to DC current • Active PFC circuit module Active PFC circuit module correct the input current, and make the input current harmonic distortion not exceed the EN61000-3-2 standard’s limit. • Voltage transforming module The function of voltage transforming module is to change the high voltage DC current from the primary rectification and filtering module into low voltage AC current and it also has the function of primary and secondary separation. • Secondary rectification and filtering module The main function of the module is to rectify the low voltage AC current from the voltage- transforming module into -48V DC current and filter it smoothly. • Feedback module The module monitors the output voltage and provides the voltage transforming module with feedback signals to improve the stability and the accuracy of the output -48V voltage.

ED 01


Figure 4-40: Functional block diagram of SPA80PFC AC power supply interface board

4.2.28 PBP48 power supply panel

Under –48V power system,the single board in 1642EM equipment provides the whole system with 3.3V and 5V power supply and is located on the front of the equipment. Boards connected with it are DC48B, FB and BACKPLANE. Main functions: • Converts from -48V power supply to 3.3V power supply. • Converts from -48V power supply to 5V power supply. • -48V input power backup. • Alarm indicating function of the equipment. • The intrinsic data of the board can be obtained through the network management system. Basic operating principle: The functional block diagram is shown in Figure 4-41. The -48V power supply signal processed by DC48B board is transmitted into PBP48 board through a connector and outputs 3.3V and 5V after being converted by two power supply modules and supplies 3.3V and 5V power supply through the backboard for the whole system. Description of the main functional units: • -48V to 3.3V power supply conversion module The function of the module is to convert the input -48V voltage into 3.3V voltage output needed for system operation. In order to improve the 3.3V power supply signal after the voltage conversion, the module provides input /output filtering function. • -48V to 5V power supply conversion module The function of the module is to convert the input -48V voltage into 5V voltage output needed for system operation. In order to improve the 5V power supply signal after the voltage conversion, the module provides input /output filtering function. • -48V input power backup In order to ensure the stability of the system operation, PBP48 board provides 1+1 backup for the input power backup, i.e. to provide two -48V power line dc/dc converter to avoid that if one -48V power line fails, the board is unable to supply power to the system, resulting in system failure. • Alarm indication of the system

EMI filtering and rectifier

module

Feedback module

Active PFC circuit module

Voltage transforming

module

Secondary rectification and filtering

module

AC220 INPUT

-48VDC OUTPUT

ED 01


The LEDs in three colors on the board are used to indicate the different operating conditions of the equipment and they indicate normal, common alarm and serious alarm respectively and report to the network management at the same time. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-41: Functional block diagram of PBP48 power supply panel

4.2.29 PBP24 power supply panel

Under –24V power system,the single board in 1642EM equipment provides the whole system with 3.3V and 5V power supply and is located on the front of the equipment. Boards connected with it are DC48B, FB and BACKPLANE. Main functions: • Converts from -24V power supply to 3.3V power supply. • Converts from -24V power supply to 5V power supply. • -48V input power backup. • Alarm indicating function of the equipment. • The intrinsic data of the board can be obtained through the network management system. Basic operating principle: The functional block diagram is shown in Figure 4-42. The -24V power supply signal processed by DC24B board is transmitted into PBP24 board through a connector and outputs 3.3V and 5V after being converted by two power supply modules and supplies 3.3V and 5V power supply through the backboard for the whole system. Description of the main functional units: • -24V to 3.3V power supply conversion module The function of the module is to convert the input -24V voltage into 3.3V voltage output needed for system operation. In order to improve the 3.3V power supply signal after the voltage conversion, the module provides input /output filtering function. • -24V to 5V power supply conversion module The function of the module is to convert the input -24V voltage into 5V voltage output needed for system operation. In order to improve the 5V power supply signal after the voltage conversion, the module provides input /output filtering function. • -24V input power backup In order to ensure the stability of the system operation, PBP24 board provides 1+1 backup for the input power backup, i.e. to provide two -24V power line dc/dc converter to avoid that if one -24V power line fails, the board is unable to supply power to the system, resulting in system failure.

-48V---3.3V -48V---5V

Alarm indication

RI module

DC48B

FB

5V

3.3V

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• Alarm indication of the system The LEDs in three colors on the board are used to indicate the different operating conditions of the equipment and they indicate normal, common alarm and serious alarm respectively and report to the network management at the same time. • RI unit RI unit contains an EEPROM, which records some basic information about this board, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-42: Functional block diagram of PBP24 power supply panel

4.2.30 FB fan board

The functions of the FB in 1642EM equipment involve two aspects; one is to install three fans on the board to improve the operating temperature environment of the equipment. The other is to provide a backup -24V/48V power supply interface for 1642EM equipment. It also perform EMI filtering for the inputted -24V/48V power supply, and has over-voltage and counter-voltage protection function. The board is inserted and fixed in No.6 slot of the rack. , Main functions: • Fans are used to achieve the air ventilation within the equipment. • Provides over-voltage protection function, including continual over-voltage and transient over-voltage. • Provides counter-voltage protection function to avoid damage to the system caused by backward power

supply. • EMI filter improves the signal quality of the power supply. • It can determine and report the availability of the -24V/-48V power supply. • The intrinsic data of the board can be obtained through the network management. Operating principle: The functional block diagram of FB fan board is shown in Figure 4-43. The -24V/-48V power supply signal is accessed through the D interface on the front plate and is transmitted into EMI filter after being processed by over-voltage protection module and the counter-voltage protection module. The -24V/-48V power supply signal is transmitted to PSF (power supply panel) through the connector after being processed by EMI filter and the 3.3V power supply provided by PSF drives the fans to operate at the same time. Description of the main functional units:

-24V---3.3V -24V---5V

Alarm indication

RI module

DC24B

FB

5V

3.3V

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• Fan unit Three fans are provided on the board and their voltage is 3.3V. The network managment can monitor the work status of three fans on the FB board. • Over-voltage protection module The over-voltage protection of the board includes two parts. One is the protection of continual over-voltage, to protect the subsequent circuits through short circuit. The other is the protection of transient over-voltage, such as lightning stroke, to protect through voltage stabilization. • Counter-voltage protection module The function of counter-voltage protection is the protective measure taken by FB in case of reverse connection of input voltage to avoid equipment damage. In this case, FB achieves counter-voltage protection through a diode. • EMI filtering module EMI filter aims to filer the interference signals and noise signals from the power supply signal to ensure the quality of the power supply signal. • Power supply identification module The main function of the module is to identify if there is a -24V/-48V power input in FB board and if the -24V/-48V power supply signal still exists after over-voltage protection and counter-voltage protection, and report the information to the main board. • RI data unit RI data unit contains an EEPROM, which records some basic information about the single boards, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-43: : Functional block diagram of FB fan board

4.2.31 SFB fan board

Three fans are installed on this board. The function of SFB in 1642EM equipment is to improve the operating temperature environment of the equipment. The single board is inserted and fixed in No.6 slot of the frame.

Counter-voltage

protection module

Over-voltage

protection module

Fan

Power supply judge module

RI module

-48V/-24V INPUT

-48V/-24V OUTPUT

PSF

BACKPLANE

BACKPLANE

BACKPLANE

EMI Filter

module

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Main functions: • Uses fans to achieve the air ventilation within the equipment. • The intrinsic data of the board can be obtained through the network management. Basic operating principle: The functional block diagram of SFB fan board is shown in Figure 4-44. The 3.3V power supplied from PSF board drives the fans to operate, makes the air ventilate in the equipment and improves the operating temperature of the equipment. Description of the main functional units: • Fan unit Three fans are provided on the board and their voltage is 3.3V. The network managment can monitor the work status of three fans on the FB board. • RI data unit RI data unit contains an EEPROM, which records some basic information about the single boards, such as versions of hardware and software, EPGA, and CPLD version information. See Section 4.1.11 for detailed description.

Figure 4-44: Functional block diagram of SFB fan board.

4.2.32 Backboard

The backboard performs the function of signal connection and assignment of the main board and service board, and connecting the power supply of the front plate to the main board and service boards. In order to reduce the cross talk of circuits as to ensure the quality of the signals, the connection and assignment of main board slots and service board slots are shown in Figure 4-45:

Fan

RI module

PSF BACKPLANE

BACKPLANE

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Figure 4-45: Connection layout of the backboard

pin1

MS1

MS2

MS3

MS4

pin1

pin1

pin1

pin1

SS1

pin1

SS3

pin1

SS2

pin1

SS4

signa

l flo

w

sign

alflo

w

sign

alflo

w

sign

al fl

ow

MS2

MS3

MS4

pin1

pin1

pin1

BAC

K BO

ARD

BAC

K VI

EW

MA

IN B

OA

RDTO

P VI

EW

pin1

MS1

pin1

pin1

pin1

pin1

ABCDE1

35

79

11

1315

171

92

12

325

13

57

911

13

1517

1921

23

25

EDCBA

PSFS

FAC

EPLA

TEBA

CK

VIEW

FPS

FPS

13

57

911

1315

171

9

D C B A13

57

911

13

15

171

9

D C B A

1 3 5 7 9 11

13 15

CB

A1 3 5 7 9 11

13 15

CB

A

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5 Technical specifications

5.1 General specifications

• General specifications Optical interface 155.52Mbit/s (optical or electrical interface) Electric tributary bite rate 2048kbit/s

34368kbit/s 44736kbit/s Ethernet 10Base-T, 100 Base-T

Optical fiber type Single-mode ITU-Rec.652, G.653, G.654;

Span length Depending on optical fiber type and optical power. Application types Terminal multiplexer, ADM, small DXC, networks with

or without protection: link, ring and mesh.

• Applied standard (ITU-T) Electric interface G.703, V.11, RS -232 EOW interface G.711, G.713, Q.23 SDH frame, multi-frame structure G.707 Equipment function G.782 G.783, G.784 Optical interface G.957, G.958 Optical fiber G.652, G.653, G.654 Transmission quality G.784, G.821, G.826 System management function (software)

X.733, X.734, X.736, G.704, G.774

Jitter and wander G.783, G.823, G.825 Synchronization G.811, G.813 Network protection G.841, G.842 Optical amplification G.662, G.663, G.823, G.825

• Applied standard( CE ) EMC/EMI ETSI EN300386 Environment ETSI EN300019 Safety IEC 60950

• Add-drop services and cross connection capacity Cross connection capacity 378X378 TU12 Cross connection function Tributary-to-tributary time slot assignment

Loopback Broadcasting Drop or through Sub-network connection protection.

Transmission delay 125us

• Protection Network protection Sub-network connection protection at VC12 level

(SNCP/I)

• Management interface Local interface F interface DB -9 RS-232, 38kbit/s. Remote interface F interface DB -9 RS-232, 38kbit/s or DCC path through optical

transmission (D4-D12 or D1-D3) Management mode Remote communication management network (TMN) Qecc,

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through DCC byte. Protocol stack /massage model

Refer to ITU-TG.774 and ETSI, ISO-OSI7 layer reference model.

• Operations processes Configuration Equipment, port, add-drop paths, cross connection,

synchronization, protection, MCF, SEMF and overhead connection can be completed locally or remotely.

Software download Local or remote file download can be performed without interrupting the services but when download is completed and the program is refreshed, a short time service interruption may occur.

Performance monitoring Refer to G.784, G.826 and G.821. Unit and equipment acknowledgement (Remote Inventory)

The following data can be obtained through RI: company ID, unit type, unit number, unit serial number, etc. See the operation handbook for details.

Security Password, operation files, Backup of data and programs. • Sub-functions of the units Service board No effect on other service Main board Traffic interruption Optical or electric module Traffic interruption • Remote alarm and output housekeeping signals The maximum guarantees current in the closed condition 50mA The maximum allowed voltage with open condition -70V Voltage drop towards ground in the closed condition 0V—-2V • Input housekeeping signals The maximum guarantees current in the closed condition 3mA The maximum allowed voltage with open condition -70V Voltage drop towards ground in the closed condition 0V—-2V • Clock characteristics Selectable input reference timing

Extracts 2048kbit/s from 2Mbit/s; extracts from STM-1 port.

Nr. of selected reference clocks (normal mode)

Up to 7

Synchronization output 2048 Kbit/s G. 703 (75Ohm impedance) Operational modes Locked reference source

Free-run mode ±4.6 ppm Holding mode, drift 0.37 ppm/day

Synchronization selection Priority and SSM algorithm.

5.1.1 Optical safety

Refer to Table 5-1 below for the hazard level classification of different optical interfaces.

Table 5-1: hazard level classification of optical interfaces

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Port/unit Optical interface type Hazard level STM-1 S-1.1 1 STM-1 L-1.1 3A

STM-1 L-1.2 3A STM-1 L-1.2JE1 3A

• Installation location It is recommended to install equipment in a “position strictly complying with environment requirements” or a “controlled location”. Incorporated laser sources characteristics Output optical interface parameters: the wavelength and the maximum optical power at the output connector incorporated laser sources are given in the table. • Labeling The labels reproduced below are affixed during factory settings, except those placed in a plastic bag and provided with the module. The customer should affix the label on the fiber protection cover of the optical module.

The optical interfaces which have HAZARD LEVEL 3A carry the following hazard symbol label:

The CLASS 3A level is affixed on the front plate of the following optical interfaces:

Ø L-1.1 (STM-1 port) Ø L-1.2 (STM-1 port) Ø L-1.2JE1 (STM-1 port)

The optical interfaces which have HAZARD LEVEL 3A and operate at 2nd window carry the following explanatory label:

The label is put on the fiber protection cover of STM -1 port of L-1.1. The optical interfaces which have HAZARD LEVEL 3A and operate at the 3rd window carry the following explanatory label:

The label is put on the fiber protection covers of the following ports:

Ø STM-1 port of L1.2 Ø STM-1 port of L1.2JE1

The multi-language label kit is placed in the same plastic bag provided together with the optical interface, where the mentioned above explanatory labels are put.

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• fiber connectors The locations of fiber connectors are reported on topographical drawings of units’ front views and optical interface front views.

• Engineering design features In normal operating conditions, unless intentional manumission, the laser radiation is never accessible. The laser beam should be launched in optical fiber through an appropriate connector that totally shuts up the laser radiation. Moreover, a plastic cover is fitted upon optical connectors by means of screws. ALS time must not exceed the maximum value as stipulated in G.958.

• Safety instructions The safety instructions for proper assembly, maintenance and safe use including of clear warnings concerning precautions to avoid possible exposure to hazardous laser radiation.

5.1.2 Electric safety

Connect with TNV (telecommunication network voltage): remote alarm, housekeeping and power supply

Safety state of the connection with other equipment

All other connected SELV (safe extra low voltage) • Labeling Labels described in Section 3.2.3.1 are affixed during factory settings. • Safety instructions The safety instructions for proper assembly, maintenance and safe use including of clear warnings concerning precautions to avoid possible exposure to hazardous voltage.

5.2 Main specifications of optical interfaces

Three types of interface types are available for STM-1 optical interfaces of 1642EM equipment: S1.1, L1.1 and L1.2. The type of the fiber connector is SC/PC. See Table 5-2 for the main specifications of optical interfaces. The interface types be available for 100Base-FX SFP optical interfaces of ISA-ES1 3FE are same with STM-1. but the type of the fiber connector is LC.

Table 5-2: STM-1 optical interface parameters Unit Value Nominal bit rate kbit/s STM-1 155 520 (ITU-T G.707) Application code S-1.1 L-1.1 L-1.2 Operating wavelength Range nm 1261-1360 1263-1360 1480-1580 Transmitter reference point S Source type MLM MLM MLM Spectrum characteristics : - Maximum RMS (σ) spectrum width nm 7.7 3 - - Maximum -20 dB spectrum width nm - - 1 - Minimum side form suppression ratio dB - - 30 Mean launch power - Maximum dBm -8 0 0 - Minimum dBm -15 -5 -5 Minimum extinction ratio dB 8.2 10 10 Optical path between S and R Attenuation range dB 0-12 10-28 10-28 Maximum dispersion ps/nm 96 246 NA Minimum return loss of the optical cable at point S (including any active connector)

dB NA NA 20

Maximum discrete reflection coefficient between SR points dB NA NA -25

Receiver at reference point R Minimum sensitivity dBm -28 -34 -34 Minimum overload dBm -8 -10 -10 Maximum optical path penalty dB 1 1 1 Maximum reflection measured at point R dB NA NA -25 Note: NA indicates not available.

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5.3 Main specifications of electric interfaces

5.3.1 Characteristics of 2.048Mbit/s electric interface

Interface type ITU-T G.703 standard electric interface Bit rate 2.048Mbit/s ±50ppm Code HDB3 Signal magnitude 3Vp (120 ohms balanced)

2.37 Vp (75 ohms unbalanced)

Attenuation accepted on the incoming signal

The attenuation frequency characteristic of the incoming line pair follows the approximate law. The attenuation accepted at 1024KHz is 0-6dB.

Echo wave loss ≥12Db 51-102kHz; ≥18dB 102-2048kHz ≥14dB 2048-3072kHz

Pulse shape Complies with template in G. 703 of ITU-T recommendations


Interface type Electric interface, complying with ITU-T recommendations

G.703 Bit rate 34368kb/s ±20ppm Number of branch 1 Code HDB3 Signal magnitude 1Vp (75ohms) Attenuation tolerance on the incoming signal

The attenuation frequency characteristic of the incoming line pair follows the law of approximate. The attenuation accepted at 17.148 KHz is 0-12dB.

Retune loss ≥12dB 860-1720kHz ≥18dB 1720-34368kHz ≥14dB 4368-51550kHz.

Pulse shape Complies with the template shown in Fig. 17 of G.703 of ITU-T recommendations


Interface type Electric interface, complying with G.703 of ITU-T

recommendations and T1 102 of ANSI recommendations Bit rate 44736kb/s ±20ppm Number of tributaries 1 Code B3ZS Signal magnitude Complying with G.703 in ITU-T recommendations and T1 102

in ANSI recommendations Attenuation tolerance on the incoming signal

Complying with G.703 in ITU-T recommendations and T1 102 in ANSI recommendations

Pulse shape Complying with the template shown in Figure 17 of G.703 in ITU-T recommendations and the template shown in Fig. 5 of T1 102 in ANSI recommendations

f

f

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Interface type Electric interface, complying with G.703 of ITU-T

recommendations Bit rate 155 520 kbit/s ±20ppm Number of tributaries 1 Code CMI Signal magnitude 1 ± 0.1 V (Complying with ITU-T G.703) Attenuation tolerance on the incoming signal

12.7 dB at a frequency of 78 MHz(Complying with ITU-T G.703).

Pulse shape Complying with the template shown in Figure 22,23,24 of G.703 in ITU-T recommendations.

5.3.5 Characteristics of 10/100Base -T Ethernet interface

Interface type Compliant to IEEE-802.3 protocol 10Base-T and 100Base-T interface standard

Operating mode Auto-Negotiation options: 10Mbps or 100Mbps, full duplex or half-duplex mode.

Transmission rate Ethernet 10Mbit/s, high speed Ethernet 100Mbit/s. Net port cable Twisted-pair Cat.5 UTP (100M). Connector RJ45.

5.3.6 Interface specifications of auxiliary channel

The auxiliary channel interface is mainly used as the transparent path interface provided to customers. It uses E2 and F1 bytes of STM-1 optical interface and each optical interface provides two transparent path interfaces. RS-232 level is used and the transmission rate is 9600 bit/s.

RS-232 interface specifications: Bit rate 9600 bit/s. Mode RS-232 transmitting and receiving. Level 24V (bipolarity)

5.4 Power specifications

The specifications of 1642EM equipment power supply are given in Table 5-3:

Table 5-3: power supply specifications Power supply board Nominal voltage Voltage range Max. HP DC48B -48VDC or -24VDC* -36V~-72V or -20.5V~-36V 70W FB -48VDC or -24VDC* -36V~-72V or -20.5V~-36V 70W AC220B 230VAC 170VAC~265VAC 80W

N.B. Only 24V Main Unit (3AL97081ADAA) can support –24VDC power supply, but can ‘t support 230VAC power supply. N.B. 48V Main unit (3AL97081ACAA) can support –48VDC power supply and 230VAC power supply.

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5.5 Alarm specifications

Unit alarm: There is a bicolor LED (red/green) on every service board panel on the 4 slots. LED indications: - Red indicates a major alarm in the unit. - Yellow indicates a common alarm. - Green indicates units in service. Main board alarm: There are 6 bicolor LEDs on the main board, four of them are alarm indicators. Their locations are shown in Figure 2-7. Where: (21) and (22) are the alarming LEDs of the two optical modules embedded on the main board. LED indications: - In case of low light input, the red LED is ON, otherwise the green LED is ON. (2) indicates common alarm of the system LED indications: - In case of a common system alarm, the yellow LED is ON, otherwise the light is OFF. (3) indicates severity alarm of the system LED indications: - In case of severity system alarm, the red LED is ON, otherwise the light is OFF. External environment alarm (housekeeping) 1642EM provides 3-input and 3-output housekeeping interfaces, where customers can define its use. ENABLED and DISENABLED can be set on the network management interface. When ENABLED is set on one port, the customer can set the alarm level value (0 or 1) of the input and can inquiry the alarm through network management. When DISENABLED is set on one output port, the output can be controlled as 0 or 1 from the network management interface. If it is 0, the signal for external circuit loop is open; else is short. Reset button: There is a reset button on the main board panel. Pressing the button will reset the software. Warning: Pressing the key will cause service interruption and do not press except in special circumstances. Debug port: A debug port is provided on the main board panel of 1642EM, which can communicate with PC serial interface for equipment debugging.

5.6 Mechanical specifications

Mechanical compatibility: refer to the installation handbook Overall dimension: 88mm*295mm*443mm Units dimension: Main board: 245mm×340mm

Service board: 165×230mm Optical module: 132.08mm×50.8mm Clock module: 125mm×75mm

Equipment weight: 9Kg Cooling conditions: There are fan boards on the left side Electric connection: RJ11

RJ45 IEC 807 (sub-D) IEC 169-1 (coax. 1.0/2.3) Head-Male 4×12

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5.7 Environmental conditions

5.7.1 Climatic for operating conditions

The Equipment meets the requirements of ETSI Standards with use of two internal fans. The functionality of the Equipment, Vs. Temperature, is in compliance with: ETS 300 019–1–3 :1992, class 3.2. Class 3.2: Partly temperature–controlled locations. (See climatogram in Figure 5-1) This class applies to locations: – Where installed equipment may be exposed to solar radiation and heat radiation. They may also be exposed to movements of the surrounding air due to draughts in buildings, e.g. through open windows. They may be subjected to condensed water and to water from sources other than rain and icing. They are not subjected to precipitation: – Where mould growth or attacks by animals, except termites, may occur; – With normal levels of contaminants experienced in urban areas with industrial activities scattered over the whole area and/or with heavy traffic: – In close proximity to sources of sand or dust; – With vibration of low significance, e.g. for products fastened to light supporting structures subjected to negligible vibrations. The conditions of this class may be found in: – Entrances and staircases of buildings; – Garages; – Cellars; – Certain workshops; – Buildings in factories and industrial process plants; – Unattended equipment stations; – Certain telecommunication buildings; – Ordinary storage rooms for frost resistant products and farm buildings, etc.

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Figure 5-1: Climatogram for Class 3.2: partly temperature controlled locations

5.7.2 Storage

The equipment meets the following requirements Vs. Storage: ETS 300 019–1–1 : 1992, class 1.2 Class 1.2 : weather protected, not temperature controlled storage location. This class applies to weather protected storage having neither temperature nor humidity control. The location may have openings directly to the open air, i.e., it may be only partly weatherproofed. The climatogram is shown in Figure 5-2. This class applies to storage locations: – Where equipment may be exposed to solar radiation and temporarily to heat radiation: They may also be exposed to movements of the surrounding air due to draughts, e.g. through doors, windows or other openings. They may be subjected to condensed water, dripping water and to icing. They may also be subjected to limited wind–driven precipitation including snow; – Where mould growth or attacks by animals, except termites, may occur; – With normal levels of contaminants experienced in urban areas with industrial activities Scattered over the whole area, ad/or with heavy traffic; – In areas with sources of sand or dust, including urban areas; – With vibration of low significance and insignificant shock. The conditions of this class may occur in: – Unattended buildings; – Some entrances of buildings; – Some garages and shacks.

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Figure 5-2: Climatogram for Class 1.2: not temperature controlled storage location

5.7.3 Transportation

The equipment meets the following requirements Vs. transportation: ETS 300 019–1–2 : 1992, class 2.2 Class 2.2 : Careful transportation. (See Table 5-4) This class applies to transportation where special cares has been taken e.g. with respect to low temperature and handling. Class 2.2 covers the condition of class 2.1. In addition class 2.2 includes transportation in all types of lorries and trailers in areas with well–developed road system. It also includes transportation by ship and by train specially designed shock–reducing buffers. Manual loading and unloading of to 20 Kg is included. Extension of extreme low temperature during transportation is permitted for the equipment in its standard packing: AT –400C for 72 Hours maximum Without damaging the Optical interfaces.

Table 5-4: Transportation climatic

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环境条件

低温

Notes to Table 5-4: NOTE 1: The high temperature of the surfaces of a product may be influenced by both the surrounding air temperature, given here, and the solar radiation through a window or another opening. NOTE 2: The high temperature of the surface of a product is influenced by the surrounding air temperature, given here, and the solar radiation defined below. NOTE 3: A direct transfer of the product between the two given temperature is presumed. NOTE 4: The product is assumed to be subjected to a rapid decrease of temperature only (no rapid increase). The figures of water content apply to temperatures down to the dew–point; at drop temperatures the relative humidity is assumed to be approximately 100 %. NOTE 5: The figure indicates the velocity of water and not the height of water accumulated. NOTE 6: Occurrence of condensation. NOTE 7: For short duration only.

END OF DOCUMENT

Enrionment condition

Low tempurature

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