1 SI Fundamentals Short Course: Equalization 2008-06-06 SI Fundamentals Short Course - Equalization...
-
Upload
violet-blair -
Category
Documents
-
view
279 -
download
19
Transcript of 1 SI Fundamentals Short Course: Equalization 2008-06-06 SI Fundamentals Short Course - Equalization...
1SI Fundamentals Short Course: Equalization2008-06-06
SI Fundamentals Short Course -SI Fundamentals Short Course -EqualizationEqualization
Howard HeckIntel Corporation
2SI Fundamentals Short Course: Equalization2008-06-06
Contents Introduction Channel Characteristics Continuous Time Linear Equalizers Discrete Time Linear Equalizers Decision Feedback Equalizers Adaptive Equalization Crosstalk Cancellation Summary
3SI Fundamentals Short Course: Equalization2008-06-06
Motivation
Signaling speeds continue to increase while interconnects change incrementally.
– 4-Layers boards with FR4 still rule.– Solution spaces cannot shrink indefinitely.– Board and silicon timings must continue to scale
together.– For example:
– The spec for PCIe Gen1 allocates 65 ps to the channel (1/3 of 2.5 GT/s timing budget).
– Without scaling, interconnects will take 2/3 of the Gen2 5 GT/s timing budget.
We use equalization to improve timing margins.
4SI Fundamentals Short Course: Equalization2008-06-06
Introduction
Systems with equalization are best viewed as communications links where each block filters the signal.
The signal at the receiver input is:
Transmit Filterht(t)
Receiving Filterhr(t)
AWGNn(t)
{xk}r(t)
Channelhc(t)
T T
t = kTDetector {xk}
tnththtxtr ct
where binary 1binary 0
ht(t) = transmitter filterhc(t) = channel impulse responsen(t) = noiser(t) = received signal* = convolution operation
otherwise tx
Tttxtxn ,
0,
2
1
5SI Fundamentals Short Course: Equalization2008-06-06
Introduction #2
The signal at the input to the receiver is a function of the transmitted signal and the channel insertion loss:
Tx H(f) = S21 Rx
We describe the channel as a band limited filter:
fj SefSfS 212121
Let’s simplify things slightly by looking at the transmitter, interconnect channel, and receiver.
fVfSfV TxRx 21 tvtStv TxRx 21 time domain frequency domain
6SI Fundamentals Short Course: Equalization2008-06-06
S21(f) is constant:zero amplitude distortion
Ideal Channel
0 0.5 1 1.5 2 2.5 3 3.550
10
70
130
190
250
310
370
430
490
550
Tx InputTx OutputEq OutputTx Output (Extracted)Rx Input
time [ns]
volta
ge [
mV
]
Tx Waveforms
0 0.5 1 1.5 2 2.5 3 3.550
10
70
130
190
250
310
370
430
490
550
Tx InputTx OutputEq OutputTx Output (Extracted)Rx Input
time [ns]
volta
ge [
mV
]
Rx Waveforms
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 20025
30
85
140
195
250
305
360
415
470
525
time [ps]
volta
ge [
mV
]
Rx Eye Diagram
S21(f) is a linear function of frequency:constant delay at all frequencies zero phase distortion
Result: distortionless transmission, open data “eye.”
7SI Fundamentals Short Course: Equalization2008-06-06
S21(f) isn’t constant:Losses increase with frequency
Real Channel
0 0.5 1 1.5 2 2.5 3 3.550
10
70
130
190
250
310
370
430
490
550
Tx InputTx OutputEq OutputTx Output (Extracted)Rx Input
time [ns]
volta
ge [
mV
]
Tx Waveforms
0 0.5 1 1.5 2 2.5 3 3.550
5
60
115
170
225
280
335
390
445
500
Tx InputTx OutputEq OutputTx Output (Extracted)Rx Input
time [ns]
volta
ge [
mV
]
Rx Waveforms
S21(f) isn’t linear with frequency:
r varies with frequency
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 2001.6653345369377 10
16
50
100
150
200
250
300
350
400
450
500
time [ps]
volta
ge [
mV
]
Rx Eye Diagram
Result: Amplitude and phase distortion cause “smearing” of pulses (ISI) which closes the “eye” diagram.
8SI Fundamentals Short Course: Equalization2008-06-06
fVfSfHfV TxeqRx 21
The Ideal Equalizer With an equalizer in the channel:
Tx H(f) = S21 RxHeq(f)
f [GHz]L
oss [
dB
]
InterconnectChannel
tvtSthtv TxeqRx 21
Ideal Equalizer
The ideal response requires an equalizer that responds as the inverse of the channel:
fjeq
SefSfSfH 211
211
21
The ideal response is typically not practical.– Cost & power constrains the
design.– Goal: reduce distortion to
tolerable levels.
Equalized
fVfVfSfSfV TxTxRx 21
121
9SI Fundamentals Short Course: Equalization2008-06-06
Overview of Techniques
The equalizer may be placed anywhere in the channel.– Often done at the transmitter
(Tx), receiver (Rx), or both.– Interconnects can contain
equalizing filters, too.
Tx H(f) = S21 RxHeq(f)
Tx H(f) = S21 RxHeq(f)
Popular types:– Continuous time filters (with/without amplification).– Discrete linear equalizers (Tx pre-emphasis or Rx).– Decision feedback equalizers (DFE).
Other types of filtering can compensate for other sources of distortion (e.g. crosstalk cancellers).
We’ll look at each.
10SI Fundamentals Short Course: Equalization2008-06-06
Passive Continuous Linear Equalizer
The passive CLE is a high pass filter.
Low frequency components are attenuated.
Amplification of high frequency components is possible, too.
The filter can be made of discrete components, integrated into the silicon, or even built into cables or connectors.
22
22 21 CfRj
RZ
321
3
ZZR
ZfHCLE
33
33 21 CfRj
RZ
R1 = 100
C2 = 100fF
R2 = 5kR3 = 2.5k C3 = 20fF
11SI Fundamentals Short Course: Equalization2008-06-06
Transfer Function for PCB-CTLE System
0 1 2 3 4 5 6 7 8 9 1030
27
24
21
18
15
12
9
6
3
0
frequency (GHz)
Mag
nitu
de(d
B)
Passive Continuous Linear EqualizerCTLE
PCB
PCB+CTLE
-16.0 dB-16.0 dB
-21.0 dB-21.0 dB
Closed eye
Closed eye
The passive equalizer doubles the usable spectrum.The passive equalizer doubles the usable spectrum.
12SI Fundamentals Short Course: Equalization2008-06-06
Passive CTLE @10 Gb/s
Non-EqualizedNon-Equalized
EqualizedEqualized
Eyeshift 44 %
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100300
240
180
120
60
0
60
120
180
240
300
volta
ge (
mV
)
time (ps)Eyeshift 48 %
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100150
120
90
60
30
0
30
60
90
120
150
volta
ge (
mV
)
time (ps)Eye mask : 20 mV x 50 ps
13SI Fundamentals Short Course: Equalization2008-06-06
Transmit Equalization (a.k.a. Pre-Emphasis)
Isolated bits or rapidly alternating 0s/1s don’t build up to the full swing at the receiver in a lossy channel.
This gives a closed eye at the receiver.
Pre-emphasis adjusts the magnitude of the transmitter output based on prior bit values.
Often done by attenuating successive bits (“de-emphasis”).
This reduces the maximum swing, but produces an open eye.
Non
-Equ
aliz
edN
on-E
qual
ized
Equa
lized
Equa
lized
0 1 2 3 4 5 6 7 8150
90
30
30
90
150
210
270
330
390
450
time [ns]
volta
ge [
mV
]
Waveforms
0 1 2 3 4 5 6 7 850
10
70
130
190
250
310
370
430
490
550
time [ns]
volta
ge [
mV
]
Waveforms
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 20075
115
155
195
235
275
315
355
395
435
475
time [ps]
volta
ge [
mV
]
Rx Eye Diagram
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 20050
72.5
95
117.5
140
162.5
185
207.5
230
252.5
275
time [ps]
volta
ge [
mV
]
Rx Eye Diagram
14SI Fundamentals Short Course: Equalization2008-06-06
The outputs from the weights are summed to produce the transmitter output.
The number of taps depends on the length of the channel relative to the unit interval of the data.
Pre-Emphasis Circuit
DLEs use finite impulse response (FIR) filters.
The input stream propagates thru a series of delay lines. – Each line typically has a delay of
one unit interval. The input signal is sampled
between each delay line and multiplied by a weighting factor (Ck).– Negative subscripts compensate
“precursor” ISI, positive for “postcursor” ISI.
C-1 C0 C1 C2
yk
xk
15SI Fundamentals Short Course: Equalization2008-06-06
Tx Pre-emphasis Example Pulse arrives filter input & is multiplied
by C-1, generating a precursor pulse of -50 mV amplitude and 1 ns duration.
1 ns later, the pulse is at tap 3 tap & gets weighted with C1, generating the first postcursor pulse (-100 mV amplitude, 1 ns duration).
1 ns later, the reaches the final tap, is multiplied by C2, creating the +50 mV, 1 ns 2nd postcursor pulse.
C-1 C0 C1 C2
T T T
yk
xk
3 42
After 1 ns delay, pulse appears at tap 2 & is multiplied by C0, generating the 400 mV, 1 ns cursor pulse.
2
400 mV 3
-100 mV
4
50 mV
1
-50 mV
1
600 mV
1 ns
16SI Fundamentals Short Course: Equalization2008-06-06
Tx Pre-emphasis Pulse arrives filter input & is multiplied
by C-1, generating a precursor pulse of -50 mV amplitude and 1 ns duration.
1 ns later, the pulse is at tap 3 tap & gets weighted with C1, generating the first postcursor pulse (-100 mV amplitude, 1 ns duration).
1 ns later, the reaches the final tap, is multiplied by C2, creating the +50 mV, 1 ns 2nd postcursor pulse.
After 1 ns delay, pulse appears at tap 2 & is multiplied by C0, generating the 400 mV, 1 ns cursor pulse.
1
2
3
4
+
T
4 ns
400 mV
-100 mV
17SI Fundamentals Short Course: Equalization2008-06-06
To derive the frequency domain transfer function apply the time shift property of the Fourier transform, w(t-T) ↔ W(f )e- j2fT, to the time domain filter response w/ T = unit interval.
N=2C0=.75C1=-0.2C2=-0.05
-7
-6
-5
-4
-3
-2
-1
0
0 2 4 6 8 10f [GHz]
|H(f
)| [
dB
]
6.4 Gb/s
10 Gb/s
12.8 Gb/s
FIR Filter Response
where ck=tap Coefficient, k=tap number (0=cursor), N=# of taps
post
pre
n
nnncnkxky
Time Domain
post
pre
n
nk
TkfjkecfH 2)(
Frequency Domain
18SI Fundamentals Short Course: Equalization2008-06-06
Rx Discrete Time Linear Equalizer (DLE)
The receive-side DLE works just like the transmitter pre-emphasis circuit.
The only difference is that it samples the incoming analog voltage.
Uses a “sample & hold” circuit at the input, which provides the input signal stream to the FIR.
C-1 C0 C1 C2
yk
xk
19SI Fundamentals Short Course: Equalization2008-06-06
-2 -1 0 1 2 3 4 5time (UI)
-3
-0.06
-0.04
-0.02
0.00
0.02
0.04
0.06
0.08
0.10
volt
age
(V)
Discrete Linear Equalizer Design
Conceptually, we want the receiving equalizer to generate a set of canceling “echoes”
Since we sample at predetermined points, the equalizer design can be straightforward, but will only cancel ISI at the sample points.
Tap weights are selected to subtract ISI effects from adjacent bits.
EqualizedEqualized
EqualizerEqualizer
DesiredDesired
ReceivedReceived
20SI Fundamentals Short Course: Equalization2008-06-06
DLE Design #2
Equalizer
2N+1 taps, weights C-N, C-N+1,…, CN,
Output samples {yn} are found by convolving the input samples {xn} and the tap weights {Cn}:
N
Nnncnkxky
21SI Fundamentals Short Course: Equalization2008-06-06
DLE Design #3In matrix form:
Ny
y
Ny
2
0
2
y
Nx
NxNx
NxNxNxNxNx
NxNx
Nx
0000
1000
121
0001
0000
x
Nc
c
Nc
0c
cxy
Input matrix columns represent the taps of the equalizer, rows represent consecutive time steps with an interval between steps that is equal to the tap spacing of the equalizer.
x is square with npre + npost + 1 rows and columns. It shows the propagation of the input samples through the equalizing filter.
y is the vector of consecutive output samples. c vector is the vector of equalizer tap coefficients.
where
22SI Fundamentals Short Course: Equalization2008-06-06
DLE Design #4
We can set the desired output values, y = ytarg, and use the input samples, x, to set c.
If x is square, then # rows = # columns = # elements in c. Then:
yxc 1
targyxc 1
This is known as the zero forcing solution (ZFS).
23SI Fundamentals Short Course: Equalization2008-06-06
ZFS Equalizer DLE DesignSteps:1. Dispose of the top N and bottom N rows of x. This transforms it into a
square matrix with dimension 2N +1 by 2N+1, in order to operate with the y vector, which has dimension 2N+1.
20000
122000
21222122
000212
00002
Nx
NxNx
NxNxNxNxNx
NxNx
Nx
x
2. Set equalized output vector, ytarg, to be equal to zero at N sample points on either side of the desired pulse.
Nk
kkytarg ,,2,1,0
0,1
24SI Fundamentals Short Course: Equalization2008-06-06
Example: Zero Forcing Solution Determine cn for a 3 tap equalizer (N=2) from the pulse
response (i.e. a training pulse) using the zero forcing solution.
Given:
Zero forcing:
Then:
Carrying out the matrix multiplication and solving the simultaneous equations, or using , get:
c-1 = -0.214, c0 = 0.963, c1 = 0.345
1.0,3.0,9.0,2.0,0.0 kx
0,1,0ky
1
0
1
1
0
1
012
101
210
9.03.01.0
2.09.03.0
0.02.09.0
0
1
0
c
c
c
c
c
c
xxx
xxx
xxx
yxc 1
25SI Fundamentals Short Course: Equalization2008-06-06
Linear Equalizer Limitations The linear equalizer can’t
distinguish between the signal and noise.
– HF noise is amplified.
Data rate is limited by SNRaccording.
– Noise becomes a primarydesign consideration.
An alternative to a linear equalizer is a decision feedback equalizer (DFE).
Other methods for setting tap weights may provide better results.
f [GHz]L
oss [
dB
]
ChannelEqualized Channel
Linear Equalizer
Noise
Enhanced Noise
Tx H(f) = S21 RxHeq(f)
AWGNn(t)
26SI Fundamentals Short Course: Equalization2008-06-06
Decision Feedback Equalizers
Characteristics: No noise enhancement
– Input to FBF has no noise, as opposed to DLE input.
Assumes all past decisions are correct– Erroneous decisions corrupt future decisions.
– There are coding methods to minimize impact.
Corrects for only post-cursor ISI
h(t) r(t)
Channel n(t)
t=0 ykxk
FBF
Bit slicer
27SI Fundamentals Short Course: Equalization2008-06-06
DFE Operation
The DFE uses the same FIR filter structure as the DLE. The input signal is summed with the feedback signal to
provide input to a bit slicer, which decodes the signal into either a “1” or a “0”.
The output from the bit slicer is used as input to the FIR filter.
C-N C-N+1 CN-1 CN
T T T T
in out
FeedbackFilter
0 1 2 3 4 5 6 7 850
10
70
130
190
250
310
370
430
490
550
time [ns]
volta
ge [
mV
]
x
0 1 2 3 4 5 6 7 850
0
50
100
150
200
250
300
350
400
450
time [ns]
volta
ge [
mV
]
x
28SI Fundamentals Short Course: Equalization2008-06-06
20 10 0 10 20 30 40 50 60 70 80 90 100 110 120150
120
90
60
30
0
30
60
90
120
Worst Case Received Eyes
time [ps]
volta
ge (
mV
)
DFE OperationN
o E
QN
o E
QD
LED
LED
LE +
DFE
DLE
+ D
FE
0 1 2 3 4 5 6 7 8 9 10300
250
200
150
100
50
0
50
100
time (ns)
diff
eren
tial v
olta
ge [
V]
0 1 2 3 4 5 6 7 8 9 10300
250
200
150
100
50
0
50
100
time (ns)
diff
eren
tial v
olta
ge [
V]
0 1 2 3 4 5 6 7 8 9 10300
250
200
150
100
50
0
50
100
time (ns)
diff
eren
tial v
olta
ge [
V]
76 ps
89 ps
96 m
V
90 m
V
The DFE requires an open eye, so it is typically used with a linear equalizer on the front end.
29SI Fundamentals Short Course: Equalization2008-06-06
Adaptive Equalization
Ideally, tap coefficients are tuned to each system to account for operational (V, T) and manufacturing variation.
This is done using adaptive algorithms.
Perfect adaptation isn’t practical.
–Limited by things like update rate, coefficient resolution, etc.
C-N C-N+1 CN-1 CN
xk
Coefficient Adjustment
C-N C-N+1 CN-1 CN
T T T T
yk
xk
Coefficient Adjustment
Adaptive DLE
Adaptive DFE
30SI Fundamentals Short Course: Equalization2008-06-06
Crosstalk Cancellation
Some noise sources can be compensated (some can’t). A simple way to cancel the effects of crosstalk is shown
below (Zerbe 2001).
TransmitFilterht(t)
ReceivingFilterhr(t)
AWGNn(t)
{xk}r(t)
Channelhc(t)
T T
t = kTDetector {xk}
tnthththtxth rcts
XTC
S1EQX1A
EQX1B
XTC
S2EQX2A
EQX2B
XTCS3EQX3A
EQX3B
Operation: XTC samples outgoing data is &
multiplies it with a tap weight over a unit interval.
The weighted signal is sent to the adjacent signal on each side, where it is summed with the outgoing data.
31SI Fundamentals Short Course: Equalization2008-06-06
Summary
Channels act as filters that cause both amplitude and phase distortion of signals.
Transmitters and receivers can be designed as filters to compensate for non-ideal channel behavior.
Discrete linear equalizers at the transmitter and receiver are seeing wide use for multi-Gb/s signaling.
Multiple techniques are available for setting filter tap weights.
Crosstalk can be cancelled, too.
32SI Fundamentals Short Course: Equalization2008-06-06
References S. Hall and H. Heck, Advanced Signal Integrity for High Speed Digital
Designs, John Wiley & Sons, to be published in 2009. Couch, Leon, Digital and Analog Communication Systems, 2nd edition,
MacMillan, New York, 1987. W.J. Dally, J. Poulton, “Transmitter Equalization for 4-Gbps Signaling,”
IEEE Micro, January/February 1997, pp. 48-56. Jaussi, James, et. al., “8-Gb/s Source-Synchronous I/O Links With
Adaptive Receiver Equalization, Offset Cancellation, and Clock De-Skew,” IEEE Journal of Solid-State Circuits, Vol. 40, No. 1, January 2005, pp. 80-88.
Sun, Ruifeng, Park, Jaejin, O’Mahony, Frank, and C. Patrick Yue, “A Low-Power, 20-Gb/s Continuous-Time Adaptive Passive Equalizer,” IEEE Symposium on Circuits and Systems (ICAS) 2005, May 23-26, 2005, pp. 920-923.
Liu, Jin, and Xiaofen Ling, “Equalization in High-Speed Communication Systems,” IEEE Circuits and Systems Magazine, Vol. 4, No. 2, 2004, pp. 4-17.
Lucky, Robert, “The Adaptive Equalizer,” IEEE Signal Processing Magazine, May 2006, pp. 104-107.
Qureshi, Shahid, “Adaptive Equalization,” Proceedings of the IEEE, Vol. 73, No. 9, September 1985, pp. 1349-1387.