1

InGaAs/InP DHBTs demonstrating simultaneous ft/fmax ~ 460/850 GHz in a refractory emitter process

Vibhor Jain, Evan Lobisser, Ashish Baraskar, Brian J Thibeault, Mark RodwellECE Department, University of California, Santa Barbara, CA 93106-9560

Miguel UrteagaTeledyne Scientific & Imaging, Thousand Oaks, CA 91360

D Loubychev, A Snyder, Y Wu, J M Fastenau, W K LiuIQE Inc., 119 Technology Drive, Bethlehem, PA 18015

vibhor@ece.ucsb.edu, 805-893-3273

InP and Related Materials 2011

2

Outline

• Need for high speed HBTs

• HBT Scaling Laws

• Fabrication– Challenges

– Process Development

• DHBT – Epitaxial Design

– Results

• Summary

3

0

5

10

15

20

25

30

35

40

109 1010 1011 1012

Tra

nsi

sto

r P

ow

er G

ain

(d

B)

Freq (Hz)

Why THz Transistors?

High gain at microwave frequencies precision analog design, high resolution ADC & DAC, high performance receivers

THz amplifiers for imaging, sensing, communications

Digital Logic for Optical fiber circuits

4

Ohmic contacts

Lateral scaling

Epitaxial scaling

Bipolar transistor scaling laws

To double cutoff frequencies of a mesa HBT, must:

(emitter length Le)

We

Tb TcWbc

Keep constant all resistances and currentsReduce all capacitances and transit delays by 2

RCf tr

2

1

exitbnbb vTDT 22satcc vT 2

eex AR /contact

contacts

contactsheet 612 AL

W

L

WR

e

bc

e

ebb

cccb /TAC 2

cbmax, /)( cbieeffc TVAvI

effcbeffbb CR

ff

,,max 8

5

Base Access Resistance

contacts

contactgapsh,bcsh,esh, 2612 AL

W

L

W

L

WR

e

gap

e

bc

e

ebb

We

Wgap

Wbc

bcsh,esh,gapsh, ,

• Surface Depletion

• Process Damage

Need for very small Wgap

• Small undercut in InP emitter

• Self-aligned base contact

cbbbCR

ff

8max

6

Base-Emitter Short

Undercut in thick emitter semiconductor

Helps in Self Aligned Base Liftoff

For controlled semiconductor undercut

Thin semiconductor

To prevent base – emitter short

Vertical emitter profile and line of sight metal deposition

Shadowing effect due to high emitter aspect ratio

Slow etch plane

InP Wet Etch

Fast etch plane

7

Composite Emitter Metal Stack

TiW

W

• W/TiW metal stack

• Low stress

• Refractory metal emitters

• Vertical dry etch profile

W emitter

Erik Lind

Evan LobisserTiW emitter

8

TiW

W

Base Metal

BCB

SiNx

100nm

Vertical etch profile

Low stress

High emitter yield

Scalable emitter process

Vertical EmitterFIB/TEM by E Lobisser

9

InGaAs capMo contact

InP emitter

Dual SiN sidewall

Controlled InP undercut

Narrow BE gap50nm

Narrow Emitter UndercutFIB/TEM by E Lobisser

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Process flow

Mo contact to n-InGaAs for emitter

W/TiW/SiO2/Cr dep

SF6/Ar etch

SiNx Sidewall

SiO2/Cr removal

InGaAs Wet Etch

Second SiNx Sidewall

InP Wet Etch

Base Contact Lift-off

Base and collector formed via lift off and wet etch

BCB used to passivate and planarize devices

Self-aligned process flow for DHBTs

Mo

base

N- collector

InP substrate

sub collector

emitteremitter cap

n+ InGaAs

n InP

emitter capemitter

base

SiO2/Cr

TiW

MoW

SiN (SW)

emitterbase base base

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Epitaxial Design

T(nm) Material Doping (cm-3) Description

10 In0.53Ga0.47As 81019 : Si Emitter Cap

20 InP 51019 : Si Emitter

15 InP 21018 : Si Emitter

30 InGaAs 9-51019 : C Base

13.5 In0.53Ga0.47 As 51016 : Si Setback

16.5 InGaAs / InAlAs 51016 : Si B-C Grade

3 InP 3.6 1018 : Si Pulse doping

67 InP 51016 : Si Collector

7.5 InP 11019 : Si Sub Collector

5 In0.53Ga0.47 As 41019 : Si Sub Collector

300 InP 21019 : Si Sub Collector

Substrate SI : InP

Vbe = 1 V, Vcb = 0.7 V, Je = 24 mA/m2

-2.5

-2

-1.5

-1

-0.5

0

0.5

1

1.5

0 50 100 150 200

En

erg

y (e

V)

Distance (nm)

Emitter

Collector

Base

Thin emitter semiconductor

Enables wet etching

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Results - DC Measurements

BVceo = 3.7 V @ Je = 10 kA/cm2

β = 20

Base ρsh = 710 Ω/sq, ρc < 5 Ω·µm2

Collector ρsh = 15 Ω/sq, ρc = 22 Ω·µm2

@Peak f,fmax

Je = 19.4 mA/m2

P = 32 mW/m2

Gummel plot

Common emitter I-V

0

5

10

15

20

25

30

0 1 2 3 4 5

Je (

mA

/m

2)

Vce

(V)

P = 30mW/m2

P = 20mW/m2

BV

Peak f/f

max

Ib,step

= 100 A

10-9

10-7

10-5

10-3

10-1

0

5

10

15

20

25

0 0.2 0.4 0.6 0.8 1

I c, Ib (

A)

Cu

rrent G

ain

()

Vbe

(V)

Solid line: Vcb

= 0.7V

Dashed: Vcb

= 0VIc

Ib

nc = 1.17

nb = 1.98

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1-67 GHz RF Data

Ic = 11.5 mA

Vce = 1.66 V

Je = 19.4 mA/m2

Vcb = 0.7 V

Single-pole fit to obtain cut-off frequencies

0

5

10

15

20

25

30

35

109 1010 1011 1012

Ga

in (

dB

)

freq (Hz)

fmax

= 850 GHz

f = 460 GHz

U

H21

MSG

Aje

= 0.22 x 2.7 m2

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Parameter Extraction

Jkirk = 23 mA/m2 (@Vcb = 0.7V)

0

100

200

300

400

500

0 5 10 15 20 25

f (G

Hz)

Je (mA/m2)

Vcb

= 0.7 V

Vcb

= 0 V

300

400

500

600

700

800

900

0 5 10 15 20 25

f max

(GH

z)

Je (mA/m2)

Vcb

= 0.7 V

Vcb

= 0 V

3

4

5

6

7

8

9

0 5 10 15 20 25

Cc

b (

fF)

Je (mA/m2)

Vcb

= 0.7 V

Vcb

= 0.5 V

Vcb

= 0.3 V

Vcb

= 0 V

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Equivalent Circuit

Hybrid- equivalent circuit from measured RF data

Rex < 4 m2

Ccb,x = 3.71 fF

Ccb,i = 0.81 fF

Rcb = 34 k

Rc = 4.7

Rex = 6

Rbe = 121

Rbb = 30

Cje + Cdiff = (7.4 + 47.6) fF gmVbee-j

0.197Vbee(-j0.17ps)

Base

Emitter

Col

Ccg = 3.6 fF

Ccb,x = 3.71 fF

Ccb,i = 0.81 fF

Rcb = 34 k

Rc = 4.7

Rex = 6

Rbe = 121

Rbb = 30

Cje + Cdiff = (7.4 + 47.6) fF gmVbee-j

0.197Vbee(-j0.17ps)

Base

Emitter

Col

Ccg = 3.6 fF

freq (1.000GHz to 67.00GHz)

S(1

,1)

S(2

,2)

S(1

,2)*

5S

(2,1

)/10

freq (100.0MHz to 67.00GHz)

S_p

aram

eter

_Dee

mbe

d_P

NA

..S12

d*5

S_p

aram

eter

_Dee

mbe

d_P

NA

..S21

d/10

S_p

aram

eter

_Dee

mbe

d_P

NA

..S11

dS

_par

amet

er_D

eem

bed_

PN

A..S

22d

S21/10S12x5

S11

S22freq (1.000GHz to 67.00GHz)

S(1

,1)

S(2

,2)

S(1

,2)*

5S

(2,1

)/10

freq (100.0MHz to 67.00GHz)

S_p

aram

eter

_Dee

mbe

d_P

NA

..S12

d*5

S_p

aram

eter

_Dee

mbe

d_P

NA

..S21

d/10

S_p

aram

eter

_Dee

mbe

d_P

NA

..S11

dS

_par

amet

er_D

eem

bed_

PN

A..S

22d

S21/10S12x5

S11

S22

--- : Measured x : Simulated

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TEM – Wide base mesa

0.2 m

High Ac / Ae ratio (>5)

High Rex . Ccb delay

Low f

220 nm

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Summary

• Demonstrated DHBTs with peak f / fmax = 460/850 GHz

• Small Wgap for reduced base access resistance High fmax

• Narrow sidewalls, smaller base mesa and better base ohmics needed to enable higher bandwidth devices

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Questions?

Thank You

This work was supported by the DARPA THETA program under HR0011-09-C-006.

A portion of this work was done in the UCSB nanofabrication facility, part of NSF funded NNIN network and MRL Central Facilities supported by the MRSEC Program of the NSF under award No. MR05-20415